| c2042f59 |
1 | /* |
| 2 | * Configuation settings for the Renesas Solutions Migo-R board |
| 3 | * |
| 4 | * Copyright (C) 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org> |
| 5 | * |
| 6 | * See file CREDITS for list of people who contributed to this |
| 7 | * project. |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or |
| 10 | * modify it under the terms of the GNU General Public License as |
| 11 | * published by the Free Software Foundation; either version 2 of |
| 12 | * the License, or (at your option) any later version. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | * GNU General Public License for more details. |
| 18 | * |
| 19 | * You should have received a copy of the GNU General Public License |
| 20 | * along with this program; if not, write to the Free Software |
| 21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 22 | * MA 02111-1307 USA |
| 23 | */ |
| 24 | |
| 25 | #ifndef __MIGO_R_H |
| 26 | #define __MIGO_R_H |
| 27 | |
| 28 | #undef DEBUG |
| 29 | #define CONFIG_SH 1 |
| 30 | #define CONFIG_SH4 1 |
| 31 | #define CONFIG_CPU_SH7722 1 |
| 32 | #define CONFIG_MIGO_R 1 |
| 33 | |
| 34 | #define CONFIG_CMD_LOADB |
| 35 | #define CONFIG_CMD_LOADS |
| 36 | #define CONFIG_CMD_FLASH |
| 37 | #define CONFIG_CMD_MEMORY |
| 38 | #define CONFIG_CMD_NET |
| 39 | #define CONFIG_CMD_PING |
| 40 | #define CONFIG_CMD_NFS |
| 41 | #define CONFIG_CMD_DFL |
| 42 | #define CONFIG_CMD_SDRAM |
| 43 | #define CONFIG_CMD_ENV |
| 44 | |
| 45 | #define CONFIG_BAUDRATE 115200 |
| 46 | #define CONFIG_BOOTDELAY 3 |
| 47 | #define CONFIG_BOOTARGS "console=ttySC0,115200 root=1f01" |
| c2042f59 |
48 | |
| 49 | #define CONFIG_VERSION_VARIABLE |
| 50 | #undef CONFIG_SHOW_BOOT_PROGRESS |
| 51 | |
| 52 | /* SMC9111 */ |
| 53 | #define CONFIG_DRIVER_SMC91111 |
| 54 | #define CONFIG_SMC91111_BASE (0xB0000000) |
| 55 | |
| 56 | /* MEMORY */ |
| 57 | #define MIGO_R_SDRAM_BASE (0x8C000000) |
| 58 | #define MIGO_R_FLASH_BASE_1 (0xA0000000) |
| 59 | #define MIGO_R_FLASH_BANK_SIZE (64 * 1024 * 1024) |
| 60 | |
| 61 | #define CFG_LONGHELP /* undef to save memory */ |
| 62 | #define CFG_PROMPT "=> " /* Monitor Command Prompt */ |
| 63 | #define CFG_CBSIZE 256 /* Buffer size for input from the Console */ |
| 64 | #define CFG_PBSIZE 256 /* Buffer size for Console output */ |
| 65 | #define CFG_MAXARGS 16 /* max args accepted for monitor commands */ |
| 66 | #define CFG_BARGSIZE 512 /* Buffer size for Boot Arguments passed to kernel */ |
| 67 | #define CFG_BAUDRATE_TABLE { 115200 } /* List of legal baudrate settings for this board */ |
| 68 | |
| 69 | /* SCIF */ |
| 6c58a030 |
70 | #define CONFIG_SCIF_CONSOLE 1 |
| c2042f59 |
71 | #define CONFIG_CONS_SCIF0 1 |
| 72 | #undef CFG_CONSOLE_INFO_QUIET /* Suppress display of console |
| 73 | information at boot */ |
| 74 | #undef CFG_CONSOLE_OVERWRITE_ROUTINE |
| 75 | #undef CFG_CONSOLE_ENV_OVERWRITE |
| 76 | |
| 77 | #define CFG_MEMTEST_START (MIGO_R_SDRAM_BASE) |
| 78 | #define CFG_MEMTEST_END (CFG_MEMTEST_START + (60 * 1024 * 1024)) |
| 79 | |
| 80 | /* Enable alternate, more extensive, memory test */ |
| 81 | #undef CFG_ALT_MEMTEST |
| 82 | /* Scratch address used by the alternate memory test */ |
| 83 | #undef CFG_MEMTEST_SCRATCH |
| 84 | |
| 85 | /* Enable temporary baudrate change while serial download */ |
| 86 | #undef CFG_LOADS_BAUD_CHANGE |
| 87 | |
| 88 | #define CFG_SDRAM_BASE (MIGO_R_SDRAM_BASE) |
| 89 | /* maybe more, but if so u-boot doesn't know about it... */ |
| 90 | #define CFG_SDRAM_SIZE (64 * 1024 * 1024) |
| 91 | /* default load address for scripts ?!? */ |
| 92 | #define CFG_LOAD_ADDR (CFG_SDRAM_BASE + 16 * 1024 * 1024) |
| 93 | |
| 94 | /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */ |
| 95 | #define CFG_MONITOR_BASE (MIGO_R_FLASH_BASE_1) |
| 96 | /* Monitor size */ |
| 97 | #define CFG_MONITOR_LEN (128 * 1024) |
| 98 | /* Size of DRAM reserved for malloc() use */ |
| 99 | #define CFG_MALLOC_LEN (256 * 1024) |
| 100 | /* size in bytes reserved for initial data */ |
| 101 | #define CFG_GBL_DATA_SIZE (256) |
| 102 | #define CFG_BOOTMAPSZ (8 * 1024 * 1024) |
| 103 | |
| 104 | /* FLASH */ |
| 105 | #define CFG_FLASH_CFI |
| 106 | #define CFG_FLASH_CFI_DRIVER |
| 107 | #undef CFG_FLASH_QUIET_TEST |
| 108 | /* print 'E' for empty sector on flinfo */ |
| 109 | #define CFG_FLASH_EMPTY_INFO |
| 110 | /* Physical start address of Flash memory */ |
| 111 | #define CFG_FLASH_BASE (MIGO_R_FLASH_BASE_1) |
| 112 | /* Max number of sectors on each Flash chip */ |
| 113 | #define CFG_MAX_FLASH_SECT 512 |
| 114 | |
| 115 | /* if you use all NOR Flash , you change dip-switch. Please see MIGO_R01 Manual. */ |
| 116 | #define CFG_MAX_FLASH_BANKS 1 |
| 117 | #define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE + (0 * MIGO_R_FLASH_BANK_SIZE) } |
| 118 | |
| 119 | /* Timeout for Flash erase operations (in ms) */ |
| 120 | #define CFG_FLASH_ERASE_TOUT (3 * 1000) |
| 121 | /* Timeout for Flash write operations (in ms) */ |
| 122 | #define CFG_FLASH_WRITE_TOUT (3 * 1000) |
| 123 | /* Timeout for Flash set sector lock bit operations (in ms) */ |
| 124 | #define CFG_FLASH_LOCK_TOUT (3 * 1000) |
| 125 | /* Timeout for Flash clear lock bit operations (in ms) */ |
| 126 | #define CFG_FLASH_UNLOCK_TOUT (3 * 1000) |
| 127 | |
| 128 | /* Use hardware flash sectors protection instead of U-Boot software protection */ |
| 129 | #undef CFG_FLASH_PROTECTION |
| 130 | #undef CFG_DIRECT_FLASH_TFTP |
| 131 | |
| 132 | /* ENV setting */ |
| 133 | #define CFG_ENV_IS_IN_FLASH |
| 134 | #define CONFIG_ENV_OVERWRITE 1 |
| 135 | #define CFG_ENV_SECT_SIZE (128 * 1024) |
| 136 | #define CFG_ENV_SIZE (CFG_ENV_SECT_SIZE) |
| 137 | #define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_MONITOR_LEN) |
| 138 | /* Offset of env Flash sector relative to CFG_FLASH_BASE */ |
| 139 | #define CFG_ENV_OFFSET (CFG_ENV_ADDR - CFG_FLASH_BASE) |
| 140 | #define CFG_ENV_SIZE_REDUND (CFG_ENV_SECT_SIZE) |
| 141 | |
| 142 | /* Board Clock */ |
| 143 | #define CONFIG_SYS_CLK_FREQ 33333333 |
| 144 | #define TMU_CLK_DIVIDER (4) /* 4 (default), 16, 64, 256 or 1024 */ |
| 145 | #define CFG_HZ (CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER) |
| 146 | |
| 147 | #endif /* __MIGO_R_H */ |
projects / people / ms / u-boot.git / blame