[people/ms/u-boot.git] / include / configs / SX1.h

/*
 * (C) Copyright 2004
 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */
#ifndef __CONFIG_H
#define __CONFIG_H

/*
 * High Level Configuration Options
 * (easy to change)
 */
#define CONFIG_ARM925T	1		/* This is an arm925t CPU	*/
#define CONFIG_OMAP	1		/* in a TI OMAP core	*/
#define CONFIG_OMAP1510 1		/* which is in a 1510 (helen) */
#define CONFIG_OMAP_SX1 1		/*	a SX1 Board  */

/* input clock of PLL */
#define CONFIG_SYS_CLK_FREQ	12000000	/* the SX1 has 12MHz input clock */

#undef CONFIG_USE_IRQ			/* we don't need IRQ/FIQ stuff */

#define CONFIG_MISC_INIT_R

#define CONFIG_CMDLINE_TAG	 1	/* enable passing of ATAGs	*/
#define CONFIG_SETUP_MEMORY_TAGS 1
#define CONFIG_INITRD_TAG	 1

/*
 * Size of malloc() pool
 */
#define CFG_MALLOC_LEN		(CONFIG_ENV_SIZE + 128*1024)
#define CFG_GBL_DATA_SIZE	128	/* size in bytes reserved for initial data */

/*
 * Hardware drivers
 */

/*
 * NS16550 Configuration
 */
#define CFG_NS16550
#define CFG_NS16550_SERIAL
#define CFG_NS16550_REG_SIZE	(-4)
#define CFG_NS16550_CLK		(CONFIG_SYS_CLK_FREQ)	/* can be 12M/32Khz or 48Mhz  */
#define CFG_NS16550_COM1	0xfffb0000		/* uart1, bluetooth uart on helen */

/*
 * select serial console configuration
 */
#define CONFIG_SERIAL1		1	/* we use SERIAL 1 on SX1 */

/*
 * USB device configuration
 */
#define CONFIG_USB_DEVICE	1
#define CONFIG_USB_TTY		1

#define CONFIG_USBD_VENDORID		0x1234
#define CONFIG_USBD_PRODUCTID		0x5678
#define CONFIG_USBD_MANUFACTURER	"Siemens"
#define CONFIG_USBD_PRODUCT_NAME	"SX1"

/*
 * I2C configuration
 */
#define CONFIG_HARD_I2C
#define CFG_I2C_SPEED		100000
#define CFG_I2C_SLAVE		1
#define CONFIG_DRIVER_OMAP1510_I2C

#define CONFIG_ENV_OVERWRITE

#define CONFIG_ENV_OVERWRITE
#define CONFIG_CONS_INDEX	1
#define CONFIG_BAUDRATE		115200
#define CFG_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }


/*
 * BOOTP options
 */
#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME


/*
 * Command line configuration.
 */
#include <config_cmd_default.h>

#define CONFIG_CMD_I2C

#undef CONFIG_CMD_NET


#include <configs/omap1510.h>

#define CONFIG_BOOTARGS		"mem=16M console=ttyS0,115200n8 root=/dev/mtdblock3 rw"
#define CONFIG_PREBOOT		"setenv stdout usbtty;setenv stdin usbtty"

/*
 * Miscellaneous configurable options
 */
#define CFG_LONGHELP				/* undef to save memory		*/
#define CFG_PROMPT		"SX1# " /* Monitor Command Prompt	*/
#define CFG_CBSIZE		256		/* Console I/O Buffer Size	*/
#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
#define CFG_MAXARGS		16		/* max number of command args	*/
#define CFG_BARGSIZE		CFG_CBSIZE	/* Boot Argument Buffer Size	*/

#define CFG_MEMTEST_START	0x10000000	/* memtest works on	*/
#define CFG_MEMTEST_END		0x12000000	/* 32 MB in DRAM	*/

#undef	CFG_CLKS_IN_HZ		/* everything, incl board info, in Hz */

#define CFG_LOAD_ADDR		0x10000000	/* default load address */

/* The 1510 has 3 timers, they can be driven by the RefClk (12Mhz) or by DPLL1.
 * This time is further subdivided by a local divisor.
 */
#define CFG_TIMERBASE	0xFFFEC500	    /* use timer 1 */
#define CFG_PVT		7		    /* 2^(pvt+1), divide by 256 */
#define CFG_HZ			((CONFIG_SYS_CLK_FREQ)/(2 << CFG_PVT))

/*-----------------------------------------------------------------------
 * Stack sizes
 *
 * The stack sizes are set up in start.S using the settings below
 */
#define CONFIG_STACKSIZE	(128*1024)	/* regular stack */
#ifdef CONFIG_USE_IRQ
#define CONFIG_STACKSIZE_IRQ	(4*1024)	/* IRQ stack */
#define CONFIG_STACKSIZE_FIQ	(4*1024)	/* FIQ stack */
#endif

/*-----------------------------------------------------------------------
 * Physical Memory Map
 */
#define CONFIG_NR_DRAM_BANKS	1	   /* we have 1 bank of DRAM */
#define PHYS_SDRAM_1		0x10000000 /* SDRAM Bank #1 */
#define PHYS_SDRAM_1_SIZE	0x02000000 /* 32 MB */

#define PHYS_FLASH_1		0x00000000 /* Flash Bank #1 */
#define PHYS_FLASH_2		0x04000000 /* Flash Bank #2 */

#define CFG_FLASH_BASE		PHYS_FLASH_1

/*-----------------------------------------------------------------------
 * FLASH and environment organization
 */
#define CFG_MAX_FLASH_BANKS	2	/* max number of memory banks */
#define PHYS_FLASH_SIZE		(16 << 10) /* 16 MB */
#define PHYS_FLASH_SECT_SIZE	(128*1024) /* Size of a sector (128kB) */
#define CFG_MAX_FLASH_SECT	(128)	/* max number of sectors on one chip */
#define CONFIG_ENV_ADDR	(CFG_FLASH_BASE + PHYS_FLASH_SECT_SIZE) /* addr of environment */
#define CFG_MONITOR_BASE	CFG_FLASH_BASE	/* Monitor at beginning of flash */
#define CFG_MONITOR_LEN		PHYS_FLASH_SECT_SIZE	/* Reserve 1 sector */
#define CFG_FLASH_BANKS_LIST	{ CFG_FLASH_BASE, CFG_FLASH_BASE + PHYS_FLASH_SIZE }

/*-----------------------------------------------------------------------
 * FLASH driver setup
 */
#define CFG_FLASH_CFI		1	/* Flash memory is CFI compliant */
#define CONFIG_FLASH_CFI_DRIVER	1	/* Use drivers/mtd/cfi_flash.c */
#define CFG_FLASH_USE_BUFFER_WRITE 1	/* Use buffered writes (~10x faster) */
#define CFG_FLASH_PROTECTION	1	/* Use hardware sector protection */

/* timeout values are in ticks */
#define CFG_FLASH_ERASE_TOUT	(20*CFG_HZ) /* Timeout for Flash Erase */
#define CFG_FLASH_WRITE_TOUT	(20*CFG_HZ) /* Timeout for Flash Write */

#define CONFIG_ENV_IS_IN_FLASH	1
#define CONFIG_ENV_SECT_SIZE	PHYS_FLASH_SECT_SIZE
#define CONFIG_ENV_SIZE		CONFIG_ENV_SECT_SIZE /* Total Size of Environment Sector */
#define CONFIG_ENV_OFFSET	( CFG_MONITOR_BASE + CFG_MONITOR_LEN ) /* Environment after Monitor */

/* Address and size of Redundant Environment Sector	*/
#define CONFIG_ENV_SIZE_REDUND	0x20000
#define CONFIG_ENV_OFFSET_REDUND	0x40000

#endif	/* __CONFIG_H */
Commit	Line	Data
232c150a WD	1	/*
	2	* (C) Copyright 2004
	3	* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
	4	*
	5	* See file CREDITS for list of people who contributed to this
	6	* project.
	7	*
	8	* This program is free software; you can redistribute it and/or
	9	* modify it under the terms of the GNU General Public License as
	10	* published by the Free Software Foundation; either version 2 of
	11	* the License, or (at your option) any later version.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program; if not, write to the Free Software
	20	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	21	* MA 02111-1307 USA
	22	*/
	23	#ifndef __CONFIG_H
	24	#define __CONFIG_H
	25
232c150a WD	26	/*
	27	* High Level Configuration Options
	28	* (easy to change)
	29	*/
	30	#define CONFIG_ARM925T 1 /* This is an arm925t CPU */
	31	#define CONFIG_OMAP 1 /* in a TI OMAP core */
	32	#define CONFIG_OMAP1510 1 /* which is in a 1510 (helen) */
	33	#define CONFIG_OMAP_SX1 1 /* a SX1 Board */
	34
	35	/* input clock of PLL */
	36	#define CONFIG_SYS_CLK_FREQ 12000000 /* the SX1 has 12MHz input clock */
	37
	38	#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
	39
	40	#define CONFIG_MISC_INIT_R
	41
	42	#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
	43	#define CONFIG_SETUP_MEMORY_TAGS 1
	44	#define CONFIG_INITRD_TAG 1
	45
	46	/*
	47	* Size of malloc() pool
	48	*/
0e8d1586	49	#define CFG_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
232c150a WD	50	#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
	51
	52	/*
	53	* Hardware drivers
	54	*/
	55
	56	/*
	57	* NS16550 Configuration
	58	*/
	59	#define CFG_NS16550
	60	#define CFG_NS16550_SERIAL
	61	#define CFG_NS16550_REG_SIZE (-4)
	62	#define CFG_NS16550_CLK (CONFIG_SYS_CLK_FREQ) /* can be 12M/32Khz or 48Mhz */
	63	#define CFG_NS16550_COM1 0xfffb0000 /* uart1, bluetooth uart on helen */
	64
	65	/*
	66	* select serial console configuration
	67	*/
	68	#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on SX1 */
	69
	70	/*
	71	* USB device configuration
	72	*/
	73	#define CONFIG_USB_DEVICE 1
	74	#define CONFIG_USB_TTY 1
	75
	76	#define CONFIG_USBD_VENDORID 0x1234
	77	#define CONFIG_USBD_PRODUCTID 0x5678
	78	#define CONFIG_USBD_MANUFACTURER "Siemens"
	79	#define CONFIG_USBD_PRODUCT_NAME "SX1"
232c150a WD	80
	81	/*
	82	* I2C configuration
	83	*/
	84	#define CONFIG_HARD_I2C
	85	#define CFG_I2C_SPEED 100000
	86	#define CFG_I2C_SLAVE 1
	87	#define CONFIG_DRIVER_OMAP1510_I2C
	88
	89	#define CONFIG_ENV_OVERWRITE
	90
	91	#define CONFIG_ENV_OVERWRITE
	92	#define CONFIG_CONS_INDEX 1
	93	#define CONFIG_BAUDRATE 115200
	94	#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
	95
232c150a	96
a1aa0bb5 JL	97	/*
	98	* BOOTP options
	99	*/
	100	#define CONFIG_BOOTP_BOOTFILESIZE
	101	#define CONFIG_BOOTP_BOOTPATH
	102	#define CONFIG_BOOTP_GATEWAY
	103	#define CONFIG_BOOTP_HOSTNAME
	104
	105
fe7f782d JL	106	/*
	107	* Command line configuration.
	108	*/
	109	#include <config_cmd_default.h>
	110
	111	#define CONFIG_CMD_I2C
	112
	113	#undef CONFIG_CMD_NET
	114
	115
232c150a WD	116	#include <configs/omap1510.h>
232c150a WD	117
232c150a	118	#define CONFIG_BOOTARGS "mem=16M console=ttyS0,115200n8 root=/dev/mtdblock3 rw"
6629d2f2	119	#define CONFIG_PREBOOT "setenv stdout usbtty;setenv stdin usbtty"
232c150a WD	120
	121	/*
	122	* Miscellaneous configurable options
	123	*/
	124	#define CFG_LONGHELP /* undef to save memory */
	125	#define CFG_PROMPT "SX1# " /* Monitor Command Prompt */
	126	#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
	127	#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
	128	#define CFG_MAXARGS 16 /* max number of command args */
	129	#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
	130
	131	#define CFG_MEMTEST_START 0x10000000 /* memtest works on */
	132	#define CFG_MEMTEST_END 0x12000000 /* 32 MB in DRAM */
	133
	134	#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
	135
	136	#define CFG_LOAD_ADDR 0x10000000 /* default load address */
	137
	138	/* The 1510 has 3 timers, they can be driven by the RefClk (12Mhz) or by DPLL1.
	139	* This time is further subdivided by a local divisor.
	140	*/
	141	#define CFG_TIMERBASE 0xFFFEC500 /* use timer 1 */
	142	#define CFG_PVT 7 /* 2^(pvt+1), divide by 256 */
	143	#define CFG_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CFG_PVT))
	144
	145	/*-----------------------------------------------------------------------
	146	* Stack sizes
	147	*
	148	* The stack sizes are set up in start.S using the settings below
	149	*/
	150	#define CONFIG_STACKSIZE (1281024) / regular stack */
	151	#ifdef CONFIG_USE_IRQ
	152	#define CONFIG_STACKSIZE_IRQ (41024) / IRQ stack */
	153	#define CONFIG_STACKSIZE_FIQ (41024) / FIQ stack */
	154	#endif
	155
	156	/*-----------------------------------------------------------------------
	157	* Physical Memory Map
	158	*/
	159	#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
	160	#define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */
	161	#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
	162
	163	#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
	164	#define PHYS_FLASH_2 0x04000000 /* Flash Bank #2 */
	165
	166	#define CFG_FLASH_BASE PHYS_FLASH_1
	167
	168	/*-----------------------------------------------------------------------
	169	* FLASH and environment organization
	170	*/
	171	#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */
656658dd WD	172	#define PHYS_FLASH_SIZE (16 << 10) /* 16 MB */
656658dd WD	173	#define PHYS_FLASH_SECT_SIZE (1281024) / Size of a sector (128kB) */
232c150a	174	#define CFG_MAX_FLASH_SECT (128) /* max number of sectors on one chip */
0e8d1586	175	#define CONFIG_ENV_ADDR (CFG_FLASH_BASE + PHYS_FLASH_SECT_SIZE) /* addr of environment */
656658dd WD	176	#define CFG_MONITOR_BASE CFG_FLASH_BASE /* Monitor at beginning of flash */
	177	#define CFG_MONITOR_LEN PHYS_FLASH_SECT_SIZE /* Reserve 1 sector */
	178	#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE, CFG_FLASH_BASE + PHYS_FLASH_SIZE }
	179
	180	/*-----------------------------------------------------------------------
	181	* FLASH driver setup
	182	*/
	183	#define CFG_FLASH_CFI 1 /* Flash memory is CFI compliant */
00b1883a	184	#define CONFIG_FLASH_CFI_DRIVER 1 /* Use drivers/mtd/cfi_flash.c */
656658dd WD	185	#define CFG_FLASH_USE_BUFFER_WRITE 1 /* Use buffered writes (~10x faster) */
656658dd WD	186	#define CFG_FLASH_PROTECTION 1 /* Use hardware sector protection */
232c150a WD	187
	188	/* timeout values are in ticks */
	189	#define CFG_FLASH_ERASE_TOUT (20CFG_HZ) / Timeout for Flash Erase */
	190	#define CFG_FLASH_WRITE_TOUT (20CFG_HZ) / Timeout for Flash Write */
	191
5a1aceb0	192	#define CONFIG_ENV_IS_IN_FLASH 1
0e8d1586 JCPV	193	#define CONFIG_ENV_SECT_SIZE PHYS_FLASH_SECT_SIZE
	194	#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE /* Total Size of Environment Sector */
	195	#define CONFIG_ENV_OFFSET ( CFG_MONITOR_BASE + CFG_MONITOR_LEN ) /* Environment after Monitor */
232c150a	196
6629d2f2	197	/* Address and size of Redundant Environment Sector */
0e8d1586 JCPV	198	#define CONFIG_ENV_SIZE_REDUND 0x20000
0e8d1586 JCPV	199	#define CONFIG_ENV_OFFSET_REDUND 0x40000
6629d2f2	200
232c150a	201	#endif /* __CONFIG_H */