[people/ms/u-boot.git] / include / configs / XPEDITE1000.h

/*
 * (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com>
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

/*
 * config for XPedite1000 from XES Inc.
 * Ported from EBONY config by Travis B. Sawyer <tsawyer@sandburst.com>
 * (C) Copyright 2003 Sandburst Corporation
 * board/config_EBONY.h - configuration for AMCC 440GP Ref (Ebony)
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/* High Level Configuration Options */
#define CONFIG_XPEDITE1000	1
#define CONFIG_SYS_BOARD_NAME	"XPedite1000"
#define CONFIG_4xx		1		/* ... PPC4xx family */
#define CONFIG_440		1
#define CONFIG_440GX		1		/* 440 GX */
#define CONFIG_BOARD_EARLY_INIT_F 1		/* Call board_pre_init	*/
#define CONFIG_SYS_CLK_FREQ	33333333	/* external freq to pll */

/*
 * DDR config
 */
#define CONFIG_SPD_EEPROM		/* Use SPD EEPROM for setup */
#define SPD_EEPROM_ADDRESS	{0x54}	/* SPD i2c spd addresses */
#define CONFIG_VERY_BIG_RAM	1

/*
 * Base addresses -- Note these are effective addresses where the
 * actual resources get mapped (not physical addresses)
 */
#define CONFIG_SYS_SDRAM_BASE		0x00000000
#define CONFIG_SYS_FLASH_BASE		0xff000000	/* start of FLASH */
#define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_TEXT_BASE	/* start of monitor */
#define CONFIG_SYS_PCI_MEMBASE		0x80000000	/* mapped pci memory */
#define CONFIG_SYS_ISRAM_BASE		0xc0000000	/* internal SRAM */
#define CONFIG_SYS_PCI_BASE		0xd0000000	/* internal PCI regs */
#define CONFIG_SYS_NVRAM_BASE_ADDR	(CONFIG_SYS_PERIPHERAL_BASE + 0x08000000)
#define CONFIG_SYS_GPIO_BASE		(CONFIG_SYS_PERIPHERAL_BASE + 0x00000700)

/*
 * Diagnostics
 */
#define CONFIG_SYS_ALT_MEMTEST
#define CONFIG_SYS_MEMTEST_START	0x0400000
#define CONFIG_SYS_MEMTEST_END		0x0C00000

/* POST support */
#define CONFIG_POST		(CONFIG_SYS_POST_RTC	| \
				 CONFIG_SYS_POST_I2C)

/*
 * LED support
 */
#define USR_LED0	0x00000080
#define USR_LED1	0x00000100
#define USR_LED2	0x00000200
#define USR_LED3	0x00000400

#ifndef __ASSEMBLY__
extern unsigned long in32(unsigned int);
extern void out32(unsigned int, unsigned long);

#define LED0_ON() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) & ~USR_LED0))
#define LED1_ON() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) & ~USR_LED1))
#define LED2_ON() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) & ~USR_LED2))
#define LED3_ON() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) & ~USR_LED3))

#define LED0_OFF() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) | USR_LED0))
#define LED1_OFF() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) | USR_LED1))
#define LED2_OFF() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) | USR_LED2))
#define LED3_OFF() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) | USR_LED3))
#endif

/*
 * Use internal SRAM for initial stack
 */
#define CONFIG_SYS_TEMP_STACK_OCM	1
#define CONFIG_SYS_OCM_DATA_ADDR	CONFIG_SYS_ISRAM_BASE
#define CONFIG_SYS_INIT_RAM_ADDR	CONFIG_SYS_ISRAM_BASE	/* Initial RAM address */
#define CONFIG_SYS_INIT_RAM_END		0x2000	/* End of used area in RAM */
#define CONFIG_SYS_GBL_DATA_SIZE	128	/* num bytes initial data */
#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET	(CONFIG_SYS_GBL_DATA_OFFSET - 0x4)

#define CONFIG_SYS_MONITOR_LEN	(512 * 1024)	/* Reserve 512 KB for Mon */
#define CONFIG_SYS_MALLOC_LEN	(1024 * 1024)	/* Reserved for malloc */

/*
 * Serial Port
 */
#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE	1
#define CONFIG_SYS_NS16550_CLK		get_serial_clock()

#define CONFIG_SYS_BAUDRATE_TABLE \
	{300, 600, 1200, 2400, 4800, 9600, 19200, 38400}
#define CONFIG_BAUDRATE			115200
#define CONFIG_LOADS_ECHO		1	/* echo on for serial download */
#define CONFIG_SYS_LOADS_BAUD_CHANGE	1	/* allow baudrate change */

/*
 * Use the HUSH parser
 */
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_PROMPT_HUSH_PS2	"> "

/*
 * NOR flash configuration
 */
#define CONFIG_SYS_MAX_FLASH_BANKS	3
#define CONFIG_SYS_FLASH_BANKS_LIST	{CONFIG_SYS_FLASH_BASE, 0xf0000000, 0xf4000000 }
#define CONFIG_SYS_MAX_FLASH_SECT	512	/* sectors per device */
#define CONFIG_FLASH_CFI_DRIVER
#define CONFIG_SYS_FLASH_CFI
#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
#define CONFIG_SYS_FLASH_QUIET_TEST		/* MirrorBit flashes are optional */
#define CONFIG_SYS_FLASH_ERASE_TOUT	120000	/* Timeout for Flash Erase (in ms) */
#define CONFIG_SYS_FLASH_WRITE_TOUT	500	/* Timeout for Flash Write (in ms) */

/*
 * I2C
 */
#define CONFIG_HARD_I2C			1	/* I2C with hardware support */
#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
#define CONFIG_SYS_I2C_SPEED		400000	/* I2C speed and slave address */
#define CONFIG_SYS_I2C_SLAVE		0x7f
#define CONFIG_I2C_MULTI_BUS

/* I2C EEPROM */
#define CONFIG_SYS_I2C_EEPROM_ADDR		0x50
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		1
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	3
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	10

/* I2C RTC: STMicro M41T00 */
#define CONFIG_RTC_M41T11		1
#define CONFIG_SYS_I2C_RTC_ADDR		0x68
#define CONFIG_SYS_M41T11_BASE_YEAR	2000

/*
 * PCI
 */
/* General PCI */
#define CONFIG_PCI				/* include pci support */
#define CONFIG_PCI_PNP				/* do pci plug-and-play */
#define CONFIG_PCI_SCAN_SHOW			/* show pci devices on startup */
#define CONFIG_SYS_PCI_TARGBASE	0x80000000	/* PCIaddr mapped to CONFIG_SYS_PCI_MEMBASE */

/* Board-specific PCI */
#define CONFIG_SYS_PCI_TARGET_INIT		/* let board init pci target */
#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x1014	/* IBM */
#define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0xcafe	/* Whatever */
#define CONFIG_SYS_PCI_FORCE_PCI_CONV		/* Force PCI Conventional Mode */

/*
 * Networking options
 */
#define CONFIG_PPC4xx_EMAC
#define CONFIG_PHY_GIGE		1	/* Include GbE speed/duplex detection */
#define CONFIG_NET_MULTI	1
#define CONFIG_MII		1	/* MII PHY management */
#define CONFIG_PHY_RESET	1	/* reset phy upon startup */
#define CONFIG_SYS_RX_ETH_BUFFER 32	/* Number of ethernet rx buffers & descriptors */
#define CONFIG_ETHPRIME		"ppc_4xx_eth2"
#define CONFIG_PHY_ADDR		4	/* PHY address phy0 not populated */
#define CONFIG_PHY2_ADDR	4	/* PHY address phy2 */
#define CONFIG_HAS_ETH2		1	/* add support for "eth2addr" */
#define CONFIG_PHY3_ADDR	8	/* PHY address phy3 */
#define CONFIG_HAS_ETH3		1	/* add support for "eth3addr" */

/* BOOTP options */
#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME

/*
 * Command configuration
 */
#include <config_cmd_default.h>

#define CONFIG_CMD_ASKENV
#define CONFIG_CMD_DATE
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_ELF
#define CONFIG_CMD_FLASH
#define CONFIG_CMD_I2C
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_JFFS2
#define CONFIG_CMD_MII
#define CONFIG_CMD_NET
#define CONFIG_CMD_PCI
#define CONFIG_CMD_PING
#define CONFIG_CMD_SAVEENV
#define CONFIG_CMD_SNTP

/*
 * Miscellaneous configurable options
 */
#define CONFIG_SYS_LONGHELP			/* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR	0x100000	/* default load address */
#define CONFIG_SYS_PROMPT	"=> "		/* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE	256		/* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
#define CONFIG_SYS_MAXARGS	16		/* max number of command args */
#define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size */
#define CONFIG_SYS_HZ		1000		/* decrementer freq: 1 ms ticks */
#define CONFIG_CMDLINE_EDITING	1		/* Command-line editing */
#define CONFIG_BOOTDELAY	3		/* -1 disables auto-boot */
#define CONFIG_PANIC_HANG			/* do not reset board on panic */
#define CONFIG_PREBOOT				/* enable preboot variable */
#define CONFIG_FIT		1
#define CONFIG_FIT_VERBOSE	1
#define CONFIG_INTEGRITY			/* support booting INTEGRITY OS */
#define CONFIG_SYS_EXTBDINFO	1		/* To use extended board_into (bd_t) */

/*
 * For booting Linux, the board info and command line data
 * have to be in the first 8 MB of memory, since this is
 * the maximum mapped by the Linux kernel during initialization.
 */
#define CONFIG_SYS_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux */

/*
 * Boot Flags
 */
#define BOOTFLAG_COLD	0x01		/* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM	0x02		/* Software reboot */

/*
 * Environment Configuration
 */
#define CONFIG_ENV_IS_IN_FLASH	1
#define CONFIG_ENV_SECT_SIZE	0x20000 /* 128k (one sector) for env */
#define CONFIG_ENV_SIZE		0x8000
#define CONFIG_ENV_ADDR		(CONFIG_SYS_MONITOR_BASE - (256 * 1024))

/*
 * Flash memory map:
 * fff80000 - ffffffff	U-Boot (512 KB)
 * fff40000 - fff7ffff	U-Boot Environment (256 KB)
 * fff00000 - fff3ffff	FDT (256KB)
 * ffc00000 - ffefffff	OS image (3MB)
 * ff000000 - ffbfffff	OS Use/Filesystem (12MB)
 */

#define CONFIG_UBOOT_ENV_ADDR	MK_STR(CONFIG_SYS_TEXT_BASE)
#define CONFIG_FDT_ENV_ADDR	MK_STR(0xfff00000)
#define CONFIG_OS_ENV_ADDR	MK_STR(0xffc00000)

#define CONFIG_PROG_UBOOT						\
	"$download_cmd $loadaddr $ubootfile; "				\
	"if test $? -eq 0; then "					\
		"protect off "CONFIG_UBOOT_ENV_ADDR" +80000; "		\
		"erase "CONFIG_UBOOT_ENV_ADDR" +80000; "		\
		"cp.w $loadaddr "CONFIG_UBOOT_ENV_ADDR" 40000; "	\
		"protect on "CONFIG_UBOOT_ENV_ADDR" +80000; "		\
		"cmp.b $loadaddr "CONFIG_UBOOT_ENV_ADDR" 80000; "	\
		"if test $? -ne 0; then "				\
			"echo PROGRAM FAILED; "				\
		"else; "						\
			"echo PROGRAM SUCCEEDED; "			\
		"fi; "							\
	"else; "							\
		"echo DOWNLOAD FAILED; "				\
	"fi;"

#define CONFIG_BOOT_OS_NET						\
	"$download_cmd $osaddr $osfile; "				\
	"if test $? -eq 0; then "					\
		"if test -n $fdtaddr; then "				\
			"$download_cmd $fdtaddr $fdtfile; "		\
			"if test $? -eq 0; then "			\
				"bootm $osaddr - $fdtaddr; "		\
			"else; "					\
				"echo FDT DOWNLOAD FAILED; "		\
			"fi; "						\
		"else; "						\
			"bootm $osaddr; "				\
		"fi; "							\
	"else; "							\
		"echo OS DOWNLOAD FAILED; "				\
	"fi;"

#define CONFIG_PROG_OS							\
	"$download_cmd $osaddr $osfile; "				\
	"if test $? -eq 0; then "					\
		"erase "CONFIG_OS_ENV_ADDR" +$filesize; "		\
		"cp.b $osaddr "CONFIG_OS_ENV_ADDR" $filesize; "		\
		"cmp.b $osaddr "CONFIG_OS_ENV_ADDR" $filesize; "	\
		"if test $? -ne 0; then "				\
			"echo OS PROGRAM FAILED; "			\
		"else; "						\
			"echo OS PROGRAM SUCCEEDED; "			\
		"fi; "							\
	"else; "							\
		"echo OS DOWNLOAD FAILED; "				\
	"fi;"

#define CONFIG_PROG_FDT							\
	"$download_cmd $fdtaddr $fdtfile; "				\
	"if test $? -eq 0; then "					\
		"erase "CONFIG_FDT_ENV_ADDR" +$filesize;"		\
		"cp.b $fdtaddr "CONFIG_FDT_ENV_ADDR" $filesize; "	\
		"cmp.b $fdtaddr "CONFIG_FDT_ENV_ADDR" $filesize; "	\
		"if test $? -ne 0; then "				\
			"echo FDT PROGRAM FAILED; "			\
		"else; "						\
			"echo FDT PROGRAM SUCCEEDED; "			\
		"fi; "							\
	"else; "							\
		"echo FDT DOWNLOAD FAILED; "				\
	"fi;"

#define	CONFIG_EXTRA_ENV_SETTINGS					\
	"autoload=yes\0"						\
	"download_cmd=tftp\0"						\
	"console_args=console=ttyS0,115200\0"				\
	"root_args=root=/dev/nfs rw\0"					\
	"misc_args=ip=on\0"						\
	"set_bootargs=setenv bootargs ${console_args} ${root_args} ${misc_args}\0" \
	"bootfile=/home/user/file\0"					\
	"osfile=/home/user/uImage-XPedite1000\0"			\
	"fdtfile=/home/user/xpedite1000.dtb\0"				\
	"ubootfile=/home/user/u-boot.bin\0"				\
	"fdtaddr=c00000\0"						\
	"osaddr=0x1000000\0"						\
	"loadaddr=0x1000000\0"						\
	"prog_uboot="CONFIG_PROG_UBOOT"\0"				\
	"prog_os="CONFIG_PROG_OS"\0"					\
	"prog_fdt="CONFIG_PROG_FDT"\0"					\
	"bootcmd_net=run set_bootargs; "CONFIG_BOOT_OS_NET"\0"		\
	"bootcmd_flash=run set_bootargs; "				\
		"bootm "CONFIG_OS_ENV_ADDR" - "CONFIG_FDT_ENV_ADDR"\0"	\
	"bootcmd=run bootcmd_flash\0"
#endif	/* __CONFIG_H */
Commit	Line	Data
ba56f625 WD	1	/*
	2	* (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com>
	3	*
	4	* See file CREDITS for list of people who contributed to this
	5	* project.
	6	*
	7	* This program is free software; you can redistribute it and/or
	8	* modify it under the terms of the GNU General Public License as
	9	* published by the Free Software Foundation; either version 2 of
	10	* the License, or (at your option) any later version.
	11	*
	12	* This program is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	* GNU General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License
	18	* along with this program; if not, write to the Free Software
	19	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	20	* MA 02111-1307 USA
	21	*/
	22
e0299076	23	/*
ba56f625 WD	24	* config for XPedite1000 from XES Inc.
	25	* Ported from EBONY config by Travis B. Sawyer <tsawyer@sandburst.com>
	26	* (C) Copyright 2003 Sandburst Corporation
0c8721a4	27	* board/config_EBONY.h - configuration for AMCC 440GP Ref (Ebony)
e0299076	28	*/
ba56f625 WD	29
	30	#ifndef __CONFIG_H
	31	#define __CONFIG_H
	32
e0299076	33	/* High Level Configuration Options */
10c1b218	34	#define CONFIG_XPEDITE1000 1
54381b79	35	#define CONFIG_SYS_BOARD_NAME "XPedite1000"
e0299076	36	#define CONFIG_4xx 1 /* ... PPC4xx family */
ba56f625	37	#define CONFIG_440 1
846b0dd2	38	#define CONFIG_440GX 1 /* 440 GX */
3c74e32a	39	#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
ba56f625 WD	40	#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
ba56f625 WD	41
4cdad5f4 PT	42	/*
	43	* DDR config
	44	*/
	45	#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for setup */
	46	#define SPD_EEPROM_ADDRESS {0x54} /* SPD i2c spd addresses */
	47	#define CONFIG_VERY_BIG_RAM 1
ba56f625	48
e0299076	49	/*
ba56f625 WD	50	* Base addresses -- Note these are effective addresses where the
ba56f625 WD	51	* actual resources get mapped (not physical addresses)
e0299076	52	*/
4cdad5f4 PT	53	#define CONFIG_SYS_SDRAM_BASE 0x00000000
4cdad5f4 PT	54	#define CONFIG_SYS_FLASH_BASE 0xff000000 /* start of FLASH */
14d0a02a	55	#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
4cdad5f4	56	#define CONFIG_SYS_PCI_MEMBASE 0x80000000 /* mapped pci memory */
4cdad5f4 PT	57	#define CONFIG_SYS_ISRAM_BASE 0xc0000000 /* internal SRAM */
4cdad5f4 PT	58	#define CONFIG_SYS_PCI_BASE 0xd0000000 /* internal PCI regs */
e0299076 PT	59	#define CONFIG_SYS_NVRAM_BASE_ADDR (CONFIG_SYS_PERIPHERAL_BASE + 0x08000000)
e0299076 PT	60	#define CONFIG_SYS_GPIO_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x00000700)
ba56f625	61
4cdad5f4 PT	62	/*
	63	* Diagnostics
	64	*/
9b4ef1f5	65	#define CONFIG_SYS_ALT_MEMTEST
4cdad5f4 PT	66	#define CONFIG_SYS_MEMTEST_START 0x0400000
	67	#define CONFIG_SYS_MEMTEST_END 0x0C00000
	68
	69	/* POST support */
	70	#define CONFIG_POST (CONFIG_SYS_POST_RTC \| \
	71	CONFIG_SYS_POST_I2C)
	72
	73	/*
	74	* LED support
	75	*/
e0299076 PT	76	#define USR_LED0 0x00000080
	77	#define USR_LED1 0x00000100
	78	#define USR_LED2 0x00000200
	79	#define USR_LED3 0x00000400
ba56f625 WD	80
	81	#ifndef __ASSEMBLY__
	82	extern unsigned long in32(unsigned int);
	83	extern void out32(unsigned int, unsigned long);
	84
6d0f6bcf JCPV	85	#define LED0_ON() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) & ~USR_LED0))
	86	#define LED1_ON() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) & ~USR_LED1))
	87	#define LED2_ON() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) & ~USR_LED2))
	88	#define LED3_ON() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) & ~USR_LED3))
ba56f625	89
6d0f6bcf JCPV	90	#define LED0_OFF() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) \| USR_LED0))
	91	#define LED1_OFF() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) \| USR_LED1))
	92	#define LED2_OFF() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) \| USR_LED2))
	93	#define LED3_OFF() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) \| USR_LED3))
ba56f625 WD	94	#endif
ba56f625 WD	95
4cdad5f4 PT	96	/*
	97	* Use internal SRAM for initial stack
	98	*/
e0299076 PT	99	#define CONFIG_SYS_TEMP_STACK_OCM 1
	100	#define CONFIG_SYS_OCM_DATA_ADDR CONFIG_SYS_ISRAM_BASE
	101	#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_ISRAM_BASE /* Initial RAM address */
	102	#define CONFIG_SYS_INIT_RAM_END 0x2000 /* End of used area in RAM */
	103	#define CONFIG_SYS_GBL_DATA_SIZE 128 /* num bytes initial data */
e0299076	104	#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
800eb096	105	#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
ba56f625	106
9b4ef1f5 PT	107	#define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 KB for Mon */
9b4ef1f5 PT	108	#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Reserved for malloc */
ba56f625	109
4cdad5f4 PT	110	/*
	111	* Serial Port
	112	*/
550650dd SR	113	#define CONFIG_CONS_INDEX 1 /* Use UART0 */
	114	#define CONFIG_SYS_NS16550
	115	#define CONFIG_SYS_NS16550_SERIAL
	116	#define CONFIG_SYS_NS16550_REG_SIZE 1
	117	#define CONFIG_SYS_NS16550_CLK get_serial_clock()
	118
e0299076 PT	119	#define CONFIG_SYS_BAUDRATE_TABLE \
e0299076 PT	120	{300, 600, 1200, 2400, 4800, 9600, 19200, 38400}
9b4ef1f5	121	#define CONFIG_BAUDRATE 115200
4cdad5f4 PT	122	#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
4cdad5f4 PT	123	#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
ba56f625	124
9b4ef1f5 PT	125	/*
	126	* Use the HUSH parser
	127	*/
	128	#define CONFIG_SYS_HUSH_PARSER
	129	#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
	130
e0299076	131	/*
4cdad5f4	132	* NOR flash configuration
e0299076	133	*/
42735815 PT	134	#define CONFIG_SYS_MAX_FLASH_BANKS 3
	135	#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE, 0xf0000000, 0xf4000000 }
	136	#define CONFIG_SYS_MAX_FLASH_SECT 512 /* sectors per device */
11ad309c PT	137	#define CONFIG_FLASH_CFI_DRIVER
	138	#define CONFIG_SYS_FLASH_CFI
	139	#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
42735815	140	#define CONFIG_SYS_FLASH_QUIET_TEST /* MirrorBit flashes are optional */
e0299076 PT	141	#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
	142	#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
	143
4cdad5f4 PT	144	/*
	145	* I2C
	146	*/
e0299076	147	#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
d0b0dcaa	148	#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
e0299076	149	#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
6d0f6bcf	150	#define CONFIG_SYS_I2C_SLAVE 0x7f
9b4ef1f5	151	#define CONFIG_I2C_MULTI_BUS
ba56f625	152
4cdad5f4 PT	153	/* I2C EEPROM */
4cdad5f4 PT	154	#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
e0299076 PT	155	#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
	156	#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
	157	#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
ba56f625	158
4cdad5f4 PT	159	/* I2C RTC: STMicro M41T00 */
	160	#define CONFIG_RTC_M41T11 1
	161	#define CONFIG_SYS_I2C_RTC_ADDR 0x68
	162	#define CONFIG_SYS_M41T11_BASE_YEAR 2000
	163
	164	/*
	165	* PCI
	166	*/
	167	/* General PCI */
	168	#define CONFIG_PCI /* include pci support */
	169	#define CONFIG_PCI_PNP /* do pci plug-and-play */
	170	#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
	171	#define CONFIG_SYS_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CONFIG_SYS_PCI_MEMBASE */
	172
	173	/* Board-specific PCI */
	174	#define CONFIG_SYS_PCI_TARGET_INIT /* let board init pci target */
	175	#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x1014 /* IBM */
	176	#define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0xcafe /* Whatever */
	177	#define CONFIG_SYS_PCI_FORCE_PCI_CONV /* Force PCI Conventional Mode */
ba56f625	178
4cdad5f4 PT	179	/*
	180	* Networking options
	181	*/
96e21f86	182	#define CONFIG_PPC4xx_EMAC
6fb6af6d	183	#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */
4cdad5f4 PT	184	#define CONFIG_NET_MULTI 1
4cdad5f4 PT	185	#define CONFIG_MII 1 /* MII PHY management */
e0299076 PT	186	#define CONFIG_PHY_RESET 1 /* reset phy upon startup */
e0299076 PT	187	#define CONFIG_SYS_RX_ETH_BUFFER 32 /* Number of ethernet rx buffers & descriptors */
4cdad5f4 PT	188	#define CONFIG_ETHPRIME "ppc_4xx_eth2"
	189	#define CONFIG_PHY_ADDR 4 /* PHY address phy0 not populated */
	190	#define CONFIG_PHY2_ADDR 4 /* PHY address phy2 */
e0299076	191	#define CONFIG_HAS_ETH2 1 /* add support for "eth2addr" */
4cdad5f4	192	#define CONFIG_PHY3_ADDR 8 /* PHY address phy3 */
e0299076	193	#define CONFIG_HAS_ETH3 1 /* add support for "eth3addr" */
a5562901	194
e0299076	195	/* BOOTP options */
a1aa0bb5 JL	196	#define CONFIG_BOOTP_BOOTFILESIZE
	197	#define CONFIG_BOOTP_BOOTPATH
	198	#define CONFIG_BOOTP_GATEWAY
	199	#define CONFIG_BOOTP_HOSTNAME
	200
a5562901	201	/*
4cdad5f4	202	* Command configuration
a5562901 JL	203	*/
	204	#include <config_cmd_default.h>
	205
c4ae1a02	206	#define CONFIG_CMD_ASKENV
a5562901	207	#define CONFIG_CMD_DATE
c4ae1a02	208	#define CONFIG_CMD_DHCP
a5562901	209	#define CONFIG_CMD_EEPROM
a5562901	210	#define CONFIG_CMD_ELF
c4ae1a02 PT	211	#define CONFIG_CMD_FLASH
	212	#define CONFIG_CMD_I2C
	213	#define CONFIG_CMD_IRQ
	214	#define CONFIG_CMD_JFFS2
a5562901	215	#define CONFIG_CMD_MII
c4ae1a02 PT	216	#define CONFIG_CMD_NET
	217	#define CONFIG_CMD_PCI
	218	#define CONFIG_CMD_PING
4cdad5f4	219	#define CONFIG_CMD_SAVEENV
c4ae1a02	220	#define CONFIG_CMD_SNTP
a5562901	221
ba56f625 WD	222	/*
	223	* Miscellaneous configurable options
	224	*/
e0299076	225	#define CONFIG_SYS_LONGHELP /* undef to save memory */
4cdad5f4	226	#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
e0299076	227	#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
e0299076	228	#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
6d0f6bcf	229	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
e0299076 PT	230	#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
e0299076 PT	231	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
6d0f6bcf	232	#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
9b4ef1f5 PT	233	#define CONFIG_CMDLINE_EDITING 1 /* Command-line editing */
	234	#define CONFIG_BOOTDELAY 3 /* -1 disables auto-boot */
	235	#define CONFIG_PANIC_HANG /* do not reset board on panic */
	236	#define CONFIG_PREBOOT /* enable preboot variable */
	237	#define CONFIG_FIT 1
	238	#define CONFIG_FIT_VERBOSE 1
	239	#define CONFIG_INTEGRITY /* support booting INTEGRITY OS */
	240	#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
e0299076	241
ba56f625 WD	242	/*
	243	* For booting Linux, the board info and command line data
	244	* have to be in the first 8 MB of memory, since this is
	245	* the maximum mapped by the Linux kernel during initialization.
	246	*/
6d0f6bcf	247	#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
ba56f625 WD	248
ba56f625 WD	249	/*
4cdad5f4	250	* Boot Flags
ba56f625	251	*/
e0299076 PT	252	#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
e0299076 PT	253	#define BOOTFLAG_WARM 0x02 /* Software reboot */
ba56f625	254
4cdad5f4 PT	255	/*
	256	* Environment Configuration
	257	*/
	258	#define CONFIG_ENV_IS_IN_FLASH 1
	259	#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128k (one sector) for env */
	260	#define CONFIG_ENV_SIZE 0x8000
	261	#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - (256 * 1024))
	262
c4ae1a02 PT	263	/*
	264	* Flash memory map:
	265	* fff80000 - ffffffff U-Boot (512 KB)
	266	* fff40000 - fff7ffff U-Boot Environment (256 KB)
	267	* fff00000 - fff3ffff FDT (256KB)
	268	* ffc00000 - ffefffff OS image (3MB)
	269	* ff000000 - ffbfffff OS Use/Filesystem (12MB)
	270	*/
	271
14d0a02a	272	#define CONFIG_UBOOT_ENV_ADDR MK_STR(CONFIG_SYS_TEXT_BASE)
c4ae1a02 PT	273	#define CONFIG_FDT_ENV_ADDR MK_STR(0xfff00000)
	274	#define CONFIG_OS_ENV_ADDR MK_STR(0xffc00000)
	275
	276	#define CONFIG_PROG_UBOOT \
	277	"$download_cmd $loadaddr $ubootfile; " \
	278	"if test $? -eq 0; then " \
	279	"protect off "CONFIG_UBOOT_ENV_ADDR" +80000; " \
	280	"erase "CONFIG_UBOOT_ENV_ADDR" +80000; " \
	281	"cp.w $loadaddr "CONFIG_UBOOT_ENV_ADDR" 40000; " \
	282	"protect on "CONFIG_UBOOT_ENV_ADDR" +80000; " \
	283	"cmp.b $loadaddr "CONFIG_UBOOT_ENV_ADDR" 80000; " \
	284	"if test $? -ne 0; then " \
	285	"echo PROGRAM FAILED; " \
	286	"else; " \
	287	"echo PROGRAM SUCCEEDED; " \
	288	"fi; " \
	289	"else; " \
	290	"echo DOWNLOAD FAILED; " \
	291	"fi;"
	292
	293	#define CONFIG_BOOT_OS_NET \
	294	"$download_cmd $osaddr $osfile; " \
	295	"if test $? -eq 0; then " \
	296	"if test -n $fdtaddr; then " \
	297	"$download_cmd $fdtaddr $fdtfile; " \
	298	"if test $? -eq 0; then " \
	299	"bootm $osaddr - $fdtaddr; " \
	300	"else; " \
	301	"echo FDT DOWNLOAD FAILED; " \
	302	"fi; " \
	303	"else; " \
	304	"bootm $osaddr; " \
	305	"fi; " \
	306	"else; " \
	307	"echo OS DOWNLOAD FAILED; " \
	308	"fi;"
	309
	310	#define CONFIG_PROG_OS \
	311	"$download_cmd $osaddr $osfile; " \
	312	"if test $? -eq 0; then " \
	313	"erase "CONFIG_OS_ENV_ADDR" +$filesize; " \
	314	"cp.b $osaddr "CONFIG_OS_ENV_ADDR" $filesize; " \
	315	"cmp.b $osaddr "CONFIG_OS_ENV_ADDR" $filesize; " \
	316	"if test $? -ne 0; then " \
	317	"echo OS PROGRAM FAILED; " \
	318	"else; " \
	319	"echo OS PROGRAM SUCCEEDED; " \
	320	"fi; " \
	321	"else; " \
	322	"echo OS DOWNLOAD FAILED; " \
	323	"fi;"
	324
	325	#define CONFIG_PROG_FDT \
	326	"$download_cmd $fdtaddr $fdtfile; " \
	327	"if test $? -eq 0; then " \
	328	"erase "CONFIG_FDT_ENV_ADDR" +$filesize;" \
	329	"cp.b $fdtaddr "CONFIG_FDT_ENV_ADDR" $filesize; " \
	330	"cmp.b $fdtaddr "CONFIG_FDT_ENV_ADDR" $filesize; " \
	331	"if test $? -ne 0; then " \
	332	"echo FDT PROGRAM FAILED; " \
	333	"else; " \
	334	"echo FDT PROGRAM SUCCEEDED; " \
	335	"fi; " \
	336	"else; " \
337	"echo FDT DOWNLOAD FAILED; " \
338	"fi;"
339
340	#define CONFIG_EXTRA_ENV_SETTINGS \
341	"autoload=yes\0" \
342	"download_cmd=tftp\0" \
343	"console_args=console=ttyS0,115200\0" \
344	"root_args=root=/dev/nfs rw\0" \
345	"misc_args=ip=on\0" \
346	"set_bootargs=setenv bootargs ${console_args} ${root_args} ${misc_args}\0" \
347	"bootfile=/home/user/file\0" \
348	"osfile=/home/user/uImage-XPedite1000\0" \
349	"fdtfile=/home/user/xpedite1000.dtb\0" \
350	"ubootfile=/home/user/u-boot.bin\0" \
351	"fdtaddr=c00000\0" \
352	"osaddr=0x1000000\0" \
353	"loadaddr=0x1000000\0" \
354	"prog_uboot="CONFIG_PROG_UBOOT"\0" \
355	"prog_os="CONFIG_PROG_OS"\0" \
356	"prog_fdt="CONFIG_PROG_FDT"\0" \
357	"bootcmd_net=run set_bootargs; "CONFIG_BOOT_OS_NET"\0" \
358	"bootcmd_flash=run set_bootargs; " \
359	"bootm "CONFIG_OS_ENV_ADDR" - "CONFIG_FDT_ENV_ADDR"\0" \
360	"bootcmd=run bootcmd_flash\0"
ba56f625	361	#endif /* __CONFIG_H */