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1/*
2 * Copyright (C) 2016 Timesys Corporation
3 * Copyright (C) 2016 Advantech Corporation
4 * Copyright (C) 2012 Freescale Semiconductor, Inc.
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9#ifndef __ADVANTECH_DMSBA16_CONFIG_H
10#define __ADVANTECH_DMSBA16_CONFIG_H
11
12#include <asm/arch/imx-regs.h>
552a848e 13#include <asm/mach-imx/gpio.h>
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14
15#define CONFIG_BOARD_NAME "Advantech DMS-BA16"
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16
17#define CONFIG_MXC_UART_BASE UART4_BASE
12ca05a3 18#define CONSOLE_DEV "ttymxc3"
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19#define CONFIG_EXTRA_BOOTARGS "panic=10"
20
21#define CONFIG_BOOT_DIR ""
22#define CONFIG_LOADCMD "fatload"
23#define CONFIG_RFSPART "2"
24
25#define CONFIG_SUPPORT_EMMC_BOOT
26
27#include "mx6_common.h"
28#include <linux/sizes.h>
29
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30#define CONFIG_CMDLINE_TAG
31#define CONFIG_SETUP_MEMORY_TAGS
32#define CONFIG_INITRD_TAG
33#define CONFIG_REVISION_TAG
34#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
35
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36#define CONFIG_MXC_GPIO
37#define CONFIG_MXC_UART
38
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39#define CONFIG_MXC_OCOTP
40
41/* SATA Configs */
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42#define CONFIG_SYS_SATA_MAX_DEVICE 1
43#define CONFIG_DWC_AHSATA_PORT_ID 0
44#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
45#define CONFIG_LBA48
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46
47/* MMC Configs */
48#define CONFIG_FSL_ESDHC
49#define CONFIG_FSL_USDHC
50#define CONFIG_SYS_FSL_ESDHC_ADDR 0
ff383220 51#define CONFIG_BOUNCE_BUFFER
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52
53/* USB Configs */
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54#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
55#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
56#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
57#define CONFIG_MXC_USB_FLAGS 0
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58
59#define CONFIG_USBD_HS
60#define CONFIG_USB_FUNCTION_MASS_STORAGE
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61
62/* Networking Configs */
63#define CONFIG_FEC_MXC
64#define CONFIG_MII
65#define IMX_FEC_BASE ENET_BASE_ADDR
66#define CONFIG_FEC_XCV_TYPE RGMII
67#define CONFIG_ETHPRIME "FEC"
68#define CONFIG_FEC_MXC_PHYADDR 4
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69#define CONFIG_PHY_ATHEROS
70
71/* Serial Flash */
72#ifdef CONFIG_CMD_SF
73#define CONFIG_MXC_SPI
74#define CONFIG_SF_DEFAULT_BUS 0
75#define CONFIG_SF_DEFAULT_CS 0
76#define CONFIG_SF_DEFAULT_SPEED 20000000
77#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
78#endif
79
80/* allow to overwrite serial and ethaddr */
81#define CONFIG_ENV_OVERWRITE
82#define CONFIG_CONS_INDEX 1
ff383220 83
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84#define CONFIG_LOADADDR 0x12000000
85#define CONFIG_SYS_TEXT_BASE 0x17800000
86
87#define CONFIG_EXTRA_ENV_SETTINGS \
88 "script=boot.scr\0" \
89 "image=" CONFIG_BOOT_DIR "/uImage\0" \
90 "uboot=u-boot.imx\0" \
91 "fdt_file=" CONFIG_BOOT_DIR "/" CONFIG_DEFAULT_FDT_FILE "\0" \
92 "fdt_addr=0x18000000\0" \
93 "boot_fdt=yes\0" \
94 "ip_dyn=yes\0" \
12ca05a3 95 "console=" CONSOLE_DEV "\0" \
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96 "fdt_high=0xffffffff\0" \
97 "initrd_high=0xffffffff\0" \
98 "sddev=0\0" \
99 "emmcdev=1\0" \
100 "partnum=1\0" \
101 "loadcmd=" CONFIG_LOADCMD "\0" \
102 "rfspart=" CONFIG_RFSPART "\0" \
103 "update_sd_firmware=" \
104 "if test ${ip_dyn} = yes; then " \
105 "setenv get_cmd dhcp; " \
106 "else " \
107 "setenv get_cmd tftp; " \
108 "fi; " \
109 "if mmc dev ${mmcdev}; then " \
110 "if ${get_cmd} ${update_sd_firmware_filename}; then " \
111 "setexpr fw_sz ${filesize} / 0x200; " \
112 "setexpr fw_sz ${fw_sz} + 1; " \
113 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
114 "fi; " \
115 "fi\0" \
116 "update_sf_uboot=" \
117 "if tftp $loadaddr $uboot; then " \
118 "sf probe; " \
119 "sf erase 0 0xC0000; " \
120 "sf write $loadaddr 0x400 $filesize; " \
121 "echo 'U-Boot upgraded. Please reset'; " \
122 "fi\0" \
123 "setargs=setenv bootargs console=${console},${baudrate} " \
124 "root=/dev/${rootdev} rw rootwait " CONFIG_EXTRA_BOOTARGS "\0" \
125 "loadbootscript=" \
126 "${loadcmd} ${dev} ${devnum}:${partnum} ${loadaddr} ${script};\0" \
127 "bootscript=echo Running bootscript from ${dev}:${devnum}:${partnum};" \
128 " source\0" \
129 "loadimage=" \
130 "${loadcmd} ${dev} ${devnum}:${partnum} ${loadaddr} ${image}\0" \
131 "loadfdt=${loadcmd} ${dev} ${devnum}:${partnum} ${fdt_addr} ${fdt_file}\0" \
132 "tryboot=" \
133 "if run loadbootscript; then " \
134 "run bootscript; " \
135 "else " \
136 "if run loadimage; then " \
137 "run doboot; " \
138 "fi; " \
139 "fi;\0" \
140 "doboot=echo Booting from ${dev}:${devnum}:${partnum} ...; " \
141 "run setargs; " \
142 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
143 "if run loadfdt; then " \
144 "bootm ${loadaddr} - ${fdt_addr}; " \
145 "else " \
146 "if test ${boot_fdt} = try; then " \
147 "bootm; " \
148 "else " \
149 "echo WARN: Cannot load the DT; " \
150 "fi; " \
151 "fi; " \
152 "else " \
153 "bootm; " \
154 "fi;\0" \
155 "netargs=setenv bootargs console=${console},${baudrate} " \
156 "root=/dev/nfs " \
157 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
158 "netboot=echo Booting from net ...; " \
159 "run netargs; " \
160 "if test ${ip_dyn} = yes; then " \
161 "setenv get_cmd dhcp; " \
162 "else " \
163 "setenv get_cmd tftp; " \
164 "fi; " \
165 "${get_cmd} ${image}; " \
166 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
167 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
168 "bootm ${loadaddr} - ${fdt_addr}; " \
169 "else " \
170 "if test ${boot_fdt} = try; then " \
171 "bootm; " \
172 "else " \
173 "echo WARN: Cannot load the DT; " \
174 "fi; " \
175 "fi; " \
176 "else " \
177 "bootm; " \
178 "fi;\0" \
179
180#define CONFIG_BOOTCOMMAND \
181 "usb start; " \
182 "setenv dev usb; " \
183 "setenv devnum 0; " \
184 "setenv rootdev sda${rfspart}; " \
185 "run tryboot; " \
186 \
187 "setenv dev mmc; " \
188 "setenv rootdev mmcblk0p${rfspart}; " \
189 \
190 "setenv devnum ${sddev}; " \
191 "if mmc dev ${devnum}; then " \
192 "run tryboot; " \
193 "fi; " \
194 \
195 "setenv devnum ${emmcdev}; " \
196 "setenv rootdev mmcblk${emmcdev}p${rfspart}; " \
197 "if mmc dev ${devnum}; then " \
198 "run tryboot; " \
199 "fi; " \
200 \
201 "bmode usb; " \
202
203#define CONFIG_ARP_TIMEOUT 200UL
204
205/* Miscellaneous configurable options */
206#define CONFIG_SYS_LONGHELP
207#define CONFIG_AUTO_COMPLETE
208
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209#define CONFIG_SYS_MEMTEST_START 0x10000000
210#define CONFIG_SYS_MEMTEST_END 0x10010000
211#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
212
213#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
214
215#define CONFIG_CMDLINE_EDITING
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216
217/* Physical Memory Map */
218#define CONFIG_NR_DRAM_BANKS 1
219#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
220
221#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
222#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
223#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
224
225#define CONFIG_SYS_INIT_SP_OFFSET \
226 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
227#define CONFIG_SYS_INIT_SP_ADDR \
228 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
229
230/* FLASH and environment organization */
ff383220 231
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232#define CONFIG_ENV_SIZE (8 * 1024)
233#define CONFIG_ENV_OFFSET (768 * 1024)
234#define CONFIG_ENV_SECT_SIZE (64 * 1024)
235#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
236#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
237#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
238#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
239
240#ifndef CONFIG_SYS_DCACHE_OFF
241#endif
242
243#define CONFIG_SYS_FSL_USDHC_NUM 3
244
245/* Framebuffer */
f6f7e73d 246#ifdef CONFIG_VIDEO
ff383220 247#define CONFIG_VIDEO_IPUV3
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248#define CONFIG_VIDEO_BMP_RLE8
249#define CONFIG_SPLASH_SCREEN
250#define CONFIG_SPLASH_SCREEN_ALIGN
251#define CONFIG_BMP_16BPP
252#define CONFIG_VIDEO_LOGO
253#define CONFIG_VIDEO_BMP_LOGO
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254#define CONFIG_IMX_HDMI
255#define CONFIG_IMX_VIDEO_SKIP
f6f7e73d 256#endif
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257
258#define CONFIG_PWM_IMX
259#define CONFIG_IMX6_PWM_PER_CLK 66000000
260
ff383220 261#ifdef CONFIG_CMD_PCI
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262#define CONFIG_PCI_SCAN_SHOW
263#define CONFIG_PCIE_IMX
264#define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12)
265#define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(1, 5)
266#endif
267
268/* I2C Configs */
269#define CONFIG_SYS_I2C
270#define CONFIG_SYS_I2C_MXC
271#define CONFIG_SYS_I2C_SPEED 100000
272#define CONFIG_SYS_I2C_MXC_I2C1
273#define CONFIG_SYS_I2C_MXC_I2C2
274#define CONFIG_SYS_I2C_MXC_I2C3
275
276#endif /* __ADVANTECH_DMSBA16_CONFIG_H */