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1079432e SL |
1 | /* |
2 | * (C) Copyright 2008 Sergey Lapin <slapin@ossfans.org> | |
3 | * | |
4 | * Configuation settings for the AFEB9260 board. | |
5 | * Based on configuration for AT91SAM9260-EK | |
6 | * | |
7 | * See file CREDITS for list of people who contributed to this | |
8 | * project. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or | |
11 | * modify it under the terms of the GNU General Public License as | |
12 | * published by the Free Software Foundation; either version 2 of | |
13 | * the License, or (at your option) any later version. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, | |
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | * GNU General Public License for more details. | |
19 | * | |
20 | * You should have received a copy of the GNU General Public License | |
21 | * along with this program; if not, write to the Free Software | |
22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
23 | * MA 02111-1307 USA | |
24 | */ | |
25 | ||
26 | #ifndef __CONFIG_H | |
27 | #define __CONFIG_H | |
28 | ||
29 | /* ARM asynchronous clock */ | |
30 | #define AT91_MAIN_CLOCK 18429952 /* from 18.432 MHz crystal */ | |
6ebff365 | 31 | #define CONFIG_SYS_HZ 1000 |
1079432e | 32 | |
1079432e SL |
33 | #define CONFIG_AT91SAM9260 1 /* It's an Atmel AT91SAM9260 SoC*/ |
34 | #define CONFIG_AFEB9260 1 /* on an AFEB9260 Board */ | |
dc39ae95 | 35 | #define CONFIG_ARCH_CPU_INIT |
1079432e SL |
36 | #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ |
37 | ||
38 | #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ | |
39 | #define CONFIG_SETUP_MEMORY_TAGS 1 | |
40 | #define CONFIG_INITRD_TAG 1 | |
41 | ||
42 | #define CONFIG_SKIP_LOWLEVEL_INIT | |
43 | #define CONFIG_SKIP_RELOCATE_UBOOT | |
44 | ||
45 | /* | |
46 | * Hardware drivers | |
47 | */ | |
48 | #define CONFIG_ATMEL_USART 1 | |
49 | #undef CONFIG_USART0 | |
50 | #undef CONFIG_USART1 | |
51 | #undef CONFIG_USART2 | |
52 | #define CONFIG_USART3 1 /* USART 3 is DBGU */ | |
53 | ||
54 | #define CONFIG_BOOTDELAY 3 | |
55 | ||
56 | /* | |
57 | * BOOTP options | |
58 | */ | |
59 | #define CONFIG_BOOTP_BOOTFILESIZE 1 | |
60 | #define CONFIG_BOOTP_BOOTPATH 1 | |
61 | #define CONFIG_BOOTP_GATEWAY 1 | |
62 | #define CONFIG_BOOTP_HOSTNAME 1 | |
63 | ||
64 | /* | |
65 | * Command line configuration. | |
66 | */ | |
67 | #include <config_cmd_default.h> | |
68 | #undef CONFIG_CMD_BDI | |
1079432e | 69 | #undef CONFIG_CMD_FPGA |
74de7aef | 70 | #undef CONFIG_CMD_IMI |
1079432e | 71 | #undef CONFIG_CMD_IMLS |
74de7aef WD |
72 | #undef CONFIG_CMD_LOADS |
73 | #undef CONFIG_CMD_SOURCE | |
1079432e SL |
74 | |
75 | #define CONFIG_CMD_PING 1 | |
76 | #define CONFIG_CMD_DHCP 1 | |
77 | ||
78 | #define CONFIG_CMD_NAND 1 | |
79 | #define CONFIG_CMD_USB 1 | |
80 | ||
81 | /* SDRAM */ | |
82 | #define CONFIG_NR_DRAM_BANKS 1 | |
83 | #define PHYS_SDRAM 0x20000000 | |
84 | #define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */ | |
85 | ||
86 | /* DataFlash */ | |
4758ebdd | 87 | #define CONFIG_ATMEL_DATAFLASH_SPI |
1079432e SL |
88 | #define CONFIG_HAS_DATAFLASH 1 |
89 | #define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ) | |
90 | #define CONFIG_SYS_MAX_DATAFLASH_BANKS 2 | |
91 | #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ | |
92 | #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 0xD0000000 /* CS1 */ | |
93 | #define AT91_SPI_CLK 15000000 | |
94 | #define DATAFLASH_TCSS (0x1a << 16) | |
95 | #define DATAFLASH_TCHS (0x1 << 24) | |
96 | ||
97 | /* NAND flash */ | |
74c076d6 JCPV |
98 | #ifdef CONFIG_CMD_NAND |
99 | #define CONFIG_NAND_ATMEL | |
1079432e SL |
100 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
101 | #define CONFIG_SYS_NAND_BASE 0x40000000 | |
102 | #define CONFIG_SYS_NAND_DBW_8 1 | |
74c076d6 JCPV |
103 | /* our ALE is AD21 */ |
104 | #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) | |
105 | /* our CLE is AD22 */ | |
106 | #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) | |
107 | #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 | |
108 | #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 | |
2eb99ca8 | 109 | |
74c076d6 | 110 | #endif |
1079432e SL |
111 | |
112 | /* NOR flash - no real flash on this board */ | |
113 | #define CONFIG_SYS_NO_FLASH 1 | |
114 | ||
115 | /* Ethernet */ | |
116 | #define CONFIG_MACB 1 | |
117 | #undef CONFIG_RMII /* We have full MII there */ | |
118 | #define CONFIG_RESET_PHY_R 1 | |
119 | ||
120 | #define CONFIG_NET_MULTI 1 | |
121 | #define CONFIG_NET_RETRY_COUNT 20 | |
122 | ||
123 | /* USB */ | |
2b7178af | 124 | #define CONFIG_USB_ATMEL |
1079432e | 125 | #define CONFIG_USB_OHCI_NEW 1 |
1079432e SL |
126 | #define CONFIG_DOS_PARTITION 1 |
127 | #define CONFIG_SYS_USB_OHCI_CPU_INIT 1 | |
128 | #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9260_UHP_BASE */ | |
129 | #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260" | |
130 | #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 | |
131 | #define CONFIG_USB_STORAGE 1 | |
132 | ||
133 | #define CONFIG_SYS_LOAD_ADDR 0x21000000 /* load address */ | |
134 | ||
135 | #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM | |
136 | #define CONFIG_SYS_MEMTEST_END 0x21e00000 | |
137 | ||
138 | #undef CONFIG_SYS_USE_DATAFLASH_CS0 | |
139 | #define CONFIG_SYS_USE_DATAFLASH_CS1 1 | |
140 | #undef CONFIG_SYS_USE_NANDFLASH | |
141 | ||
142 | /* bootstrap + u-boot + env + linux in dataflash on CS1 */ | |
143 | #define CONFIG_ENV_IS_IN_DATAFLASH 1 | |
144 | #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 + 0x8400) | |
145 | #define CONFIG_ENV_OFFSET 0x4200 | |
146 | #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 + CONFIG_ENV_OFFSET) | |
147 | #define CONFIG_ENV_SIZE 0x4200 | |
148 | #define CONFIG_BOOTCOMMAND "nand read 0x21000000 0xa0000 0x200000; bootm" | |
149 | #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ | |
150 | "root=/dev/mtdblock2 " \ | |
151 | "rw rootfstype=jffs2 panic=20" | |
152 | ||
153 | #define CONFIG_BAUDRATE 115200 | |
154 | #define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } | |
155 | ||
156 | #define CONFIG_SYS_PROMPT "U-Boot> " | |
157 | #define CONFIG_SYS_CBSIZE 256 | |
158 | #define CONFIG_SYS_MAXARGS 16 | |
159 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) | |
3aed3aa2 | 160 | #define CONFIG_SYS_LONGHELP 1 |
1079432e SL |
161 | #define CONFIG_CMDLINE_EDITING 1 |
162 | ||
1079432e SL |
163 | /* |
164 | * Size of malloc() pool | |
165 | */ | |
166 | #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) | |
167 | #define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */ | |
168 | ||
169 | #define CONFIG_STACKSIZE (32 * 1024) /* regular stack */ | |
170 | ||
171 | #ifdef CONFIG_USE_IRQ | |
172 | #error CONFIG_USE_IRQ not supported | |
173 | #endif | |
174 | ||
175 | #endif |