[people/ms/u-boot.git] / include / configs / am335x_evm.h

/*
 * am335x_evm.h
 *
 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation version 2.
 *
 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
 * kind, whether express or implied; without even the implied warranty
 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#ifndef __CONFIG_AM335X_EVM_H
#define __CONFIG_AM335X_EVM_H

#define CONFIG_AM33XX

#include <asm/arch/cpu.h>
#include <asm/arch/hardware.h>

#define CONFIG_DMA_COHERENT
#define CONFIG_DMA_COHERENT_SIZE	(1 << 20)

#define CONFIG_ENV_SIZE			(128 << 10)	/* 128 KiB */
#define CONFIG_SYS_MALLOC_LEN		(1024 << 10)
#define CONFIG_SYS_LONGHELP		/* undef to save memory */
#define CONFIG_SYS_HUSH_PARSER		/* use "hush" command parser */
#define CONFIG_SYS_PROMPT		"U-Boot# "
#define CONFIG_BOARD_LATE_INIT
#define CONFIG_SYS_NO_FLASH
#define MACH_TYPE_TIAM335EVM		3589	/* Until the next sync */
#define CONFIG_MACH_TYPE		MACH_TYPE_TIAM335EVM

#define CONFIG_OF_LIBFDT
#define CONFIG_CMD_BOOTZ
#define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG

/* commands to include */
#include <config_cmd_default.h>

#define CONFIG_CMD_ASKENV
#define CONFIG_VERSION_VARIABLE

/* set to negative value for no autoboot */
#define CONFIG_BOOTDELAY		1
#define CONFIG_ENV_VARS_UBOOT_CONFIG
#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
#ifndef CONFIG_SPL_BUILD
#define CONFIG_EXTRA_ENV_SETTINGS \
	"loadaddr=0x80200000\0" \
	"fdtaddr=0x80F80000\0" \
	"fdt_high=0xffffffff\0" \
	"rdaddr=0x81000000\0" \
	"bootfile=/boot/uImage\0" \
	"fdtfile=\0" \
	"console=ttyO0,115200n8\0" \
	"optargs=\0" \
	"mmcdev=0\0" \
	"mmcroot=/dev/mmcblk0p2 ro\0" \
	"mmcrootfstype=ext4 rootwait\0" \
	"bootpart=0:2\0" \
	"nandroot=ubi0:rootfs rw ubi.mtd=7,2048\0" \
	"nandrootfstype=ubifs rootwait=1\0" \
	"nandsrcaddr=0x280000\0" \
	"nandimgsize=0x500000\0" \
	"rootpath=/export/rootfs\0" \
	"nfsopts=nolock\0" \
	"static_ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}" \
		"::off\0" \
	"ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=${rdaddr},64M\0" \
	"ramrootfstype=ext2\0" \
	"mmcargs=setenv bootargs console=${console} " \
		"${optargs} " \
		"root=${mmcroot} " \
		"rootfstype=${mmcrootfstype}\0" \
	"nandargs=setenv bootargs console=${console} " \
		"${optargs} " \
		"root=${nandroot} " \
		"rootfstype=${nandrootfstype}\0" \
	"spiroot=/dev/mtdblock4 rw\0" \
	"spirootfstype=jffs2\0" \
	"spisrcaddr=0xe0000\0" \
	"spiimgsize=0x362000\0" \
	"spibusno=0\0" \
	"spiargs=setenv bootargs console=${console} " \
		"${optargs} " \
		"root=${spiroot} " \
		"rootfstype=${spirootfstype}\0" \
	"netargs=setenv bootargs console=${console} " \
		"${optargs} " \
		"root=/dev/nfs " \
		"nfsroot=${serverip}:${rootpath},${nfsopts} rw " \
		"ip=dhcp\0" \
	"bootenv=uEnv.txt\0" \
	"loadbootenv=load mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
	"importbootenv=echo Importing environment from mmc ...; " \
		"env import -t $loadaddr $filesize\0" \
	"ramargs=setenv bootargs console=${console} " \
		"${optargs} " \
		"root=${ramroot} " \
		"rootfstype=${ramrootfstype}\0" \
	"loadramdisk=load mmc ${mmcdev} ${rdaddr} ramdisk.gz\0" \
	"loaduimage=load mmc ${bootpart} ${loadaddr} ${bootfile}\0" \
	"mmcboot=echo Booting from mmc ...; " \
		"run mmcargs; " \
		"bootm ${loadaddr}\0" \
	"nandboot=echo Booting from nand ...; " \
		"run nandargs; " \
		"nand read ${loadaddr} ${nandsrcaddr} ${nandimgsize}; " \
		"bootm ${loadaddr}\0" \
	"spiboot=echo Booting from spi ...; " \
		"run spiargs; " \
		"sf probe ${spibusno}:0; " \
		"sf read ${loadaddr} ${spisrcaddr} ${spiimgsize}; " \
		"bootm ${loadaddr}\0" \
	"netboot=echo Booting from network ...; " \
		"setenv autoload no; " \
		"dhcp; " \
		"tftp ${loadaddr} ${bootfile}; " \
		"run netargs; " \
		"bootm ${loadaddr}\0" \
	"ramboot=echo Booting from ramdisk ...; " \
		"run ramargs; " \
		"bootm ${loadaddr}\0" \
	"findfdt="\
		"if test $board_name = A335BONE; then " \
			"setenv fdtfile am335x-bone.dtb; fi; " \
		"if test $board_name = A335BNLT; then " \
			"setenv fdtfile am335x-boneblack.dtb; fi; " \
		"if test $board_name = A33515BB; then " \
			"setenv fdtfile am335x-evm.dtb; fi; " \
		"if test $board_name = A335X_SK; then " \
			"setenv fdtfile am335x-evmsk.dtb; fi\0" \

#endif

#define CONFIG_BOOTCOMMAND \
	"mmc dev ${mmcdev}; if mmc rescan; then " \
		"echo SD/MMC found on device ${mmcdev};" \
		"if run loadbootenv; then " \
			"echo Loaded environment from ${bootenv};" \
			"run importbootenv;" \
		"fi;" \
		"if test -n $uenvcmd; then " \
			"echo Running uenvcmd ...;" \
			"run uenvcmd;" \
		"fi;" \
		"if run loaduimage; then " \
			"run mmcboot;" \
		"fi;" \
	"else " \
		"run nandboot;" \
	"fi;" \

/* Clock Defines */
#define V_OSCK				24000000  /* Clock output from T2 */
#define V_SCLK				(V_OSCK)

#define CONFIG_CMD_ECHO

/* max number of command args */
#define CONFIG_SYS_MAXARGS		16

/* Console I/O Buffer Size */
#define CONFIG_SYS_CBSIZE		512

/* Print Buffer Size */
#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE \
					+ sizeof(CONFIG_SYS_PROMPT) + 16)

/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE

/*
 * memtest works on 8 MB in DRAM after skipping 32MB from
 * start addr of ram disk
 */
#define CONFIG_SYS_MEMTEST_START	(PHYS_DRAM_1 + (64 * 1024 * 1024))
#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START \
					+ (8 * 1024 * 1024))

#define CONFIG_SYS_LOAD_ADDR		0x81000000 /* Default load address */
#define CONFIG_SYS_HZ			1000 /* 1ms clock */

#define CONFIG_MMC
#define CONFIG_GENERIC_MMC
#define CONFIG_OMAP_HSMMC
#define CONFIG_CMD_MMC
#define CONFIG_DOS_PARTITION
#define CONFIG_CMD_FAT
#define CONFIG_CMD_EXT2
#define CONFIG_CMD_EXT4
#define CONFIG_CMD_FS_GENERIC

#define CONFIG_SPI
#define CONFIG_OMAP3_SPI
#define CONFIG_MTD_DEVICE
#define CONFIG_SPI_FLASH
#define CONFIG_SPI_FLASH_WINBOND
#define CONFIG_CMD_SF
#define CONFIG_SF_DEFAULT_SPEED		(24000000)

 /* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS		1		/*  1 bank of DRAM */
#define PHYS_DRAM_1			0x80000000	/* DRAM Bank #1 */
#define CONFIG_MAX_RAM_BANK_SIZE	(1024 << 20)	/* 1GB */

#define CONFIG_SYS_SDRAM_BASE		PHYS_DRAM_1
#define CONFIG_SYS_INIT_SP_ADDR         (NON_SECURE_SRAM_END - \
						GENERATED_GBL_DATA_SIZE)
 /* Platform/Board specific defs */
#define CONFIG_SYS_TIMERBASE		0x48040000	/* Use Timer2 */
#define CONFIG_SYS_PTV			2	/* Divisor: 2^(PTV+1) => 8 */
#define CONFIG_SYS_HZ			1000

/* NS16550 Configuration */
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SERIAL_MULTI
#define CONFIG_SYS_NS16550_REG_SIZE	(-4)
#define CONFIG_SYS_NS16550_CLK		(48000000)
#define CONFIG_SYS_NS16550_COM1		0x44e09000	/* Base EVM has UART0 */
#define CONFIG_SYS_NS16550_COM2		0x48022000	/* UART1 */
#define CONFIG_SYS_NS16550_COM3		0x48024000	/* UART2 */
#define CONFIG_SYS_NS16550_COM4		0x481a6000	/* UART3 */
#define CONFIG_SYS_NS16550_COM5		0x481a8000	/* UART4 */
#define CONFIG_SYS_NS16550_COM6		0x481aa000	/* UART5 */

/* I2C Configuration */
#define CONFIG_I2C
#define CONFIG_CMD_I2C
#define CONFIG_HARD_I2C
#define CONFIG_SYS_I2C_SPEED		100000
#define CONFIG_SYS_I2C_SLAVE		1
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_DRIVER_OMAP24XX_I2C
#define CONFIG_CMD_EEPROM
#define CONFIG_ENV_EEPROM_IS_ON_I2C
#define CONFIG_SYS_I2C_EEPROM_ADDR	0x50	/* Main EEPROM */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	2
#define CONFIG_SYS_I2C_MULTI_EEPROMS

#define CONFIG_OMAP_GPIO

#define CONFIG_BAUDRATE		115200
#define CONFIG_SYS_BAUDRATE_TABLE	{ 110, 300, 600, 1200, 2400, \
4800, 9600, 14400, 19200, 28800, 38400, 56000, 57600, 115200 }

#define CONFIG_ENV_OVERWRITE		1
#define CONFIG_SYS_CONSOLE_INFO_QUIET

#define CONFIG_ENV_IS_NOWHERE

/* Defines for SPL */
#define CONFIG_SPL
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_TEXT_BASE		0x402F0400
#define CONFIG_SPL_MAX_SIZE		(101 * 1024)
#define CONFIG_SPL_STACK		CONFIG_SYS_INIT_SP_ADDR

#define CONFIG_SPL_BSS_START_ADDR	0x80000000
#define CONFIG_SPL_BSS_MAX_SIZE		0x80000		/* 512 KB */

#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x300 /* address 0x60000 */
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	0x200 /* 256 KB */
#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION	1
#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME	"u-boot.img"
#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SPL_FAT_SUPPORT
#define CONFIG_SPL_I2C_SUPPORT

#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_LIBDISK_SUPPORT
#define CONFIG_SPL_LIBGENERIC_SUPPORT
#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SPL_GPIO_SUPPORT
#define CONFIG_SPL_YMODEM_SUPPORT
#define CONFIG_SPL_NET_SUPPORT
#define CONFIG_SPL_NET_VCI_STRING	"AM335x U-Boot SPL"
#define CONFIG_SPL_ETH_SUPPORT
#define CONFIG_SPL_SPI_SUPPORT
#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SPL_SPI_BUS		0
#define CONFIG_SPL_SPI_CS		0
#define CONFIG_SYS_SPI_U_BOOT_OFFS	0x80000
#define CONFIG_SPL_MUSB_NEW_SUPPORT
#define CONFIG_SPL_LDSCRIPT		"$(CPUDIR)/am33xx/u-boot-spl.lds"

#define CONFIG_SPL_BOARD_INIT
#define CONFIG_SPL_NAND_AM33XX_BCH
#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_ECC
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_COUNT	(CONFIG_SYS_NAND_BLOCK_SIZE / \
					 CONFIG_SYS_NAND_PAGE_SIZE)
#define CONFIG_SYS_NAND_PAGE_SIZE	2048
#define CONFIG_SYS_NAND_OOBSIZE		64
#define CONFIG_SYS_NAND_BLOCK_SIZE	(128*1024)
#define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
#define CONFIG_SYS_NAND_ECCPOS		{ 2, 3, 4, 5, 6, 7, 8, 9, \
					 10, 11, 12, 13, 14, 15, 16, 17, \
					 18, 19, 20, 21, 22, 23, 24, 25, \
					 26, 27, 28, 29, 30, 31, 32, 33, \
					 34, 35, 36, 37, 38, 39, 40, 41, \
					 42, 43, 44, 45, 46, 47, 48, 49, \
					 50, 51, 52, 53, 54, 55, 56, 57, }

#define CONFIG_SYS_NAND_ECCSIZE		512
#define CONFIG_SYS_NAND_ECCBYTES	14

#define CONFIG_SYS_NAND_ECCSTEPS	4
#define	CONFIG_SYS_NAND_ECCTOTAL	(CONFIG_SYS_NAND_ECCBYTES * \
						CONFIG_SYS_NAND_ECCSTEPS)

#define	CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_TEXT_BASE

#define CONFIG_SYS_NAND_U_BOOT_OFFS	0x80000

/*
 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
 * 64 bytes before this address should be set aside for u-boot.img's
 * header. That is 0x800FFFC0--0x80100000 should not be used for any
 * other needs.
 */
#define CONFIG_SYS_TEXT_BASE		0x80800000
#define CONFIG_SYS_SPL_MALLOC_START	0x80208000
#define CONFIG_SYS_SPL_MALLOC_SIZE	0x100000

/* Since SPL did pll and ddr initialization for us,
 * we don't need to do it twice.
 */
#ifndef CONFIG_SPL_BUILD
#define CONFIG_SKIP_LOWLEVEL_INIT
#endif

/*
 * USB configuration
 */
#define CONFIG_USB_MUSB_DSPS
#define CONFIG_ARCH_MISC_INIT
#define CONFIG_MUSB_GADGET
#define CONFIG_MUSB_PIO_ONLY
#define CONFIG_USB_GADGET_DUALSPEED
#define CONFIG_MUSB_HOST
#define CONFIG_AM335X_USB0
#define CONFIG_AM335X_USB0_MODE	MUSB_PERIPHERAL
#define CONFIG_AM335X_USB1
#define CONFIG_AM335X_USB1_MODE MUSB_HOST

#ifdef CONFIG_MUSB_HOST
#define CONFIG_CMD_USB
#define CONFIG_USB_STORAGE
#endif

#ifdef CONFIG_MUSB_GADGET
#define CONFIG_USB_ETHER
#define CONFIG_USB_ETH_RNDIS
#define CONFIG_USBNET_HOST_ADDR	"de:ad:be:af:00:00"
#endif /* CONFIG_MUSB_GADGET */

#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_USBETH_SUPPORT)
/* disable host part of MUSB in SPL */
#undef CONFIG_MUSB_HOST
/*
 * Disable CPSW SPL support so we fit within the 101KiB limit.
 */
#undef CONFIG_SPL_ETH_SUPPORT
#endif

/*
 * Default to using SPI for environment, etc.  We have multiple copies
 * of SPL as the ROM will check these locations.
 * 0x0 - 0x20000 : First copy of SPL
 * 0x20000 - 0x40000 : Second copy of SPL
 * 0x40000 - 0x60000 : Third copy of SPL
 * 0x60000 - 0x80000 : Fourth copy of SPL
 * 0x80000 - 0xDF000 : U-Boot
 * 0xDF000 - 0xE0000 : U-Boot Environment
 * 0xE0000 - 0x442000 : Linux Kernel
 * 0x442000 - 0x800000 : Userland
 */
#if defined(CONFIG_SPI_BOOT)
# undef CONFIG_ENV_IS_NOWHERE
# define CONFIG_ENV_IS_IN_SPI_FLASH
# define CONFIG_ENV_SPI_MAX_HZ		CONFIG_SF_DEFAULT_SPEED
# define CONFIG_ENV_OFFSET		(892 << 10) /* 892 KiB in */
# define CONFIG_ENV_SECT_SIZE		(4 << 10) /* 4 KB sectors */
#endif /* SPI support */

/* Unsupported features */
#undef CONFIG_USE_IRQ

#define CONFIG_CMD_NET
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_PING
#define CONFIG_DRIVER_TI_CPSW
#define CONFIG_MII
#define CONFIG_BOOTP_DEFAULT
#define CONFIG_BOOTP_DNS
#define CONFIG_BOOTP_DNS2
#define CONFIG_BOOTP_SEND_HOSTNAME
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_SUBNETMASK
#define CONFIG_NET_RETRY_COUNT         10
#define CONFIG_NET_MULTI
#define CONFIG_PHY_GIGE
#define CONFIG_PHYLIB
#define CONFIG_PHY_ADDR			0
#define CONFIG_PHY_SMSC

#define CONFIG_NAND
/* NAND support */
#ifdef CONFIG_NAND
#define CONFIG_CMD_NAND
#define CONFIG_NAND_OMAP_GPMC
#define GPMC_NAND_ECC_LP_x16_LAYOUT	1
#define CONFIG_SYS_NAND_BASE		(0x08000000)	/* physical address */
							/* to access nand at */
							/* CS0 */
#define CONFIG_SYS_MAX_NAND_DEVICE	1		/* Max number of NAND
							   devices */
#if !defined(CONFIG_SPI_BOOT)
#undef CONFIG_ENV_IS_NOWHERE
#define CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_OFFSET		0x260000 /* environment starts here */
#define CONFIG_SYS_ENV_SECT_SIZE	(128 << 10)	/* 128 KiB */
#endif
#endif

#endif	/* ! __CONFIG_AM335X_EVM_H */
Commit	Line	Data
5289e83a CN	1	/*
	2	* am335x_evm.h
	3	*
	4	* Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
	5	*
	6	* This program is free software; you can redistribute it and/or
	7	* modify it under the terms of the GNU General Public License as
	8	* published by the Free Software Foundation version 2.
	9	*
	10	* This program is distributed "as is" WITHOUT ANY WARRANTY of any
	11	* kind, whether express or implied; without even the implied warranty
	12	* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	13	* GNU General Public License for more details.
	14	*/
	15
	16	#ifndef __CONFIG_AM335X_EVM_H
	17	#define __CONFIG_AM335X_EVM_H
	18
f16da746	19	#define CONFIG_AM33XX
5289e83a CN	20
	21	#include <asm/arch/cpu.h>
	22	#include <asm/arch/hardware.h>
	23
93042960 CN	24	#define CONFIG_DMA_COHERENT
	25	#define CONFIG_DMA_COHERENT_SIZE (1 << 20)
	26
7bf038ec TR	27	#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
	28	#define CONFIG_SYS_MALLOC_LEN (1024 << 10)
	29	#define CONFIG_SYS_LONGHELP /* undef to save memory */
	30	#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
750b4bfe	31	#define CONFIG_SYS_PROMPT "U-Boot# "
044fc14b	32	#define CONFIG_BOARD_LATE_INIT
5289e83a	33	#define CONFIG_SYS_NO_FLASH
a88f70b9	34	#define MACH_TYPE_TIAM335EVM 3589 /* Until the next sync */
5289e83a CN	35	#define CONFIG_MACH_TYPE MACH_TYPE_TIAM335EVM
5289e83a CN	36
7bf038ec	37	#define CONFIG_OF_LIBFDT
d446c903	38	#define CONFIG_CMD_BOOTZ
7bf038ec TR	39	#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
	40	#define CONFIG_SETUP_MEMORY_TAGS
	41	#define CONFIG_INITRD_TAG
	42
	43	/* commands to include */
	44	#include <config_cmd_default.h>
	45
5289e83a CN	46	#define CONFIG_CMD_ASKENV
	47	#define CONFIG_VERSION_VARIABLE
	48
	49	/* set to negative value for no autoboot */
3580777b	50	#define CONFIG_BOOTDELAY 1
044fc14b TR	51	#define CONFIG_ENV_VARS_UBOOT_CONFIG
044fc14b TR	52	#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
a32f42f6	53	#ifndef CONFIG_SPL_BUILD
5289e83a	54	#define CONFIG_EXTRA_ENV_SETTINGS \
7bf038ec TR	55	"loadaddr=0x80200000\0" \
7bf038ec TR	56	"fdtaddr=0x80F80000\0" \
f170899f	57	"fdt_high=0xffffffff\0" \
7bf038ec TR	58	"rdaddr=0x81000000\0" \
7bf038ec TR	59	"bootfile=/boot/uImage\0" \
044fc14b	60	"fdtfile=\0" \
7bf038ec TR	61	"console=ttyO0,115200n8\0" \
	62	"optargs=\0" \
	63	"mmcdev=0\0" \
3580777b	64	"mmcroot=/dev/mmcblk0p2 ro\0" \
7bf038ec	65	"mmcrootfstype=ext4 rootwait\0" \
73a27a84	66	"bootpart=0:2\0" \
73c1f4af CM	67	"nandroot=ubi0:rootfs rw ubi.mtd=7,2048\0" \
	68	"nandrootfstype=ubifs rootwait=1\0" \
	69	"nandsrcaddr=0x280000\0" \
	70	"nandimgsize=0x500000\0" \
abdd178d CM	71	"rootpath=/export/rootfs\0" \
	72	"nfsopts=nolock\0" \
	73	"static_ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}" \
	74	"::off\0" \
7bf038ec TR	75	"ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=${rdaddr},64M\0" \
	76	"ramrootfstype=ext2\0" \
	77	"mmcargs=setenv bootargs console=${console} " \
	78	"${optargs} " \
	79	"root=${mmcroot} " \
	80	"rootfstype=${mmcrootfstype}\0" \
73c1f4af CM	81	"nandargs=setenv bootargs console=${console} " \
	82	"${optargs} " \
	83	"root=${nandroot} " \
	84	"rootfstype=${nandrootfstype}\0" \
63ba7c66 CM	85	"spiroot=/dev/mtdblock4 rw\0" \
	86	"spirootfstype=jffs2\0" \
	87	"spisrcaddr=0xe0000\0" \
	88	"spiimgsize=0x362000\0" \
	89	"spibusno=0\0" \
	90	"spiargs=setenv bootargs console=${console} " \
	91	"${optargs} " \
	92	"root=${spiroot} " \
	93	"rootfstype=${spirootfstype}\0" \
abdd178d CM	94	"netargs=setenv bootargs console=${console} " \
	95	"${optargs} " \
	96	"root=/dev/nfs " \
	97	"nfsroot=${serverip}:${rootpath},${nfsopts} rw " \
	98	"ip=dhcp\0" \
7bf038ec	99	"bootenv=uEnv.txt\0" \
73a27a84	100	"loadbootenv=load mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
7bf038ec TR	101	"importbootenv=echo Importing environment from mmc ...; " \
	102	"env import -t $loadaddr $filesize\0" \
	103	"ramargs=setenv bootargs console=${console} " \
	104	"${optargs} " \
	105	"root=${ramroot} " \
	106	"rootfstype=${ramrootfstype}\0" \
73a27a84 KK	107	"loadramdisk=load mmc ${mmcdev} ${rdaddr} ramdisk.gz\0" \
73a27a84 KK	108	"loaduimage=load mmc ${bootpart} ${loadaddr} ${bootfile}\0" \
7bf038ec TR	109	"mmcboot=echo Booting from mmc ...; " \
	110	"run mmcargs; " \
	111	"bootm ${loadaddr}\0" \
73c1f4af CM	112	"nandboot=echo Booting from nand ...; " \
	113	"run nandargs; " \
	114	"nand read ${loadaddr} ${nandsrcaddr} ${nandimgsize}; " \
	115	"bootm ${loadaddr}\0" \
63ba7c66 CM	116	"spiboot=echo Booting from spi ...; " \
	117	"run spiargs; " \
	118	"sf probe ${spibusno}:0; " \
	119	"sf read ${loadaddr} ${spisrcaddr} ${spiimgsize}; " \
	120	"bootm ${loadaddr}\0" \
abdd178d CM	121	"netboot=echo Booting from network ...; " \
	122	"setenv autoload no; " \
	123	"dhcp; " \
	124	"tftp ${loadaddr} ${bootfile}; " \
	125	"run netargs; " \
	126	"bootm ${loadaddr}\0" \
7bf038ec TR	127	"ramboot=echo Booting from ramdisk ...; " \
	128	"run ramargs; " \
	129	"bootm ${loadaddr}\0" \
044fc14b TR	130	"findfdt="\
	131	"if test $board_name = A335BONE; then " \
	132	"setenv fdtfile am335x-bone.dtb; fi; " \
20775906 KK	133	"if test $board_name = A335BNLT; then " \
20775906 KK	134	"setenv fdtfile am335x-boneblack.dtb; fi; " \
044fc14b TR	135	"if test $board_name = A33515BB; then " \
	136	"setenv fdtfile am335x-evm.dtb; fi; " \
	137	"if test $board_name = A335X_SK; then " \
	138	"setenv fdtfile am335x-evmsk.dtb; fi\0" \
7bf038ec	139
a32f42f6 TR	140	#endif
a32f42f6 TR	141
7bf038ec	142	#define CONFIG_BOOTCOMMAND \
66968110	143	"mmc dev ${mmcdev}; if mmc rescan; then " \
7bf038ec TR	144	"echo SD/MMC found on device ${mmcdev};" \
	145	"if run loadbootenv; then " \
	146	"echo Loaded environment from ${bootenv};" \
	147	"run importbootenv;" \
	148	"fi;" \
	149	"if test -n $uenvcmd; then " \
	150	"echo Running uenvcmd ...;" \
	151	"run uenvcmd;" \
	152	"fi;" \
	153	"if run loaduimage; then " \
	154	"run mmcboot;" \
	155	"fi;" \
73c1f4af CM	156	"else " \
73c1f4af CM	157	"run nandboot;" \
7bf038ec	158	"fi;" \
5289e83a CN	159
	160	/* Clock Defines */
	161	#define V_OSCK 24000000 /* Clock output from T2 */
750b4bfe	162	#define V_SCLK (V_OSCK)
5289e83a	163
5289e83a CN	164	#define CONFIG_CMD_ECHO
	165
	166	/* max number of command args */
750b4bfe	167	#define CONFIG_SYS_MAXARGS 16
5289e83a CN	168
	169	/* Console I/O Buffer Size */
	170	#define CONFIG_SYS_CBSIZE 512
	171
	172	/* Print Buffer Size */
	173	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
	174	+ sizeof(CONFIG_SYS_PROMPT) + 16)
	175
	176	/* Boot Argument Buffer Size */
	177	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
	178
	179	/*
	180	* memtest works on 8 MB in DRAM after skipping 32MB from
	181	* start addr of ram disk
	182	*/
	183	#define CONFIG_SYS_MEMTEST_START (PHYS_DRAM_1 + (64 * 1024 * 1024))
	184	#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START \
	185	+ (8 * 1024 * 1024))
	186
5289e83a CN	187	#define CONFIG_SYS_LOAD_ADDR 0x81000000 /* Default load address */
	188	#define CONFIG_SYS_HZ 1000 /* 1ms clock */
	189
876bdd6d CN	190	#define CONFIG_MMC
	191	#define CONFIG_GENERIC_MMC
	192	#define CONFIG_OMAP_HSMMC
	193	#define CONFIG_CMD_MMC
	194	#define CONFIG_DOS_PARTITION
	195	#define CONFIG_CMD_FAT
	196	#define CONFIG_CMD_EXT2
73a27a84 KK	197	#define CONFIG_CMD_EXT4
73a27a84 KK	198	#define CONFIG_CMD_FS_GENERIC
876bdd6d	199
a4a99fff TR	200	#define CONFIG_SPI
	201	#define CONFIG_OMAP3_SPI
	202	#define CONFIG_MTD_DEVICE
	203	#define CONFIG_SPI_FLASH
	204	#define CONFIG_SPI_FLASH_WINBOND
	205	#define CONFIG_CMD_SF
	206	#define CONFIG_SF_DEFAULT_SPEED (24000000)
	207
5289e83a CN	208	/* Physical Memory Map */
	209	#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
	210	#define PHYS_DRAM_1 0x80000000 /* DRAM Bank #1 */
5289e83a CN	211	#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */
	212
	213	#define CONFIG_SYS_SDRAM_BASE PHYS_DRAM_1
41aebf81	214	#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
5289e83a CN	215	GENERATED_GBL_DATA_SIZE)
5289e83a CN	216	/* Platform/Board specific defs */
5289e83a CN	217	#define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */
	218	#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
	219	#define CONFIG_SYS_HZ 1000
	220
	221	/* NS16550 Configuration */
	222	#define CONFIG_SYS_NS16550
	223	#define CONFIG_SYS_NS16550_SERIAL
c3f8318f	224	#define CONFIG_SERIAL_MULTI
5289e83a CN	225	#define CONFIG_SYS_NS16550_REG_SIZE (-4)
	226	#define CONFIG_SYS_NS16550_CLK (48000000)
	227	#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */
c3f8318f AB	228	#define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */
	229	#define CONFIG_SYS_NS16550_COM3 0x48024000 /* UART2 */
	230	#define CONFIG_SYS_NS16550_COM4 0x481a6000 /* UART3 */
	231	#define CONFIG_SYS_NS16550_COM5 0x481a8000 /* UART4 */
	232	#define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */
5289e83a	233
b4116ede PR	234	/* I2C Configuration */
	235	#define CONFIG_I2C
	236	#define CONFIG_CMD_I2C
	237	#define CONFIG_HARD_I2C
	238	#define CONFIG_SYS_I2C_SPEED 100000
	239	#define CONFIG_SYS_I2C_SLAVE 1
d3decdeb	240	#define CONFIG_I2C_MULTI_BUS
b4116ede	241	#define CONFIG_DRIVER_OMAP24XX_I2C
726c05d2	242	#define CONFIG_CMD_EEPROM
a4a99fff	243	#define CONFIG_ENV_EEPROM_IS_ON_I2C
726c05d2 TR	244	#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */
	245	#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
	246	#define CONFIG_SYS_I2C_MULTI_EEPROMS
b4116ede	247
308252ad MV	248	#define CONFIG_OMAP_GPIO
308252ad MV	249
5289e83a CN	250	#define CONFIG_BAUDRATE 115200
	251	#define CONFIG_SYS_BAUDRATE_TABLE { 110, 300, 600, 1200, 2400, \
	252	4800, 9600, 14400, 19200, 28800, 38400, 56000, 57600, 115200 }
	253
c3f8318f	254	#define CONFIG_ENV_OVERWRITE 1
5289e83a CN	255	#define CONFIG_SYS_CONSOLE_INFO_QUIET
	256
	257	#define CONFIG_ENV_IS_NOWHERE
	258
8a8f084e CN	259	/* Defines for SPL */
8a8f084e CN	260	#define CONFIG_SPL
47f7bcae	261	#define CONFIG_SPL_FRAMEWORK
8a8f084e	262	#define CONFIG_SPL_TEXT_BASE 0x402F0400
6feb4e9d	263	#define CONFIG_SPL_MAX_SIZE (101 * 1024)
41aebf81	264	#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
8a8f084e CN	265
	266	#define CONFIG_SPL_BSS_START_ADDR 0x80000000
	267	#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
	268
	269	#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
	270	#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
	271	#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
	272	#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
	273	#define CONFIG_SPL_MMC_SUPPORT
	274	#define CONFIG_SPL_FAT_SUPPORT
b4116ede	275	#define CONFIG_SPL_I2C_SUPPORT
8a8f084e CN	276
	277	#define CONFIG_SPL_LIBCOMMON_SUPPORT
	278	#define CONFIG_SPL_LIBDISK_SUPPORT
	279	#define CONFIG_SPL_LIBGENERIC_SUPPORT
	280	#define CONFIG_SPL_SERIAL_SUPPORT
16e41c85	281	#define CONFIG_SPL_GPIO_SUPPORT
763cf0a3	282	#define CONFIG_SPL_YMODEM_SUPPORT
6feb4e9d IY	283	#define CONFIG_SPL_NET_SUPPORT
	284	#define CONFIG_SPL_NET_VCI_STRING "AM335x U-Boot SPL"
	285	#define CONFIG_SPL_ETH_SUPPORT
69916bcf TR	286	#define CONFIG_SPL_SPI_SUPPORT
	287	#define CONFIG_SPL_SPI_FLASH_SUPPORT
	288	#define CONFIG_SPL_SPI_LOAD
	289	#define CONFIG_SPL_SPI_BUS 0
	290	#define CONFIG_SPL_SPI_CS 0
4adfcd68	291	#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x80000
c0e66793	292	#define CONFIG_SPL_MUSB_NEW_SUPPORT
65cdd643	293	#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds"
8a8f084e	294
b4606c6c IY	295	#define CONFIG_SPL_BOARD_INIT
	296	#define CONFIG_SPL_NAND_AM33XX_BCH
	297	#define CONFIG_SPL_NAND_SUPPORT
79f38777 AA	298	#define CONFIG_SPL_NAND_BASE
	299	#define CONFIG_SPL_NAND_DRIVERS
	300	#define CONFIG_SPL_NAND_ECC
b4606c6c IY	301	#define CONFIG_SYS_NAND_5_ADDR_CYCLE
	302	#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
	303	CONFIG_SYS_NAND_PAGE_SIZE)
	304	#define CONFIG_SYS_NAND_PAGE_SIZE 2048
	305	#define CONFIG_SYS_NAND_OOBSIZE 64
	306	#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
	307	#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
	308	#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
	309	10, 11, 12, 13, 14, 15, 16, 17, \
	310	18, 19, 20, 21, 22, 23, 24, 25, \
	311	26, 27, 28, 29, 30, 31, 32, 33, \
	312	34, 35, 36, 37, 38, 39, 40, 41, \
	313	42, 43, 44, 45, 46, 47, 48, 49, \
	314	50, 51, 52, 53, 54, 55, 56, 57, }
	315
	316	#define CONFIG_SYS_NAND_ECCSIZE 512
	317	#define CONFIG_SYS_NAND_ECCBYTES 14
	318
	319	#define CONFIG_SYS_NAND_ECCSTEPS 4
	320	#define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \
	321	CONFIG_SYS_NAND_ECCSTEPS)
	322
	323	#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
	324
	325	#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
	326
8a8f084e CN	327	/*
	328	* 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
	329	* 64 bytes before this address should be set aside for u-boot.img's
	330	* header. That is 0x800FFFC0--0x80100000 should not be used for any
	331	* other needs.
	332	*/
	333	#define CONFIG_SYS_TEXT_BASE 0x80800000
	334	#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
	335	#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
	336
	337	/* Since SPL did pll and ddr initialization for us,
	338	* we don't need to do it twice.
	339	*/
	340	#ifndef CONFIG_SPL_BUILD
	341	#define CONFIG_SKIP_LOWLEVEL_INIT
	342	#endif
5289e83a	343
d2aa1154 IY	344	/*
	345	* USB configuration
	346	*/
	347	#define CONFIG_USB_MUSB_DSPS
	348	#define CONFIG_ARCH_MISC_INIT
	349	#define CONFIG_MUSB_GADGET
	350	#define CONFIG_MUSB_PIO_ONLY
	351	#define CONFIG_USB_GADGET_DUALSPEED
	352	#define CONFIG_MUSB_HOST
	353	#define CONFIG_AM335X_USB0
	354	#define CONFIG_AM335X_USB0_MODE MUSB_PERIPHERAL
	355	#define CONFIG_AM335X_USB1
	356	#define CONFIG_AM335X_USB1_MODE MUSB_HOST
	357
	358	#ifdef CONFIG_MUSB_HOST
	359	#define CONFIG_CMD_USB
	360	#define CONFIG_USB_STORAGE
	361	#endif
	362
	363	#ifdef CONFIG_MUSB_GADGET
	364	#define CONFIG_USB_ETHER
	365	#define CONFIG_USB_ETH_RNDIS
c0e66793	366	#define CONFIG_USBNET_HOST_ADDR "de:ad:be:af:00:00"
d2aa1154 IY	367	#endif /* CONFIG_MUSB_GADGET */
d2aa1154 IY	368
c0e66793 IY	369	#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_USBETH_SUPPORT)
	370	/* disable host part of MUSB in SPL */
	371	#undef CONFIG_MUSB_HOST
	372	/*
98bc1228	373	* Disable CPSW SPL support so we fit within the 101KiB limit.
c0e66793 IY	374	*/
c0e66793 IY	375	#undef CONFIG_SPL_ETH_SUPPORT
c0e66793 IY	376	#endif
c0e66793 IY	377
4adfcd68 TR	378	/*
	379	* Default to using SPI for environment, etc. We have multiple copies
	380	* of SPL as the ROM will check these locations.
	381	* 0x0 - 0x20000 : First copy of SPL
	382	* 0x20000 - 0x40000 : Second copy of SPL
	383	* 0x40000 - 0x60000 : Third copy of SPL
	384	* 0x60000 - 0x80000 : Fourth copy of SPL
	385	* 0x80000 - 0xDF000 : U-Boot
	386	* 0xDF000 - 0xE0000 : U-Boot Environment
	387	* 0xE0000 - 0x442000 : Linux Kernel
	388	* 0x442000 - 0x800000 : Userland
	389	*/
	390	#if defined(CONFIG_SPI_BOOT)
	391	# undef CONFIG_ENV_IS_NOWHERE
	392	# define CONFIG_ENV_IS_IN_SPI_FLASH
	393	# define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
	394	# define CONFIG_ENV_OFFSET (892 << 10) /* 892 KiB in */
	395	# define CONFIG_ENV_SECT_SIZE (4 << 10) /* 4 KB sectors */
	396	#endif /* SPI support */
	397
d2aa1154 IY	398	/* Unsupported features */
	399	#undef CONFIG_USE_IRQ
	400
93042960 CN	401	#define CONFIG_CMD_NET
	402	#define CONFIG_CMD_DHCP
	403	#define CONFIG_CMD_PING
	404	#define CONFIG_DRIVER_TI_CPSW
	405	#define CONFIG_MII
	406	#define CONFIG_BOOTP_DEFAULT
	407	#define CONFIG_BOOTP_DNS
	408	#define CONFIG_BOOTP_DNS2
	409	#define CONFIG_BOOTP_SEND_HOSTNAME
	410	#define CONFIG_BOOTP_GATEWAY
	411	#define CONFIG_BOOTP_SUBNETMASK
	412	#define CONFIG_NET_RETRY_COUNT 10
	413	#define CONFIG_NET_MULTI
	414	#define CONFIG_PHY_GIGE
	415	#define CONFIG_PHYLIB
cdd0729e	416	#define CONFIG_PHY_ADDR 0
c44080b2	417	#define CONFIG_PHY_SMSC
93042960	418
98b5c269 IY	419	#define CONFIG_NAND
	420	/* NAND support */
	421	#ifdef CONFIG_NAND
	422	#define CONFIG_CMD_NAND
	423	#define CONFIG_NAND_OMAP_GPMC
	424	#define GPMC_NAND_ECC_LP_x16_LAYOUT 1
	425	#define CONFIG_SYS_NAND_BASE (0x08000000) /* physical address */
	426	/* to access nand at */
	427	/* CS0 */
b4606c6c IY	428	#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND
b4606c6c IY	429	devices */
4adfcd68	430	#if !defined(CONFIG_SPI_BOOT)
b4606c6c IY	431	#undef CONFIG_ENV_IS_NOWHERE
	432	#define CONFIG_ENV_IS_IN_NAND
	433	#define CONFIG_ENV_OFFSET 0x260000 /* environment starts here */
	434	#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
	435	#endif
4adfcd68	436	#endif
98b5c269	437
5289e83a	438	#endif /* ! __CONFIG_AM335X_EVM_H */