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ed01e45c VH |
1 | /* |
2 | * am3517_evm.h - Default configuration for AM3517 EVM board. | |
3 | * | |
4 | * Author: Vaibhav Hiremath <hvaibhav@ti.com> | |
5 | * | |
6 | * Based on omap3_evm_config.h | |
7 | * | |
8 | * Copyright (C) 2010 Texas Instruments Incorporated | |
9 | * | |
1a459660 | 10 | * SPDX-License-Identifier: GPL-2.0+ |
ed01e45c VH |
11 | */ |
12 | ||
13 | #ifndef __CONFIG_H | |
14 | #define __CONFIG_H | |
15 | ||
3f53e619 | 16 | #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ |
1a5038ca | 17 | #define CONFIG_EMIF4 /* The chip has EMIF4 controller */ |
ed01e45c | 18 | |
3f53e619 DW |
19 | /* |
20 | * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM | |
21 | * 64 bytes before this address should be set aside for u-boot.img's | |
22 | * header. That is 0x800FFFC0--0x80100000 should not be used for any | |
23 | * other needs. | |
24 | */ | |
25 | #define CONFIG_SYS_TEXT_BASE 0x80100000 | |
26 | #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 | |
27 | #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 | |
28 | ||
261ec8f6 AF |
29 | #include <configs/ti_omap3_common.h> |
30 | #undef CONFIG_SDRC /* Disable SDRC since we have EMIF4 */ | |
ed01e45c | 31 | |
3f53e619 | 32 | #define CONFIG_MISC_INIT_R |
3f53e619 | 33 | #define CONFIG_REVISION_TAG |
ed01e45c | 34 | |
3f53e619 | 35 | /* Hardware drivers */ |
ed01e45c | 36 | |
3f53e619 | 37 | /* NS16550 Configuration */ |
ed01e45c VH |
38 | #define CONFIG_SYS_NS16550_SERIAL |
39 | #define CONFIG_SYS_NS16550_REG_SIZE (-4) | |
ed01e45c | 40 | |
3f53e619 | 41 | /* select serial console configuration */ |
ed01e45c VH |
42 | #define CONFIG_CONS_INDEX 3 |
43 | #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 | |
44 | #define CONFIG_SERIAL3 3 /* UART3 on AM3517 EVM */ | |
45 | ||
261ec8f6 | 46 | |
ed01e45c VH |
47 | /* allow to overwrite serial and ethaddr */ |
48 | #define CONFIG_ENV_OVERWRITE | |
3f53e619 | 49 | |
7dc27b05 AKG |
50 | /* |
51 | * USB configuration | |
95de1e2f PK |
52 | * Enable CONFIG_USB_MUSB_HOST for Host functionalities MSC, keyboard |
53 | * Enable CONFIG_USB_MUSB_GADGET for Device functionalities. | |
7dc27b05 | 54 | */ |
88919ff7 | 55 | #define CONFIG_USB_MUSB_AM35X |
95de1e2f | 56 | #define CONFIG_USB_MUSB_PIO_ONLY |
7dc27b05 | 57 | |
88919ff7 | 58 | #ifdef CONFIG_USB_MUSB_AM35X |
7dc27b05 | 59 | |
95de1e2f | 60 | #ifdef CONFIG_USB_MUSB_HOST |
7dc27b05 | 61 | |
7dc27b05 | 62 | #ifdef CONFIG_USB_KEYBOARD |
7dc27b05 AKG |
63 | #define CONFIG_PREBOOT "usb start" |
64 | #endif /* CONFIG_USB_KEYBOARD */ | |
65 | ||
95de1e2f | 66 | #endif /* CONFIG_USB_MUSB_HOST */ |
88919ff7 | 67 | |
95de1e2f | 68 | #ifdef CONFIG_USB_MUSB_GADGET |
88919ff7 IY |
69 | #define CONFIG_USB_ETHER |
70 | #define CONFIG_USB_ETH_RNDIS | |
95de1e2f | 71 | #endif /* CONFIG_USB_MUSB_GADGET */ |
88919ff7 IY |
72 | |
73 | #endif /* CONFIG_USB_MUSB_AM35X */ | |
7dc27b05 | 74 | |
3f53e619 | 75 | /* I2C */ |
6789e84e HS |
76 | #define CONFIG_SYS_I2C |
77 | #define CONFIG_SYS_OMAP24_I2C_SPEED 100000 | |
78 | #define CONFIG_SYS_OMAP24_I2C_SLAVE 1 | |
ed01e45c | 79 | |
3f53e619 | 80 | /* Ethernet */ |
18a02e80 TR |
81 | #define CONFIG_DRIVER_TI_EMAC |
82 | #define CONFIG_DRIVER_TI_EMAC_USE_RMII | |
83 | #define CONFIG_MII | |
84 | #define CONFIG_BOOTP_DEFAULT | |
85 | #define CONFIG_BOOTP_DNS | |
86 | #define CONFIG_BOOTP_DNS2 | |
87 | #define CONFIG_BOOTP_SEND_HOSTNAME | |
88 | #define CONFIG_NET_RETRY_COUNT 10 | |
89 | ||
3f53e619 DW |
90 | /* Board NAND Info. */ |
91 | #ifdef CONFIG_NAND | |
3f53e619 | 92 | #define CONFIG_NAND_OMAP_GPMC_PREFETCH |
ed01e45c VH |
93 | #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ |
94 | /* to access nand */ | |
3f53e619 DW |
95 | #define CONFIG_SYS_NAND_BUSWIDTH_16BIT |
96 | #define CONFIG_SYS_NAND_5_ADDR_CYCLE | |
97 | #define CONFIG_SYS_NAND_PAGE_COUNT 64 | |
98 | #define CONFIG_SYS_NAND_PAGE_SIZE 2048 | |
99 | #define CONFIG_SYS_NAND_OOBSIZE 64 | |
100 | #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) | |
101 | #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS | |
102 | #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, 10, \ | |
103 | 11, 12, 13, 14, 16, 17, 18, 19, 20, \ | |
104 | 21, 22, 23, 24, 25, 26, 27, 28, 30, \ | |
105 | 31, 32, 33, 34, 35, 36, 37, 38, 39, \ | |
106 | 40, 41, 42, 44, 45, 46, 47, 48, 49, \ | |
107 | 50, 51, 52, 53, 54, 55, 56 } | |
108 | ||
109 | #define CONFIG_SYS_NAND_ECCSIZE 512 | |
110 | #define CONFIG_SYS_NAND_ECCBYTES 13 | |
111 | #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW | |
112 | #define CONFIG_SYS_NAND_MAX_OOBFREE 2 | |
113 | #define CONFIG_SYS_NAND_MAX_ECCPOS 56 | |
114 | #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE | |
115 | #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 | |
116 | #define CONFIG_MTD_PARTITIONS /* required for UBI partition support */ | |
117 | #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ | |
118 | /* NAND block size is 128 KiB. Synchronize these values with | |
119 | * corresponding Device Tree entries in Linux: | |
120 | * MLO(SPL) 4 * NAND_BLOCK_SIZE = 512 KiB @ 0x000000 | |
121 | * U-Boot 15 * NAND_BLOCK_SIZE = 1920 KiB @ 0x080000 | |
122 | * U-Boot environment 2 * NAND_BLOCK_SIZE = 256 KiB @ 0x260000 | |
123 | * Kernel 64 * NAND_BLOCK_SIZE = 8 MiB @ 0x2A0000 | |
124 | * DTB 4 * NAND_BLOCK_SIZE = 512 KiB @ 0xAA0000 | |
125 | * RootFS Remaining Flash Space @ 0xB20000 | |
126 | */ | |
127 | #define MTDIDS_DEFAULT "nand0=omap2-nand.0" | |
128 | #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:" \ | |
129 | "512k(MLO)," \ | |
130 | "1920k(u-boot)," \ | |
131 | "256k(u-boot-env)," \ | |
132 | "8m(kernel)," \ | |
133 | "512k(dtb)," \ | |
134 | "-(rootfs)" | |
135 | #else | |
136 | #define MTDIDS_DEFAULT | |
137 | #define MTDPARTS_DEFAULT | |
138 | #endif /* CONFIG_NAND */ | |
ed01e45c VH |
139 | |
140 | /* Environment information */ | |
ed01e45c | 141 | |
b3f44c21 | 142 | #define CONFIG_BOOTFILE "uImage" |
ed01e45c VH |
143 | |
144 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
145 | "loadaddr=0x82000000\0" \ | |
49473ada | 146 | "console=ttyO2,115200n8\0" \ |
45776e36 DW |
147 | "fdtfile=am3517-evm.dtb\0" \ |
148 | "fdtaddr=0x82C00000\0" \ | |
149 | "vram=16M\0" \ | |
150 | "bootenv=uEnv.txt\0" \ | |
151 | "cmdline=\0" \ | |
152 | "optargs=\0" \ | |
3f53e619 DW |
153 | "mtdids=" MTDIDS_DEFAULT "\0" \ |
154 | "mtdparts=" MTDPARTS_DEFAULT "\0" \ | |
122e6e0a | 155 | "mmcdev=0\0" \ |
45776e36 DW |
156 | "mmcpart=1\0" \ |
157 | "mmcroot=/dev/mmcblk0p2 rw\0" \ | |
158 | "mmcrootfstype=ext4 rootwait fixrtc\0" \ | |
ed01e45c | 159 | "mmcargs=setenv bootargs console=${console} " \ |
3f53e619 | 160 | "${mtdparts} " \ |
45776e36 DW |
161 | "${optargs} " \ |
162 | "root=${mmcroot} " \ | |
163 | "rootfstype=${mmcrootfstype} " \ | |
164 | "${cmdline}\0" \ | |
ed01e45c | 165 | "nandargs=setenv bootargs console=${console} " \ |
3f53e619 DW |
166 | "${mtdparts} " \ |
167 | "${optargs} " \ | |
168 | "root=ubi0:rootfs rw ubi.mtd=rootfs " \ | |
169 | "rootfstype=ubifs rootwait " \ | |
170 | "${cmdline}\0" \ | |
45776e36 DW |
171 | "loadbootenv=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${bootenv}\0"\ |
172 | "importbootenv=echo Importing environment from mmc ...; " \ | |
173 | "env import -t ${loadaddr} ${filesize}\0" \ | |
ed01e45c VH |
174 | "bootscript=echo Running bootscript from mmc ...; " \ |
175 | "source ${loadaddr}\0" \ | |
45776e36 DW |
176 | "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${bootfile}\0" \ |
177 | "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdtaddr} ${fdtfile}\0" \ | |
ed01e45c VH |
178 | "mmcboot=echo Booting from mmc ...; " \ |
179 | "run mmcargs; " \ | |
45776e36 | 180 | "bootz ${loadaddr} - ${fdtaddr}\0" \ |
ed01e45c VH |
181 | "nandboot=echo Booting from nand ...; " \ |
182 | "run nandargs; " \ | |
3f53e619 DW |
183 | "nand read ${loadaddr} 2a0000 800000; " \ |
184 | "nand read ${fdtaddr} aa0000 80000; " \ | |
185 | "bootm ${loadaddr} - ${fdtaddr}\0" \ | |
ed01e45c VH |
186 | |
187 | #define CONFIG_BOOTCOMMAND \ | |
66968110 | 188 | "mmc dev ${mmcdev}; if mmc rescan; then " \ |
45776e36 DW |
189 | "echo SD/MMC found on device $mmcdev; " \ |
190 | "if run loadbootenv; then " \ | |
191 | "run importbootenv; " \ | |
192 | "fi; " \ | |
193 | "echo Checking if uenvcmd is set ...; " \ | |
194 | "if test -n $uenvcmd; then " \ | |
195 | "echo Running uenvcmd ...; " \ | |
196 | "run uenvcmd; " \ | |
197 | "fi; " \ | |
198 | "echo Running default loadimage ...; " \ | |
199 | "setenv bootfile zImage; " \ | |
200 | "if run loadimage; then " \ | |
201 | "run loadfdt; " \ | |
202 | "run mmcboot; " \ | |
ed01e45c VH |
203 | "fi; " \ |
204 | "else run nandboot; fi" | |
205 | ||
3f53e619 DW |
206 | /* Miscellaneous configurable options */ |
207 | #define CONFIG_AUTO_COMPLETE | |
208 | #define CONFIG_CMDLINE_EDITING | |
3f53e619 | 209 | #define CONFIG_SYS_LONGHELP |
3f53e619 DW |
210 | |
211 | /* We set the max number of command args high to avoid HUSH bugs. */ | |
212 | #define CONFIG_SYS_MAXARGS 64 | |
213 | ||
261ec8f6 AF |
214 | /* Print Buffer Size */ |
215 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \ | |
216 | + sizeof(CONFIG_SYS_PROMPT) + 16) | |
217 | /* Boot Argument Buffer Size */ | |
218 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE | |
3f53e619 | 219 | |
ed01e45c VH |
220 | /* memtest works on */ |
221 | #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) | |
222 | #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ | |
223 | 0x01F00000) /* 31MB */ | |
224 | ||
3f53e619 | 225 | /* Physical Memory Map */ |
3f53e619 | 226 | #define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024) |
3f53e619 DW |
227 | #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 |
228 | #define CONFIG_SYS_INIT_RAM_SIZE 0x800 | |
ed01e45c | 229 | |
3f53e619 | 230 | /* FLASH and environment organization */ |
ed01e45c VH |
231 | |
232 | /* **** PISMO SUPPORT *** */ | |
ed01e45c VH |
233 | #define CONFIG_SYS_MAX_FLASH_SECT 520 /* max number of sectors */ |
234 | /* on one chip */ | |
235 | #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of flash banks */ | |
236 | #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ | |
237 | ||
3f53e619 | 238 | #if defined(CONFIG_NAND) |
222a3113 | 239 | #define CONFIG_SYS_FLASH_BASE NAND_BASE |
6cbec7b3 | 240 | #endif |
ed01e45c VH |
241 | |
242 | /* Monitor at start of flash */ | |
243 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE | |
244 | ||
6cbec7b3 | 245 | #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ |
3f53e619 DW |
246 | #define CONFIG_ENV_SIZE CONFIG_SYS_ENV_SECT_SIZE |
247 | #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ | |
6cbec7b3 LC |
248 | #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET |
249 | #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET | |
5059a2a4 TR |
250 | |
251 | /* Defines for SPL */ | |
47f7bcae | 252 | #define CONFIG_SPL_FRAMEWORK |
261ec8f6 | 253 | #undef CONFIG_SPL_TEXT_BASE |
138daa7b | 254 | #define CONFIG_SPL_TEXT_BASE 0x40200000 |
fa2f81b0 TR |
255 | #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ |
256 | CONFIG_SPL_TEXT_BASE) | |
5059a2a4 | 257 | |
261ec8f6 | 258 | #undef CONFIG_SPL_BSS_START_ADDR |
5059a2a4 TR |
259 | #define CONFIG_SPL_BSS_START_ADDR 0x80000000 |
260 | #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ | |
261 | ||
e2ccdf89 | 262 | #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 |
3f53e619 | 263 | #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" |
5059a2a4 | 264 | |
6f2f01b9 SW |
265 | #define CONFIG_SPL_NAND_BASE |
266 | #define CONFIG_SPL_NAND_DRIVERS | |
267 | #define CONFIG_SPL_NAND_ECC | |
5059a2a4 | 268 | |
ed01e45c | 269 | #endif /* __CONFIG_H */ |