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ed01e45c VH |
1 | /* |
2 | * am3517_evm.h - Default configuration for AM3517 EVM board. | |
3 | * | |
4 | * Author: Vaibhav Hiremath <hvaibhav@ti.com> | |
5 | * | |
6 | * Based on omap3_evm_config.h | |
7 | * | |
8 | * Copyright (C) 2010 Texas Instruments Incorporated | |
9 | * | |
1a459660 | 10 | * SPDX-License-Identifier: GPL-2.0+ |
ed01e45c VH |
11 | */ |
12 | ||
13 | #ifndef __CONFIG_H | |
14 | #define __CONFIG_H | |
15 | ||
3f53e619 | 16 | #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ |
ed01e45c | 17 | |
3f53e619 DW |
18 | /* |
19 | * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM | |
20 | * 64 bytes before this address should be set aside for u-boot.img's | |
21 | * header. That is 0x800FFFC0--0x80100000 should not be used for any | |
22 | * other needs. | |
23 | */ | |
b85781c2 | 24 | |
3f53e619 DW |
25 | #define CONFIG_SYS_TEXT_BASE 0x80100000 |
26 | #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 | |
27 | #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 | |
28 | ||
261ec8f6 AF |
29 | #include <configs/ti_omap3_common.h> |
30 | #undef CONFIG_SDRC /* Disable SDRC since we have EMIF4 */ | |
ed01e45c | 31 | |
3f53e619 | 32 | #define CONFIG_MISC_INIT_R |
3f53e619 | 33 | #define CONFIG_REVISION_TAG |
ed01e45c | 34 | |
3f53e619 | 35 | /* Hardware drivers */ |
ed01e45c | 36 | |
ed01e45c VH |
37 | /* allow to overwrite serial and ethaddr */ |
38 | #define CONFIG_ENV_OVERWRITE | |
3f53e619 | 39 | |
7dc27b05 AKG |
40 | /* |
41 | * USB configuration | |
95de1e2f PK |
42 | * Enable CONFIG_USB_MUSB_HOST for Host functionalities MSC, keyboard |
43 | * Enable CONFIG_USB_MUSB_GADGET for Device functionalities. | |
7dc27b05 | 44 | */ |
88919ff7 | 45 | #define CONFIG_USB_MUSB_AM35X |
95de1e2f | 46 | #define CONFIG_USB_MUSB_PIO_ONLY |
7dc27b05 | 47 | |
88919ff7 | 48 | #ifdef CONFIG_USB_MUSB_AM35X |
7dc27b05 | 49 | |
95de1e2f | 50 | #ifdef CONFIG_USB_MUSB_HOST |
7dc27b05 | 51 | |
7dc27b05 | 52 | #ifdef CONFIG_USB_KEYBOARD |
7dc27b05 AKG |
53 | #define CONFIG_PREBOOT "usb start" |
54 | #endif /* CONFIG_USB_KEYBOARD */ | |
55 | ||
95de1e2f | 56 | #endif /* CONFIG_USB_MUSB_HOST */ |
88919ff7 | 57 | |
95de1e2f | 58 | #ifdef CONFIG_USB_MUSB_GADGET |
88919ff7 | 59 | #define CONFIG_USB_ETH_RNDIS |
95de1e2f | 60 | #endif /* CONFIG_USB_MUSB_GADGET */ |
88919ff7 IY |
61 | |
62 | #endif /* CONFIG_USB_MUSB_AM35X */ | |
7dc27b05 | 63 | |
3f53e619 | 64 | /* I2C */ |
6789e84e HS |
65 | #define CONFIG_SYS_OMAP24_I2C_SPEED 100000 |
66 | #define CONFIG_SYS_OMAP24_I2C_SLAVE 1 | |
ed01e45c | 67 | |
3f53e619 | 68 | /* Ethernet */ |
18a02e80 TR |
69 | #define CONFIG_DRIVER_TI_EMAC |
70 | #define CONFIG_DRIVER_TI_EMAC_USE_RMII | |
71 | #define CONFIG_MII | |
72 | #define CONFIG_BOOTP_DEFAULT | |
73 | #define CONFIG_BOOTP_DNS | |
74 | #define CONFIG_BOOTP_DNS2 | |
75 | #define CONFIG_BOOTP_SEND_HOSTNAME | |
76 | #define CONFIG_NET_RETRY_COUNT 10 | |
77 | ||
3f53e619 DW |
78 | /* Board NAND Info. */ |
79 | #ifdef CONFIG_NAND | |
3f53e619 | 80 | #define CONFIG_NAND_OMAP_GPMC_PREFETCH |
ed01e45c VH |
81 | #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ |
82 | /* to access nand */ | |
3f53e619 DW |
83 | #define CONFIG_SYS_NAND_BUSWIDTH_16BIT |
84 | #define CONFIG_SYS_NAND_5_ADDR_CYCLE | |
85 | #define CONFIG_SYS_NAND_PAGE_COUNT 64 | |
86 | #define CONFIG_SYS_NAND_PAGE_SIZE 2048 | |
87 | #define CONFIG_SYS_NAND_OOBSIZE 64 | |
88 | #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) | |
89 | #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS | |
90 | #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, 10, \ | |
91 | 11, 12, 13, 14, 16, 17, 18, 19, 20, \ | |
92 | 21, 22, 23, 24, 25, 26, 27, 28, 30, \ | |
93 | 31, 32, 33, 34, 35, 36, 37, 38, 39, \ | |
94 | 40, 41, 42, 44, 45, 46, 47, 48, 49, \ | |
95 | 50, 51, 52, 53, 54, 55, 56 } | |
96 | ||
97 | #define CONFIG_SYS_NAND_ECCSIZE 512 | |
98 | #define CONFIG_SYS_NAND_ECCBYTES 13 | |
99 | #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW | |
100 | #define CONFIG_SYS_NAND_MAX_OOBFREE 2 | |
101 | #define CONFIG_SYS_NAND_MAX_ECCPOS 56 | |
102 | #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE | |
103 | #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 | |
104 | #define CONFIG_MTD_PARTITIONS /* required for UBI partition support */ | |
105 | #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ | |
106 | /* NAND block size is 128 KiB. Synchronize these values with | |
107 | * corresponding Device Tree entries in Linux: | |
108 | * MLO(SPL) 4 * NAND_BLOCK_SIZE = 512 KiB @ 0x000000 | |
109 | * U-Boot 15 * NAND_BLOCK_SIZE = 1920 KiB @ 0x080000 | |
110 | * U-Boot environment 2 * NAND_BLOCK_SIZE = 256 KiB @ 0x260000 | |
111 | * Kernel 64 * NAND_BLOCK_SIZE = 8 MiB @ 0x2A0000 | |
112 | * DTB 4 * NAND_BLOCK_SIZE = 512 KiB @ 0xAA0000 | |
113 | * RootFS Remaining Flash Space @ 0xB20000 | |
114 | */ | |
115 | #define MTDIDS_DEFAULT "nand0=omap2-nand.0" | |
116 | #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:" \ | |
117 | "512k(MLO)," \ | |
118 | "1920k(u-boot)," \ | |
119 | "256k(u-boot-env)," \ | |
120 | "8m(kernel)," \ | |
121 | "512k(dtb)," \ | |
122 | "-(rootfs)" | |
123 | #else | |
124 | #define MTDIDS_DEFAULT | |
125 | #define MTDPARTS_DEFAULT | |
126 | #endif /* CONFIG_NAND */ | |
ed01e45c VH |
127 | |
128 | /* Environment information */ | |
ed01e45c | 129 | |
b3f44c21 | 130 | #define CONFIG_BOOTFILE "uImage" |
ed01e45c VH |
131 | |
132 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
133 | "loadaddr=0x82000000\0" \ | |
49473ada | 134 | "console=ttyO2,115200n8\0" \ |
45776e36 DW |
135 | "fdtfile=am3517-evm.dtb\0" \ |
136 | "fdtaddr=0x82C00000\0" \ | |
137 | "vram=16M\0" \ | |
138 | "bootenv=uEnv.txt\0" \ | |
139 | "cmdline=\0" \ | |
140 | "optargs=\0" \ | |
3f53e619 DW |
141 | "mtdids=" MTDIDS_DEFAULT "\0" \ |
142 | "mtdparts=" MTDPARTS_DEFAULT "\0" \ | |
122e6e0a | 143 | "mmcdev=0\0" \ |
45776e36 DW |
144 | "mmcpart=1\0" \ |
145 | "mmcroot=/dev/mmcblk0p2 rw\0" \ | |
146 | "mmcrootfstype=ext4 rootwait fixrtc\0" \ | |
ed01e45c | 147 | "mmcargs=setenv bootargs console=${console} " \ |
3f53e619 | 148 | "${mtdparts} " \ |
45776e36 DW |
149 | "${optargs} " \ |
150 | "root=${mmcroot} " \ | |
151 | "rootfstype=${mmcrootfstype} " \ | |
152 | "${cmdline}\0" \ | |
ed01e45c | 153 | "nandargs=setenv bootargs console=${console} " \ |
3f53e619 DW |
154 | "${mtdparts} " \ |
155 | "${optargs} " \ | |
156 | "root=ubi0:rootfs rw ubi.mtd=rootfs " \ | |
157 | "rootfstype=ubifs rootwait " \ | |
158 | "${cmdline}\0" \ | |
45776e36 DW |
159 | "loadbootenv=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${bootenv}\0"\ |
160 | "importbootenv=echo Importing environment from mmc ...; " \ | |
161 | "env import -t ${loadaddr} ${filesize}\0" \ | |
ed01e45c VH |
162 | "bootscript=echo Running bootscript from mmc ...; " \ |
163 | "source ${loadaddr}\0" \ | |
45776e36 DW |
164 | "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${bootfile}\0" \ |
165 | "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdtaddr} ${fdtfile}\0" \ | |
ed01e45c VH |
166 | "mmcboot=echo Booting from mmc ...; " \ |
167 | "run mmcargs; " \ | |
45776e36 | 168 | "bootz ${loadaddr} - ${fdtaddr}\0" \ |
ed01e45c VH |
169 | "nandboot=echo Booting from nand ...; " \ |
170 | "run nandargs; " \ | |
3f53e619 DW |
171 | "nand read ${loadaddr} 2a0000 800000; " \ |
172 | "nand read ${fdtaddr} aa0000 80000; " \ | |
173 | "bootm ${loadaddr} - ${fdtaddr}\0" \ | |
ed01e45c VH |
174 | |
175 | #define CONFIG_BOOTCOMMAND \ | |
66968110 | 176 | "mmc dev ${mmcdev}; if mmc rescan; then " \ |
45776e36 DW |
177 | "echo SD/MMC found on device $mmcdev; " \ |
178 | "if run loadbootenv; then " \ | |
179 | "run importbootenv; " \ | |
180 | "fi; " \ | |
181 | "echo Checking if uenvcmd is set ...; " \ | |
182 | "if test -n $uenvcmd; then " \ | |
183 | "echo Running uenvcmd ...; " \ | |
184 | "run uenvcmd; " \ | |
185 | "fi; " \ | |
186 | "echo Running default loadimage ...; " \ | |
187 | "setenv bootfile zImage; " \ | |
188 | "if run loadimage; then " \ | |
189 | "run loadfdt; " \ | |
190 | "run mmcboot; " \ | |
ed01e45c VH |
191 | "fi; " \ |
192 | "else run nandboot; fi" | |
193 | ||
3f53e619 DW |
194 | /* Miscellaneous configurable options */ |
195 | #define CONFIG_AUTO_COMPLETE | |
196 | #define CONFIG_CMDLINE_EDITING | |
3f53e619 | 197 | #define CONFIG_SYS_LONGHELP |
3f53e619 DW |
198 | |
199 | /* We set the max number of command args high to avoid HUSH bugs. */ | |
200 | #define CONFIG_SYS_MAXARGS 64 | |
201 | ||
261ec8f6 AF |
202 | /* Print Buffer Size */ |
203 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \ | |
204 | + sizeof(CONFIG_SYS_PROMPT) + 16) | |
205 | /* Boot Argument Buffer Size */ | |
206 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE | |
3f53e619 | 207 | |
ed01e45c VH |
208 | /* memtest works on */ |
209 | #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) | |
210 | #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ | |
211 | 0x01F00000) /* 31MB */ | |
212 | ||
3f53e619 | 213 | /* Physical Memory Map */ |
3f53e619 | 214 | #define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024) |
3f53e619 DW |
215 | #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 |
216 | #define CONFIG_SYS_INIT_RAM_SIZE 0x800 | |
ed01e45c | 217 | |
3f53e619 | 218 | /* FLASH and environment organization */ |
ed01e45c VH |
219 | |
220 | /* **** PISMO SUPPORT *** */ | |
ed01e45c VH |
221 | #define CONFIG_SYS_MAX_FLASH_SECT 520 /* max number of sectors */ |
222 | /* on one chip */ | |
223 | #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of flash banks */ | |
224 | #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ | |
225 | ||
3f53e619 | 226 | #if defined(CONFIG_NAND) |
222a3113 | 227 | #define CONFIG_SYS_FLASH_BASE NAND_BASE |
6cbec7b3 | 228 | #endif |
ed01e45c VH |
229 | |
230 | /* Monitor at start of flash */ | |
231 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE | |
232 | ||
6cbec7b3 | 233 | #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ |
3f53e619 | 234 | #define CONFIG_ENV_SIZE CONFIG_SYS_ENV_SECT_SIZE |
7672d9d5 AF |
235 | #define CONFIG_ENV_OFFSET 0x260000 |
236 | #define CONFIG_ENV_ADDR 0x260000 | |
5059a2a4 TR |
237 | |
238 | /* Defines for SPL */ | |
47f7bcae | 239 | #define CONFIG_SPL_FRAMEWORK |
261ec8f6 | 240 | #undef CONFIG_SPL_TEXT_BASE |
138daa7b | 241 | #define CONFIG_SPL_TEXT_BASE 0x40200000 |
5059a2a4 | 242 | |
261ec8f6 | 243 | #undef CONFIG_SPL_BSS_START_ADDR |
5059a2a4 TR |
244 | #define CONFIG_SPL_BSS_START_ADDR 0x80000000 |
245 | #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ | |
246 | ||
e2ccdf89 | 247 | #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 |
3f53e619 | 248 | #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" |
5059a2a4 | 249 | |
6f2f01b9 SW |
250 | #define CONFIG_SPL_NAND_BASE |
251 | #define CONFIG_SPL_NAND_DRIVERS | |
252 | #define CONFIG_SPL_NAND_ECC | |
5059a2a4 | 253 | |
ed01e45c | 254 | #endif /* __CONFIG_H */ |