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Commit | Line | Data |
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8d0afcd7 LV |
1 | /* |
2 | * am43xx_evm.h | |
3 | * | |
4 | * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ | |
5 | * | |
6 | * SPDX-License-Identifier: GPL-2.0+ | |
7 | */ | |
8 | ||
9 | #ifndef __CONFIG_AM43XX_EVM_H | |
10 | #define __CONFIG_AM43XX_EVM_H | |
11 | ||
369cbe1e LV |
12 | #define CONFIG_BOARD_LATE_INIT |
13 | #define CONFIG_ARCH_CPU_INIT | |
14 | #define CONFIG_SYS_CACHELINE_SIZE 32 | |
42da5adf | 15 | #define CONFIG_MAX_RAM_BANK_SIZE (1024 << 21) /* 2GB */ |
8d0afcd7 | 16 | #define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ |
369cbe1e LV |
17 | |
18 | #include <asm/arch/omap.h> | |
8d0afcd7 LV |
19 | |
20 | /* NS16550 Configuration */ | |
c7b9686d | 21 | #define CONFIG_SYS_NS16550_CLK 48000000 |
2a429d23 | 22 | #if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_DM_SERIAL) |
8d0afcd7 | 23 | #define CONFIG_SYS_NS16550_SERIAL |
2a429d23 | 24 | #define CONFIG_SYS_NS16550_REG_SIZE (-4) |
2a429d23 | 25 | #endif |
8d0afcd7 | 26 | |
9f1a8cd3 SN |
27 | /* I2C Configuration */ |
28 | #define CONFIG_CMD_EEPROM | |
29 | #define CONFIG_ENV_EEPROM_IS_ON_I2C | |
30 | #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */ | |
31 | #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 | |
9f1a8cd3 | 32 | |
83bad102 | 33 | /* Power */ |
7aa5598a TR |
34 | #define CONFIG_POWER |
35 | #define CONFIG_POWER_I2C | |
83bad102 | 36 | #define CONFIG_POWER_TPS65218 |
403d70ab | 37 | #define CONFIG_POWER_TPS62362 |
83bad102 | 38 | |
369cbe1e | 39 | /* SPL defines. */ |
aee119bd M |
40 | #ifdef CONFIG_SPL_USB_HOST_SUPPORT |
41 | /* | |
42 | * For USB host boot, ROM uses DMA for copying MLO from USB storage | |
43 | * and ARM internal ram is not accessible for DMA, so SPL text base | |
44 | * should be in OCMC ram | |
45 | */ | |
46 | #define CONFIG_SPL_TEXT_BASE 0x40300350 | |
47 | #else | |
46a14a63 | 48 | #define CONFIG_SPL_TEXT_BASE 0x402F4000 |
aee119bd | 49 | #endif |
b1cde7e2 | 50 | #define CONFIG_SPL_MAX_SIZE (220 << 10) /* 220KB */ |
d3289aac TR |
51 | #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \ |
52 | (128 << 20)) | |
83bad102 | 53 | #define CONFIG_SPL_POWER_SUPPORT |
369cbe1e | 54 | #define CONFIG_SPL_YMODEM_SUPPORT |
8d0afcd7 | 55 | |
573b020e LV |
56 | /* Enabling L2 Cache */ |
57 | #define CONFIG_SYS_L2_PL310 | |
58 | #define CONFIG_SYS_PL310_BASE 0x48242000 | |
59 | #define CONFIG_SYS_CACHELINE_SIZE 32 | |
60 | ||
8d0afcd7 | 61 | /* |
369cbe1e LV |
62 | * Since SPL did pll and ddr initialization for us, |
63 | * we don't need to do it twice. | |
8d0afcd7 | 64 | */ |
7a5f71bc | 65 | #if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_QSPI_BOOT) |
8d0afcd7 LV |
66 | #define CONFIG_SKIP_LOWLEVEL_INIT |
67 | #endif | |
68 | ||
196311dc TR |
69 | /* |
70 | * When building U-Boot such that there is no previous loader | |
71 | * we need to call board_early_init_f. This is taken care of in | |
72 | * s_init when we have SPL used. | |
73 | */ | |
74 | #if !defined(CONFIG_SKIP_LOWLEVEL_INIT) && !defined(CONFIG_SPL) | |
75 | #define CONFIG_BOARD_EARLY_INIT_F | |
76 | #endif | |
77 | ||
369cbe1e | 78 | /* Now bring in the rest of the common code. */ |
9a0f4004 | 79 | #include <configs/ti_armv7_omap.h> |
8d0afcd7 | 80 | |
7a5f71bc SP |
81 | /* Always 64 KiB env size */ |
82 | #define CONFIG_ENV_SIZE (64 << 10) | |
8d0afcd7 | 83 | |
369cbe1e | 84 | #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG |
8d0afcd7 | 85 | |
369cbe1e LV |
86 | /* Clock Defines */ |
87 | #define V_OSCK 24000000 /* Clock output from T2 */ | |
88 | #define V_SCLK (V_OSCK) | |
8d0afcd7 | 89 | |
369cbe1e LV |
90 | /* NS16550 Configuration */ |
91 | #define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */ | |
92 | ||
76bfd162 FB |
93 | #define CONFIG_ENV_IS_IN_FAT |
94 | #define FAT_ENV_INTERFACE "mmc" | |
95 | #define FAT_ENV_DEVICE_AND_PART "0:1" | |
96 | #define FAT_ENV_FILE "uboot.env" | |
97 | #define CONFIG_FAT_WRITE | |
369cbe1e LV |
98 | |
99 | #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" | |
8d0afcd7 | 100 | |
2b36fe57 | 101 | /* SPL USB Support */ |
aee119bd | 102 | #ifdef CONFIG_SPL_USB_HOST_SUPPORT |
2b36fe57 | 103 | #define CONFIG_SPL_USB_SUPPORT |
592bc5e2 | 104 | #endif |
2b36fe57 | 105 | |
592bc5e2 M |
106 | #if defined(CONFIG_SPL_USB_HOST_SUPPORT) || !defined(CONFIG_SPL_BUILD) |
107 | #define CONFIG_SYS_USB_FAT_BOOT_PARTITION 1 | |
3d799c7f DM |
108 | #define CONFIG_USB_HOST |
109 | #define CONFIG_USB_XHCI | |
2770448c | 110 | #define CONFIG_USB_XHCI_DWC3 |
3d799c7f DM |
111 | #define CONFIG_USB_XHCI_OMAP |
112 | #define CONFIG_USB_STORAGE | |
113 | #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 | |
114 | ||
115 | #define CONFIG_OMAP_USB_PHY | |
116 | #define CONFIG_AM437X_USB2PHY2_HOST | |
aee119bd | 117 | #endif |
3d799c7f | 118 | |
a59a77f8 | 119 | #if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_SPL_USBETH_SUPPORT) |
b142729d | 120 | #undef CONFIG_USB_DWC3_PHY_OMAP |
c16bf621 | 121 | #undef CONFIG_USB_DWC3_OMAP |
3457bbaf | 122 | #undef CONFIG_USB_DWC3 |
65403f30 | 123 | #undef CONFIG_USB_DWC3_GADGET |
3457bbaf | 124 | |
aaa4a9e3 | 125 | #undef CONFIG_USB_GADGET_DOWNLOAD |
a59a77f8 | 126 | #undef CONFIG_USB_GADGET_VBUS_DRAW |
e6c0bc06 SP |
127 | #undef CONFIG_G_DNL_MANUFACTURER |
128 | #undef CONFIG_G_DNL_VENDOR_NUM | |
129 | #undef CONFIG_G_DNL_PRODUCT_NUM | |
3457bbaf | 130 | #undef CONFIG_USB_GADGET_DUALSPEED |
a59a77f8 SP |
131 | #endif |
132 | ||
8aff39e3 M |
133 | /* |
134 | * Disable MMC DM for SPL build and can be re-enabled after adding | |
135 | * DM support in SPL | |
136 | */ | |
137 | #ifdef CONFIG_SPL_BUILD | |
138 | #undef CONFIG_DM_MMC | |
49f85b67 M |
139 | #undef CONFIG_DM_SPI |
140 | #undef CONFIG_DM_SPI_FLASH | |
1ce32ba7 | 141 | #undef CONFIG_TIMER |
8aff39e3 M |
142 | #endif |
143 | ||
a69e2c22 KVA |
144 | #ifndef CONFIG_SPL_BUILD |
145 | /* USB Device Firmware Update support */ | |
01acd6ab | 146 | #define CONFIG_USB_FUNCTION_DFU |
a69e2c22 | 147 | #define CONFIG_DFU_RAM |
a69e2c22 KVA |
148 | |
149 | #define CONFIG_DFU_MMC | |
150 | #define DFU_ALT_INFO_MMC \ | |
151 | "dfu_alt_info_mmc=" \ | |
152 | "boot part 0 1;" \ | |
153 | "rootfs part 0 2;" \ | |
154 | "MLO fat 0 1;" \ | |
155 | "spl-os-args fat 0 1;" \ | |
156 | "spl-os-image fat 0 1;" \ | |
157 | "u-boot.img fat 0 1;" \ | |
158 | "uEnv.txt fat 0 1\0" | |
159 | ||
160 | #define DFU_ALT_INFO_EMMC \ | |
161 | "dfu_alt_info_emmc=" \ | |
162 | "MLO raw 0x100 0x100 mmcpart 0;" \ | |
163 | "u-boot.img raw 0x300 0x1000 mmcpart 0\0" | |
164 | ||
165 | #define CONFIG_DFU_RAM | |
166 | #define DFU_ALT_INFO_RAM \ | |
167 | "dfu_alt_info_ram=" \ | |
168 | "kernel ram 0x80200000 0x4000000;" \ | |
169 | "fdt ram 0x80f80000 0x80000;" \ | |
170 | "ramdisk ram 0x81000000 0x4000000\0" | |
171 | ||
42d1b818 V |
172 | #define CONFIG_DFU_SF |
173 | #define DFU_ALT_INFO_QSPI \ | |
174 | "dfu_alt_info_qspi=" \ | |
175 | "u-boot.bin raw 0x0 0x080000;" \ | |
176 | "u-boot.backup raw 0x080000 0x080000;" \ | |
177 | "u-boot-spl-os raw 0x100000 0x010000;" \ | |
178 | "u-boot-env raw 0x110000 0x010000;" \ | |
179 | "u-boot-env.backup raw 0x120000 0x010000;" \ | |
180 | "kernel raw 0x130000 0x800000\0" | |
181 | ||
a69e2c22 KVA |
182 | #define DFUARGS \ |
183 | "dfu_bufsiz=0x10000\0" \ | |
184 | DFU_ALT_INFO_MMC \ | |
185 | DFU_ALT_INFO_EMMC \ | |
42d1b818 V |
186 | DFU_ALT_INFO_RAM \ |
187 | DFU_ALT_INFO_QSPI | |
a69e2c22 KVA |
188 | #else |
189 | #define DFUARGS | |
190 | #endif | |
191 | ||
7a5f71bc SP |
192 | #ifdef CONFIG_QSPI_BOOT |
193 | #define CONFIG_SYS_TEXT_BASE 0x30000000 | |
76bfd162 | 194 | #undef CONFIG_ENV_IS_IN_FAT |
7a5f71bc SP |
195 | #define CONFIG_ENV_IS_IN_SPI_FLASH |
196 | #define CONFIG_SYS_REDUNDAND_ENVIRONMENT | |
197 | #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED | |
198 | #define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64 KB sectors */ | |
199 | #define CONFIG_ENV_OFFSET 0x110000 | |
200 | #define CONFIG_ENV_OFFSET_REDUND 0x120000 | |
201 | #ifdef MTDIDS_DEFAULT | |
202 | #undef MTDIDS_DEFAULT | |
203 | #endif | |
204 | #ifdef MTDPARTS_DEFAULT | |
205 | #undef MTDPARTS_DEFAULT | |
206 | #endif | |
207 | #define MTDPARTS_DEFAULT "mtdparts=qspi.0:512k(QSPI.u-boot)," \ | |
208 | "512k(QSPI.u-boot.backup)," \ | |
209 | "512k(QSPI.u-boot-spl-os)," \ | |
210 | "64k(QSPI.u-boot-env)," \ | |
211 | "64k(QSPI.u-boot-env.backup)," \ | |
212 | "8m(QSPI.kernel)," \ | |
213 | "-(QSPI.file-system)" | |
214 | #endif | |
215 | ||
ea4c7a83 SP |
216 | /* SPI */ |
217 | #undef CONFIG_OMAP3_SPI | |
ea4c7a83 SP |
218 | #define CONFIG_TI_SPI_MMAP |
219 | #define CONFIG_QSPI_SEL_GPIO 48 | |
220 | #define CONFIG_SF_DEFAULT_SPEED 48000000 | |
46f7bb00 | 221 | #define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 |
2d134597 V |
222 | #define CONFIG_QSPI_QUAD_SUPPORT |
223 | #define CONFIG_TI_EDMA3 | |
ea4c7a83 | 224 | |
0f1b0443 TR |
225 | /* Enhance our eMMC support / experience. */ |
226 | #define CONFIG_CMD_GPT | |
227 | #define CONFIG_EFI_PARTITION | |
0f1b0443 | 228 | |
1564dba7 LV |
229 | #ifndef CONFIG_SPL_BUILD |
230 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
fb3ad9bd | 231 | DEFAULT_LINUX_BOOT_ENV \ |
85d17be3 | 232 | DEFAULT_MMC_TI_ARGS \ |
1564dba7 LV |
233 | "fdtfile=undefined\0" \ |
234 | "bootpart=0:2\0" \ | |
235 | "bootdir=/boot\0" \ | |
236 | "bootfile=zImage\0" \ | |
237 | "console=ttyO0,115200n8\0" \ | |
0f1b0443 TR |
238 | "partitions=" \ |
239 | "uuid_disk=${uuid_gpt_disk};" \ | |
240 | "name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}\0" \ | |
1564dba7 | 241 | "optargs=\0" \ |
2b36fe57 DM |
242 | "usbroot=/dev/sda2 rw\0" \ |
243 | "usbrootfstype=ext4 rootwait\0" \ | |
244 | "usbdev=0\0" \ | |
bea0fd5e | 245 | "ramroot=/dev/ram0 rw\0" \ |
1564dba7 | 246 | "ramrootfstype=ext2\0" \ |
2b36fe57 DM |
247 | "usbargs=setenv bootargs console=${console} " \ |
248 | "${optargs} " \ | |
249 | "root=${usbroot} " \ | |
250 | "rootfstype=${usbrootfstype}\0" \ | |
1564dba7 LV |
251 | "ramargs=setenv bootargs console=${console} " \ |
252 | "${optargs} " \ | |
253 | "root=${ramroot} " \ | |
254 | "rootfstype=${ramrootfstype}\0" \ | |
2b36fe57 DM |
255 | "loadramdisk=load ${devtype} ${devnum} ${rdaddr} ramdisk.gz\0" \ |
256 | "loadimage=load ${devtype} ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \ | |
257 | "loadfdt=load ${devtype} ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \ | |
1564dba7 | 258 | "mmcboot=mmc dev ${mmcdev}; " \ |
2b36fe57 | 259 | "setenv devnum ${mmcdev}; " \ |
fa03834f | 260 | "setenv devtype mmc; " \ |
1564dba7 | 261 | "if mmc rescan; then " \ |
2b36fe57 | 262 | "echo SD/MMC found on device ${devnum};" \ |
1564dba7 LV |
263 | "if run loadimage; then " \ |
264 | "run loadfdt; " \ | |
265 | "echo Booting from mmc${mmcdev} ...; " \ | |
85d17be3 | 266 | "run args_mmc; " \ |
1564dba7 LV |
267 | "bootz ${loadaddr} - ${fdtaddr}; " \ |
268 | "fi;" \ | |
269 | "fi;\0" \ | |
2b36fe57 DM |
270 | "usbboot=" \ |
271 | "setenv devnum ${usbdev}; " \ | |
272 | "setenv devtype usb; " \ | |
273 | "usb start ${usbdev}; " \ | |
274 | "if usb dev ${usbdev}; then " \ | |
275 | "if run loadbootenv; then " \ | |
276 | "echo Loaded environment from ${bootenv};" \ | |
277 | "run importbootenv;" \ | |
278 | "fi;" \ | |
279 | "if test -n $uenvcmd; then " \ | |
280 | "echo Running uenvcmd ...;" \ | |
281 | "run uenvcmd;" \ | |
282 | "fi;" \ | |
283 | "if run loadimage; then " \ | |
284 | "run loadfdt; " \ | |
285 | "echo Booting from usb ${usbdev}...; " \ | |
286 | "run usbargs;" \ | |
287 | "bootz ${loadaddr} - ${fdtaddr}; " \ | |
288 | "fi;" \ | |
289 | "fi\0" \ | |
bf0385d7 KVA |
290 | "fi;" \ |
291 | "usb stop ${usbdev};\0" \ | |
1564dba7 LV |
292 | "findfdt="\ |
293 | "if test $board_name = AM43EPOS; then " \ | |
294 | "setenv fdtfile am43x-epos-evm.dtb; fi; " \ | |
295 | "if test $board_name = AM43__GP; then " \ | |
296 | "setenv fdtfile am437x-gp-evm.dtb; fi; " \ | |
9cb9f333 FB |
297 | "if test $board_name = AM43__SK; then " \ |
298 | "setenv fdtfile am437x-sk-evm.dtb; fi; " \ | |
403d70ab FB |
299 | "if test $board_name = AM43_IDK; then " \ |
300 | "setenv fdtfile am437x-idk-evm.dtb; fi; " \ | |
1564dba7 | 301 | "if test $fdtfile = undefined; then " \ |
a69e2c22 | 302 | "echo WARNING: Could not determine device tree; fi; \0" \ |
0ad5eaa4 | 303 | NANDARGS \ |
2320866b | 304 | NETARGS \ |
a69e2c22 | 305 | DFUARGS \ |
1564dba7 LV |
306 | |
307 | #define CONFIG_BOOTCOMMAND \ | |
308 | "run findfdt; " \ | |
18c534bb | 309 | "run envboot;" \ |
2b36fe57 | 310 | "run mmcboot;" \ |
0ad5eaa4 TR |
311 | "run usbboot;" \ |
312 | NANDBOOT \ | |
1564dba7 | 313 | |
3a3939bf M |
314 | #endif |
315 | ||
f4787eab | 316 | #ifndef CONFIG_SPL_BUILD |
4cdd7fda | 317 | /* CPSW Ethernet */ |
4cdd7fda M |
318 | #define CONFIG_MII |
319 | #define CONFIG_BOOTP_DEFAULT | |
320 | #define CONFIG_BOOTP_DNS | |
321 | #define CONFIG_BOOTP_DNS2 | |
322 | #define CONFIG_BOOTP_SEND_HOSTNAME | |
323 | #define CONFIG_BOOTP_GATEWAY | |
324 | #define CONFIG_BOOTP_SUBNETMASK | |
325 | #define CONFIG_NET_RETRY_COUNT 10 | |
4cdd7fda | 326 | #define CONFIG_PHY_GIGE |
f4787eab M |
327 | #endif |
328 | ||
329 | #define CONFIG_DRIVER_TI_CPSW | |
4cdd7fda | 330 | #define CONFIG_PHYLIB |
d9da26ec | 331 | #define PHY_ANEG_TIMEOUT 8000 /* PHY needs longer aneg time at 1G */ |
3a3939bf M |
332 | |
333 | #define CONFIG_SPL_ENV_SUPPORT | |
334 | #define CONFIG_SPL_NET_VCI_STRING "AM43xx U-Boot SPL" | |
335 | ||
f4787eab M |
336 | #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_ETH_SUPPORT) |
337 | #undef CONFIG_ENV_IS_IN_FAT | |
338 | #define CONFIG_ENV_IS_NOWHERE | |
3a3939bf | 339 | #define CONFIG_SPL_NET_SUPPORT |
f4787eab M |
340 | #endif |
341 | ||
4cdd7fda | 342 | #define CONFIG_SYS_RX_ETH_BUFFER 64 |
4cdd7fda | 343 | |
e53ad4b4 | 344 | /* NAND support */ |
345 | #ifdef CONFIG_NAND | |
346 | /* NAND: device related configs */ | |
347 | #define CONFIG_SYS_NAND_PAGE_SIZE 4096 | |
348 | #define CONFIG_SYS_NAND_OOBSIZE 224 | |
349 | #define CONFIG_SYS_NAND_BLOCK_SIZE (256*1024) | |
350 | #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ | |
351 | CONFIG_SYS_NAND_PAGE_SIZE) | |
352 | #define CONFIG_SYS_NAND_5_ADDR_CYCLE | |
353 | /* NAND: driver related configs */ | |
354 | #define CONFIG_NAND_OMAP_GPMC | |
355 | #define CONFIG_NAND_OMAP_ELM | |
356 | #define CONFIG_SYS_NAND_ONFI_DETECTION | |
357 | #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH16_CODE_HW | |
358 | #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS | |
359 | #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ | |
360 | 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, \ | |
361 | 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, \ | |
362 | 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, \ | |
363 | 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, \ | |
364 | 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, \ | |
365 | 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, \ | |
366 | 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, \ | |
367 | 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, \ | |
368 | 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, \ | |
369 | 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, \ | |
370 | 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, \ | |
371 | 120, 121, 122, 123, 124, 125, 126, 127, 128, 129, \ | |
372 | 130, 131, 132, 133, 134, 135, 136, 137, 138, 139, \ | |
373 | 140, 141, 142, 143, 144, 145, 146, 147, 148, 149, \ | |
374 | 150, 151, 152, 153, 154, 155, 156, 157, 158, 159, \ | |
375 | 160, 161, 162, 163, 164, 165, 166, 167, 168, 169, \ | |
376 | 170, 171, 172, 173, 174, 175, 176, 177, 178, 179, \ | |
377 | 180, 181, 182, 183, 184, 185, 186, 187, 188, 189, \ | |
378 | 190, 191, 192, 193, 194, 195, 196, 197, 198, 199, \ | |
379 | 200, 201, 202, 203, 204, 205, 206, 207, 208, 209, \ | |
380 | } | |
381 | #define CONFIG_SYS_NAND_ECCSIZE 512 | |
382 | #define CONFIG_SYS_NAND_ECCBYTES 26 | |
383 | #define MTDIDS_DEFAULT "nand0=nand.0" | |
384 | #define MTDPARTS_DEFAULT "mtdparts=nand.0:" \ | |
385 | "256k(NAND.SPL)," \ | |
386 | "256k(NAND.SPL.backup1)," \ | |
387 | "256k(NAND.SPL.backup2)," \ | |
388 | "256k(NAND.SPL.backup3)," \ | |
389 | "512k(NAND.u-boot-spl-os)," \ | |
390 | "1m(NAND.u-boot)," \ | |
391 | "256k(NAND.u-boot-env)," \ | |
392 | "256k(NAND.u-boot-env.backup1)," \ | |
393 | "7m(NAND.kernel)," \ | |
9ddef489 | 394 | "-(NAND.file-system)" |
e53ad4b4 | 395 | #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x00180000 |
396 | /* NAND: SPL related configs */ | |
397 | #ifdef CONFIG_SPL_NAND_SUPPORT | |
398 | #define CONFIG_SPL_NAND_AM33XX_BCH | |
399 | #endif | |
400 | /* NAND: SPL falcon mode configs */ | |
401 | #ifdef CONFIG_SPL_OS_BOOT | |
402 | #define CONFIG_CMD_SPL_NAND_OFS 0x00100000 /* os parameters */ | |
403 | #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00300000 /* kernel offset */ | |
404 | #define CONFIG_CMD_SPL_WRITE_SIZE CONFIG_SYS_NAND_BLOCK_SIZE | |
405 | #endif | |
0ad5eaa4 TR |
406 | #define NANDARGS \ |
407 | "mtdids=" MTDIDS_DEFAULT "\0" \ | |
408 | "mtdparts=" MTDPARTS_DEFAULT "\0" \ | |
409 | "nandargs=setenv bootargs console=${console} " \ | |
410 | "${optargs} " \ | |
411 | "root=${nandroot} " \ | |
412 | "rootfstype=${nandrootfstype}\0" \ | |
413 | "nandroot=ubi0:rootfs rw ubi.mtd=NAND.file-system,4096\0" \ | |
414 | "nandrootfstype=ubifs rootwait=1\0" \ | |
415 | "nandboot=echo Booting from nand ...; " \ | |
416 | "run nandargs; " \ | |
417 | "nand read ${fdtaddr} NAND.u-boot-spl-os; " \ | |
418 | "nand read ${loadaddr} NAND.kernel; " \ | |
419 | "bootz ${loadaddr} - ${fdtaddr}\0" | |
420 | #define NANDBOOT "run nandboot; " | |
421 | #else /* !CONFIG_NAND */ | |
422 | #define NANDARGS | |
423 | #define NANDBOOT | |
424 | #endif /* CONFIG_NAND */ | |
e53ad4b4 | 425 | |
8d0afcd7 | 426 | #endif /* __CONFIG_AM43XX_EVM_H */ |