[people/ms/u-boot.git] / include / configs / ap_sh4a_4a.h

/*
 * Configuation settings for the Alpha Project AP-SH4A-4A board
 *
 * Copyright (C) 2012 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __AP_SH4A_4A_H
#define __AP_SH4A_4A_H

#define CONFIG_CPU_SH7734	1
#define CONFIG_AP_SH4A_4A	1
#define CONFIG_400MHZ_MODE	1
/* #define CONFIG_533MHZ_MODE	1 */

#define CONFIG_SYS_TEXT_BASE 0x8BFC0000

#define CONFIG_CMD_SDRAM

#define CONFIG_BOOTARGS		"console=ttySC4,115200"

#define CONFIG_DISPLAY_BOARDINFO
#undef  CONFIG_SHOW_BOOT_PROGRESS

/* Ether */
#define CONFIG_SH_ETHER 1
#define CONFIG_SH_ETHER_USE_PORT (0)
#define CONFIG_SH_ETHER_PHY_ADDR (0x0)
#define CONFIG_SH_ETHER_PHY_MODE (PHY_INTERFACE_MODE_GMII)
#define CONFIG_SH_ETHER_SH7734_MII (0x02) /* GMII */
#define CONFIG_PHYLIB
#define CONFIG_PHY_MICREL 1
#define CONFIG_BITBANGMII
#define CONFIG_BITBANGMII_MULTI

/* undef to save memory	*/
#define CONFIG_SYS_LONGHELP
/* Monitor Command Prompt */
/* Buffer size for input from the Console */
#define CONFIG_SYS_CBSIZE		256
/* Buffer size for Console output */
#define CONFIG_SYS_PBSIZE		256
/* max args accepted for monitor commands */
#define CONFIG_SYS_MAXARGS		16
/* Buffer size for Boot Arguments passed to kernel */
#define CONFIG_SYS_BARGSIZE	512
/* List of legal baudrate settings for this board */
#define CONFIG_SYS_BAUDRATE_TABLE	{ 115200 }

/* SCIF */
#define CONFIG_SCIF_CONSOLE	1
#define CONFIG_SCIF			1
#define CONFIG_CONS_SCIF4	1

/* Suppress display of console information at boot */

/* SDRAM */
#define CONFIG_SYS_SDRAM_BASE	(0x88000000)
#define CONFIG_SYS_SDRAM_SIZE	(64 * 1024 * 1024)
#define CONFIG_SYS_LOAD_ADDR	(CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024)

#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE)
#define CONFIG_SYS_MEMTEST_END	 (CONFIG_SYS_MEMTEST_START + CONFIG_SYS_SDRAM_SIZE)
/* Enable alternate, more extensive, memory test */
#undef  CONFIG_SYS_ALT_MEMTEST
/* Scratch address used by the alternate memory test */
#undef  CONFIG_SYS_MEMTEST_SCRATCH

/* Enable temporary baudrate change while serial download */
#undef  CONFIG_SYS_LOADS_BAUD_CHANGE

/* FLASH */
#define CONFIG_FLASH_CFI_DRIVER 1
#define CONFIG_SYS_FLASH_CFI
#undef  CONFIG_SYS_FLASH_QUIET_TEST
#define CONFIG_SYS_FLASH_EMPTY_INFO
#define CONFIG_SYS_FLASH_BASE	(0xA0000000)
#define CONFIG_SYS_MAX_FLASH_SECT	512

/* if you use all NOR Flash , you change dip-switch. Please see Manual. */
#define CONFIG_SYS_MAX_FLASH_BANKS	1
#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }

/* Timeout for Flash erase operations (in ms) */
#define CONFIG_SYS_FLASH_ERASE_TOUT	(3 * 1000)
/* Timeout for Flash write operations (in ms) */
#define CONFIG_SYS_FLASH_WRITE_TOUT	(3 * 1000)
/* Timeout for Flash set sector lock bit operations (in ms) */
#define CONFIG_SYS_FLASH_LOCK_TOUT	(3 * 1000)
/* Timeout for Flash clear lock bit operations (in ms) */
#define CONFIG_SYS_FLASH_UNLOCK_TOUT	(3 * 1000)

/*
 * Use hardware flash sectors protection instead
 * of U-Boot software protection
 */
#undef  CONFIG_SYS_FLASH_PROTECTION
#undef  CONFIG_SYS_DIRECT_FLASH_TFTP

/* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */
#define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_FLASH_BASE)
/* Monitor size */
#define CONFIG_SYS_MONITOR_LEN	(256 * 1024)
/* Size of DRAM reserved for malloc() use */
#define CONFIG_SYS_MALLOC_LEN	(256 * 1024)
#define CONFIG_SYS_BOOTMAPSZ	(8 * 1024 * 1024)

/* ENV setting */
#define CONFIG_ENV_OVERWRITE	1
#define CONFIG_ENV_SECT_SIZE	(128 * 1024)
#define CONFIG_ENV_SIZE		(CONFIG_ENV_SECT_SIZE)
#define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
/* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
#define CONFIG_ENV_OFFSET	(CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
#define CONFIG_ENV_SIZE_REDUND	(CONFIG_ENV_SECT_SIZE)

/* Board Clock */
#if defined(CONFIG_400MHZ_MODE)
#define CONFIG_SYS_CLK_FREQ 50000000
#else
#define CONFIG_SYS_CLK_FREQ 44444444
#endif
#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SYS_TMU_CLK_DIV      4

#endif	/* __AP_SH4A_4A_H */
Commit	Line	Data
bfc93fb4 NI	1	/*
	2	* Configuation settings for the Alpha Project AP-SH4A-4A board
	3	*
	4	* Copyright (C) 2012 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
	5	*
1a459660	6	* SPDX-License-Identifier: GPL-2.0+
bfc93fb4 NI	7	*/
	8
	9	#ifndef __AP_SH4A_4A_H
	10	#define __AP_SH4A_4A_H
	11
bfc93fb4 NI	12	#define CONFIG_CPU_SH7734 1
	13	#define CONFIG_AP_SH4A_4A 1
	14	#define CONFIG_400MHZ_MODE 1
	15	/* #define CONFIG_533MHZ_MODE 1 */
	16
bfc93fb4 NI	17	#define CONFIG_SYS_TEXT_BASE 0x8BFC0000
bfc93fb4 NI	18
bfc93fb4	19	#define CONFIG_CMD_SDRAM
bfc93fb4	20
bfc93fb4 NI	21	#define CONFIG_BOOTARGS "console=ttySC4,115200"
bfc93fb4 NI	22
18a40e84	23	#define CONFIG_DISPLAY_BOARDINFO
bfc93fb4 NI	24	#undef CONFIG_SHOW_BOOT_PROGRESS
	25
	26	/* Ether */
	27	#define CONFIG_SH_ETHER 1
	28	#define CONFIG_SH_ETHER_USE_PORT (0)
	29	#define CONFIG_SH_ETHER_PHY_ADDR (0x0)
	30	#define CONFIG_SH_ETHER_PHY_MODE (PHY_INTERFACE_MODE_GMII)
	31	#define CONFIG_SH_ETHER_SH7734_MII (0x02) /* GMII */
	32	#define CONFIG_PHYLIB
	33	#define CONFIG_PHY_MICREL 1
	34	#define CONFIG_BITBANGMII
	35	#define CONFIG_BITBANGMII_MULTI
	36
bfc93fb4 NI	37	/* undef to save memory */
	38	#define CONFIG_SYS_LONGHELP
	39	/* Monitor Command Prompt */
bfc93fb4 NI	40	/* Buffer size for input from the Console */
	41	#define CONFIG_SYS_CBSIZE 256
	42	/* Buffer size for Console output */
	43	#define CONFIG_SYS_PBSIZE 256
	44	/* max args accepted for monitor commands */
	45	#define CONFIG_SYS_MAXARGS 16
	46	/* Buffer size for Boot Arguments passed to kernel */
	47	#define CONFIG_SYS_BARGSIZE 512
	48	/* List of legal baudrate settings for this board */
	49	#define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
	50
	51	/* SCIF */
	52	#define CONFIG_SCIF_CONSOLE 1
	53	#define CONFIG_SCIF 1
	54	#define CONFIG_CONS_SCIF4 1
	55
	56	/* Suppress display of console information at boot */
bfc93fb4 NI	57
	58	/* SDRAM */
	59	#define CONFIG_SYS_SDRAM_BASE (0x88000000)
	60	#define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024)
	61	#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024)
	62
	63	#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE)
	64	#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + CONFIG_SYS_SDRAM_SIZE)
	65	/* Enable alternate, more extensive, memory test */
	66	#undef CONFIG_SYS_ALT_MEMTEST
	67	/* Scratch address used by the alternate memory test */
	68	#undef CONFIG_SYS_MEMTEST_SCRATCH
	69
	70	/* Enable temporary baudrate change while serial download */
	71	#undef CONFIG_SYS_LOADS_BAUD_CHANGE
	72
	73	/* FLASH */
	74	#define CONFIG_FLASH_CFI_DRIVER 1
	75	#define CONFIG_SYS_FLASH_CFI
	76	#undef CONFIG_SYS_FLASH_QUIET_TEST
	77	#define CONFIG_SYS_FLASH_EMPTY_INFO
	78	#define CONFIG_SYS_FLASH_BASE (0xA0000000)
	79	#define CONFIG_SYS_MAX_FLASH_SECT 512
	80
	81	/* if you use all NOR Flash , you change dip-switch. Please see Manual. */
	82	#define CONFIG_SYS_MAX_FLASH_BANKS 1
	83	#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
	84
	85	/* Timeout for Flash erase operations (in ms) */
	86	#define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000)
	87	/* Timeout for Flash write operations (in ms) */
	88	#define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000)
	89	/* Timeout for Flash set sector lock bit operations (in ms) */
	90	#define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000)
	91	/* Timeout for Flash clear lock bit operations (in ms) */
	92	#define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000)
	93
	94	/*
	95	* Use hardware flash sectors protection instead
	96	* of U-Boot software protection
	97	*/
	98	#undef CONFIG_SYS_FLASH_PROTECTION
	99	#undef CONFIG_SYS_DIRECT_FLASH_TFTP
	100
	101	/* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */
	102	#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE)
	103	/* Monitor size */
	104	#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
	105	/* Size of DRAM reserved for malloc() use */
	106	#define CONFIG_SYS_MALLOC_LEN (256 * 1024)
bfc93fb4 NI	107	#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
	108
	109	/* ENV setting */
bfc93fb4 NI	110	#define CONFIG_ENV_OVERWRITE 1
	111	#define CONFIG_ENV_SECT_SIZE (128 * 1024)
	112	#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
	113	#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
	114	/* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
	115	#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
	116	#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE)
	117
	118	/* Board Clock */
	119	#if defined(CONFIG_400MHZ_MODE)
	120	#define CONFIG_SYS_CLK_FREQ 50000000
	121	#else
	122	#define CONFIG_SYS_CLK_FREQ 44444444
	123	#endif
684a501e NI	124	#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
684a501e NI	125	#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
bfc93fb4	126	#define CONFIG_SYS_TMU_CLK_DIV 4
bfc93fb4 NI	127
bfc93fb4 NI	128	#endif /* __AP_SH4A_4A_H */