[people/ms/u-boot.git] / include / configs / apf27.h

/*
 *
 * Configuration settings for the Armadeus Project motherboard APF27
 *
 * Copyright (C) 2008-2013 Eric Jarrige <eric.jarrige@armadeus.org>
 *
 * SPDX-License-Identifier:    GPL-2.0+
 */

#ifndef __CONFIG_H
#define __CONFIG_H

#define CONFIG_VERSION_VARIABLE
#define CONFIG_ENV_VERSION	10
#define CONFIG_IDENT_STRING	" apf27 patch 3.10"
#define CONFIG_BOARD_NAME apf27

/*
 * SoC configurations
 */
#define CONFIG_MX27			/* This is a Freescale i.MX27 Chip */
#define CONFIG_MACH_TYPE	1698	/* APF27 */

/*
 * Enable the call to miscellaneous platform dependent initialization.
 */
#define CONFIG_SYS_NO_FLASH

/*
 * Board display option
 */
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_DISPLAY_CPUINFO

/*
 * SPL
 */
#define CONFIG_SPL_TARGET	"u-boot-with-spl.bin"
#define CONFIG_SPL_LDSCRIPT	"arch/$(ARCH)/cpu/u-boot-spl.lds"
#define CONFIG_SPL_MAX_SIZE	2048
#define CONFIG_SPL_TEXT_BASE    0xA0000000
#define CONFIG_SPL_SERIAL_SUPPORT

/* NAND boot config */
#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_NAND_U_BOOT_OFFS	0x800
#define CONFIG_SYS_NAND_U_BOOT_DST	CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_NAND_U_BOOT_SIZE	CONFIG_SYS_MONITOR_LEN - 0x800

/*
 * BOOTP options
 */
#define CONFIG_BOOTP_SUBNETMASK
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_BOOTP_DNS
#define CONFIG_BOOTP_DNS2

#define CONFIG_HOSTNAME	CONFIG_BOARD_NAME
#define CONFIG_ROOTPATH	"/tftpboot/" __stringify(CONFIG_BOARD_NAME) "-root"

/*
 * U-Boot Commands
 */
#define CONFIG_CMD_BSP		/* Board Specific functions	*/
#define CONFIG_CMD_DATE
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_IMX_FUSE	/* imx iim fuse                 */
#define CONFIG_CMD_MTDPARTS	/* MTD partition support	*/
#define CONFIG_CMD_NAND		/* NAND support			*/
#define CONFIG_CMD_NAND_LOCK_UNLOCK
#define CONFIG_CMD_NAND_TRIMFFS
#define CONFIG_CMD_UBI
#define CONFIG_CMD_UBIFS

/*
 * Memory configurations
 */
#define CONFIG_NR_DRAM_POPULATED 1
#define CONFIG_NR_DRAM_BANKS	2

#define ACFG_SDRAM_MBYTE_SYZE 64

#define PHYS_SDRAM_1			0xA0000000
#define PHYS_SDRAM_2			0xB0000000
#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (512<<10))
#define CONFIG_SYS_MEMTEST_START	0xA0000000	/* memtest test area  */
#define CONFIG_SYS_MEMTEST_END		0xA0300000	/* 3 MiB RAM test */

#define CONFIG_SYS_INIT_SP_ADDR	(CONFIG_SYS_SDRAM_BASE	\
		+ PHYS_SDRAM_1_SIZE - 0x0100000)

#define CONFIG_SYS_TEXT_BASE		0xA0000800

/*
 * FLASH organization
 */
#define	ACFG_MONITOR_OFFSET		0x00000000
#define	CONFIG_SYS_MONITOR_LEN		0x00100000	/* 1MiB */
#define CONFIG_ENV_IS_IN_NAND
#define	CONFIG_ENV_OVERWRITE
#define	CONFIG_ENV_OFFSET		0x00100000	/* NAND offset */
#define	CONFIG_ENV_SIZE			0x00020000	/* 128kB  */
#define CONFIG_ENV_RANGE		0X00080000	/* 512kB */
#define	CONFIG_ENV_OFFSET_REDUND	\
		(CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE)	/* +512kB */
#define	CONFIG_ENV_SIZE_REDUND		CONFIG_ENV_SIZE	/* 512kB */
#define	CONFIG_FIRMWARE_OFFSET		0x00200000
#define	CONFIG_FIRMWARE_SIZE		0x00080000	/* 512kB  */
#define	CONFIG_KERNEL_OFFSET		0x00300000
#define	CONFIG_ROOTFS_OFFSET		0x00800000

#define CONFIG_MTDMAP			"mxc_nand.0"
#define MTDIDS_DEFAULT			"nand0=" CONFIG_MTDMAP
#define MTDPARTS_DEFAULT	"mtdparts=" CONFIG_MTDMAP \
				":1M(u-boot)ro," \
				"512K(env)," \
				"512K(env2)," \
				"512K(firmware)," \
				"512K(dtb)," \
				"5M(kernel)," \
				"-(rootfs)"

/*
 * U-Boot general configurations
 */
#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_CBSIZE		2048		/* console I/O buffer */
#define CONFIG_SYS_PBSIZE		\
				(CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
						/* Print buffer size */
#define CONFIG_SYS_MAXARGS		16		/* max command args */
#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
						/* Boot argument buffer size */
#define CONFIG_AUTO_COMPLETE
#define CONFIG_CMDLINE_EDITING
#define CONFIG_ENV_VARS_UBOOT_CONFIG
#define CONFIG_PREBOOT			"run check_flash check_env;"

/*
 * Boot Linux
 */
#define CONFIG_CMDLINE_TAG		/* send commandline to Kernel	*/
#define CONFIG_SETUP_MEMORY_TAGS	/* send memory definition to kernel */
#define CONFIG_INITRD_TAG		/* send initrd params	*/

#define CONFIG_ZERO_BOOTDELAY_CHECK
#define	CONFIG_BOOTFILE		__stringify(CONFIG_BOARD_NAME) "-linux.bin"
#define CONFIG_BOOTARGS		"console=" __stringify(ACFG_CONSOLE_DEV) "," \
			__stringify(CONFIG_BAUDRATE) " " MTDPARTS_DEFAULT \
			" ubi.mtd=rootfs root=ubi0:rootfs rootfstype=ubifs "

#define ACFG_CONSOLE_DEV	ttySMX0
#define CONFIG_BOOTCOMMAND	"run ubifsboot"
#define CONFIG_SYS_AUTOLOAD	"no"
/*
 * Default load address for user programs and kernel
 */
#define CONFIG_LOADADDR			0xA0000000
#define	CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR

/*
 * Extra Environments
 */
#define CONFIG_EXTRA_ENV_SETTINGS \
	"env_version="		__stringify(CONFIG_ENV_VERSION)		"\0" \
	"consoledev="		__stringify(ACFG_CONSOLE_DEV)		"\0" \
	"mtdparts="		MTDPARTS_DEFAULT			"\0" \
	"partition=nand0,6\0"						\
	"u-boot_addr="		__stringify(ACFG_MONITOR_OFFSET)	"\0" \
	"env_addr="		__stringify(CONFIG_ENV_OFFSET)		"\0" \
	"firmware_addr="	__stringify(CONFIG_FIRMWARE_OFFSET)	"\0" \
	"firmware_size="	__stringify(CONFIG_FIRMWARE_SIZE)	"\0" \
	"kernel_addr="		__stringify(CONFIG_KERNEL_OFFSET)	"\0" \
	"rootfs_addr="		__stringify(CONFIG_ROOTFS_OFFSET)	"\0" \
	"board_name="		__stringify(CONFIG_BOARD_NAME)		"\0" \
	"kernel_addr_r=A0000000\0" \
	"check_env=if test -n ${flash_env_version}; "			\
		"then env default env_version; "			\
		"else env set flash_env_version ${env_version}; env save; "\
		"fi; "							\
		"if itest ${flash_env_version} < ${env_version}; then " \
			"echo \"*** Warning - Environment version"	\
			" change suggests: run flash_reset_env; reset\"; "\
			"env default flash_reset_env; "\
		"fi; \0"						\
	"check_flash=nand lock; nand unlock ${env_addr}; \0"	\
	"flash_reset_env=env default -f -a; saveenv; run update_env;"	\
		"echo Flash environment variables erased!\0"		\
	"download_uboot=tftpboot ${loadaddr} ${board_name}"		\
		"-u-boot-with-spl.bin\0"				\
	"flash_uboot=nand unlock ${u-boot_addr} ;"			\
		"nand erase.part u-boot;"		\
		"if nand write.trimffs ${fileaddr} ${u-boot_addr} ${filesize};"\
			"then nand lock; nand unlock ${env_addr};"	\
				"echo Flashing of uboot succeed;"	\
			"else echo Flashing of uboot failed;"		\
		"fi; \0"						\
	"update_uboot=run download_uboot flash_uboot\0"			\
	"download_env=tftpboot ${loadaddr} ${board_name}"		\
		"-u-boot-env.txt\0"				\
	"flash_env=env import -t ${loadaddr}; env save; \0"		\
	"update_env=run download_env flash_env\0"			\
	"update_all=run update_env update_uboot\0"			\
	"unlock_regs=mw 10000008 0; mw 10020008 0\0"			\

/*
 * Serial Driver
 */
#define CONFIG_MXC_UART
#define CONFIG_CONS_INDEX		1
#define CONFIG_BAUDRATE			115200
#define CONFIG_MXC_UART_BASE		UART1_BASE

/*
 * GPIO
 */
#define CONFIG_MXC_GPIO

/*
 * NOR
 */

/*
 * NAND
 */
#define CONFIG_NAND_MXC

#define CONFIG_MXC_NAND_REGS_BASE	0xD8000000
#define CONFIG_SYS_NAND_BASE		CONFIG_MXC_NAND_REGS_BASE
#define CONFIG_SYS_MAX_NAND_DEVICE	1

#define CONFIG_MXC_NAND_HWECC
#define CONFIG_SYS_NAND_LARGEPAGE
#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
#define CONFIG_SYS_NAND_PAGE_SIZE	2048
#define CONFIG_SYS_NAND_BLOCK_SIZE	(128 * 1024)
#define CONFIG_SYS_NAND_PAGE_COUNT	CONFIG_SYS_NAND_BLOCK_SIZE / \
						CONFIG_SYS_NAND_PAGE_SIZE
#define CONFIG_SYS_NAND_SIZE		(256 * 1024 * 1024)
#define CONFIG_SYS_NAND_BAD_BLOCK_POS	11
#define NAND_MAX_CHIPS			1

#define CONFIG_FLASH_SHOW_PROGRESS	45
#define CONFIG_SYS_NAND_QUIET		1

/*
 * Partitions & Filsystems
 */
#define CONFIG_MTD_DEVICE
#define CONFIG_MTD_PARTITIONS
#define CONFIG_DOS_PARTITION
#define CONFIG_SUPPORT_VFAT

/*
 * UBIFS
 */
#define CONFIG_RBTREE
#define CONFIG_LZO

/*
 * Ethernet (on SOC imx FEC)
 */
#define CONFIG_FEC_MXC
#define CONFIG_FEC_MXC_PHYADDR		0x1f
#define CONFIG_MII				/* MII PHY management	*/

/*
 * FPGA
 */
#ifndef CONFIG_SPL_BUILD
#define CONFIG_FPGA
#endif
#define CONFIG_FPGA_COUNT		1
#define CONFIG_FPGA_XILINX
#define CONFIG_FPGA_SPARTAN3
#define CONFIG_SYS_FPGA_WAIT		250 /* 250 ms */
#define CONFIG_SYS_FPGA_PROG_FEEDBACK
#define CONFIG_SYS_FPGA_CHECK_CTRLC
#define CONFIG_SYS_FPGA_CHECK_ERROR

/*
 * Fuses - IIM
 */
#ifdef CONFIG_CMD_IMX_FUSE
#define IIM_MAC_BANK		0
#define IIM_MAC_ROW		5
#define IIM0_SCC_KEY		11
#define IIM1_SUID		1
#endif

/*
 * I2C
 */

#ifdef CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
#define CONFIG_SYS_MXC_I2C1_SPEED	100000	/* 100 kHz */
#define CONFIG_SYS_MXC_I2C1_SLAVE	0x7F
#define CONFIG_SYS_MXC_I2C2_SPEED	100000	/* 100 kHz */
#define CONFIG_SYS_MXC_I2C2_SLAVE	0x7F
#define CONFIG_SYS_I2C_NOPROBES		{ }

#ifdef CONFIG_CMD_EEPROM
# define CONFIG_SYS_I2C_EEPROM_ADDR	0x50	/* EEPROM 24LC02 */
# define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1	/* bytes of address */
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	3
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	10	/* msec */
#endif /* CONFIG_CMD_EEPROM */
#endif /* CONFIG_CMD_I2C */

/*
 * SD/MMC
 */
#ifdef CONFIG_CMD_MMC
#define CONFIG_MMC
#define CONFIG_GENERIC_MMC
#define CONFIG_MXC_MMC
#define CONFIG_MXC_MCI_REGS_BASE	0x10014000
#endif

/*
 * RTC
 */
#ifdef CONFIG_CMD_DATE
#define CONFIG_RTC_DS1374
#define CONFIG_SYS_RTC_BUS_NUM		0
#endif /* CONFIG_CMD_DATE */

/*
 * PLL
 *
 *  31 | x  |x| x x x x |x x x x x x x x x x |x x|x x x x|x x x x x x x x x x| 0
 *     |CPLM|X|----PD---|--------MFD---------|XXX|--MFI--|-----MFN-----------|
 */
#define CONFIG_MX27_CLK32		32768	/* 32768 or 32000 Hz crystal */

#if (ACFG_SDRAM_MBYTE_SYZE == 64) /* micron MT46H16M32LF -6 */
/* micron 64MB */
#define PHYS_SDRAM_1_SIZE			0x04000000 /* 64 MB */
#define PHYS_SDRAM_2_SIZE			0x04000000 /* 64 MB */
#endif

#if (ACFG_SDRAM_MBYTE_SYZE == 128)
/* micron 128MB */
#define PHYS_SDRAM_1_SIZE			0x08000000 /* 128 MB */
#define PHYS_SDRAM_2_SIZE			0x08000000 /* 128 MB */
#endif

#if (ACFG_SDRAM_MBYTE_SYZE == 256)
/* micron 256MB */
#define PHYS_SDRAM_1_SIZE			0x10000000 /* 256 MB */
#define PHYS_SDRAM_2_SIZE			0x10000000 /* 256 MB */
#endif

#endif /* __CONFIG_H */
Commit	Line	Data
bcc05c7a	1	/*
	2	*
	3	* Configuration settings for the Armadeus Project motherboard APF27
	4	*
	5	* Copyright (C) 2008-2013 Eric Jarrige <eric.jarrige@armadeus.org>
	6	*
	7	* SPDX-License-Identifier: GPL-2.0+
	8	*/
	9
	10	#ifndef __CONFIG_H
	11	#define __CONFIG_H
	12
	13	#define CONFIG_VERSION_VARIABLE
	14	#define CONFIG_ENV_VERSION 10
	15	#define CONFIG_IDENT_STRING " apf27 patch 3.10"
	16	#define CONFIG_BOARD_NAME apf27
	17
	18	/*
	19	* SoC configurations
	20	*/
5d7b131d	21	#define CONFIG_MX27 /* This is a Freescale i.MX27 Chip */
bcc05c7a	22	#define CONFIG_MACH_TYPE 1698 /* APF27 */
bcc05c7a	23
	24	/*
	25	* Enable the call to miscellaneous platform dependent initialization.
	26	*/
ef0f2f57	27	#define CONFIG_SYS_NO_FLASH
bcc05c7a	28
	29	/*
	30	* Board display option
	31	*/
	32	#define CONFIG_DISPLAY_BOARDINFO
	33	#define CONFIG_DISPLAY_CPUINFO
	34
	35	/*
	36	* SPL
	37	*/
bcc05c7a	38	#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
	39	#define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds"
	40	#define CONFIG_SPL_MAX_SIZE 2048
	41	#define CONFIG_SPL_TEXT_BASE 0xA0000000
80402f34	42	#define CONFIG_SPL_SERIAL_SUPPORT
bcc05c7a	43
	44	/* NAND boot config */
	45	#define CONFIG_SPL_NAND_SUPPORT
	46	#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
	47	#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x800
	48	#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
	49	#define CONFIG_SYS_NAND_U_BOOT_SIZE CONFIG_SYS_MONITOR_LEN - 0x800
	50
	51	/*
	52	* BOOTP options
	53	*/
	54	#define CONFIG_BOOTP_SUBNETMASK
	55	#define CONFIG_BOOTP_GATEWAY
	56	#define CONFIG_BOOTP_HOSTNAME
	57	#define CONFIG_BOOTP_BOOTPATH
	58	#define CONFIG_BOOTP_BOOTFILESIZE
	59	#define CONFIG_BOOTP_DNS
	60	#define CONFIG_BOOTP_DNS2
	61
	62	#define CONFIG_HOSTNAME CONFIG_BOARD_NAME
	63	#define CONFIG_ROOTPATH "/tftpboot/" __stringify(CONFIG_BOARD_NAME) "-root"
	64
	65	/*
	66	* U-Boot Commands
	67	*/
bcc05c7a	68	#define CONFIG_CMD_BSP /* Board Specific functions */
bcc05c7a	69	#define CONFIG_CMD_DATE
bcc05c7a	70	#define CONFIG_CMD_EEPROM
bcc05c7a	71	#define CONFIG_CMD_IMX_FUSE /* imx iim fuse */
bcc05c7a	72	#define CONFIG_CMD_MTDPARTS /* MTD partition support */
	73	#define CONFIG_CMD_NAND /* NAND support */
	74	#define CONFIG_CMD_NAND_LOCK_UNLOCK
	75	#define CONFIG_CMD_NAND_TRIMFFS
bcc05c7a	76	#define CONFIG_CMD_UBI
	77	#define CONFIG_CMD_UBIFS
	78
	79	/*
	80	* Memory configurations
	81	*/
	82	#define CONFIG_NR_DRAM_POPULATED 1
	83	#define CONFIG_NR_DRAM_BANKS 2
	84
	85	#define ACFG_SDRAM_MBYTE_SYZE 64
	86
	87	#define PHYS_SDRAM_1 0xA0000000
	88	#define PHYS_SDRAM_2 0xB0000000
	89	#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
	90	#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (512<<10))
	91	#define CONFIG_SYS_MEMTEST_START 0xA0000000 /* memtest test area */
	92	#define CONFIG_SYS_MEMTEST_END 0xA0300000 /* 3 MiB RAM test */
	93
	94	#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE \
	95	+ PHYS_SDRAM_1_SIZE - 0x0100000)
	96
	97	#define CONFIG_SYS_TEXT_BASE 0xA0000800
	98
	99	/*
	100	* FLASH organization
	101	*/
	102	#define ACFG_MONITOR_OFFSET 0x00000000
	103	#define CONFIG_SYS_MONITOR_LEN 0x00100000 /* 1MiB */
	104	#define CONFIG_ENV_IS_IN_NAND
	105	#define CONFIG_ENV_OVERWRITE
	106	#define CONFIG_ENV_OFFSET 0x00100000 /* NAND offset */
	107	#define CONFIG_ENV_SIZE 0x00020000 /* 128kB */
	108	#define CONFIG_ENV_RANGE 0X00080000 /* 512kB */
	109	#define CONFIG_ENV_OFFSET_REDUND \
	110	(CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE) /* +512kB */
	111	#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE /* 512kB */
	112	#define CONFIG_FIRMWARE_OFFSET 0x00200000
	113	#define CONFIG_FIRMWARE_SIZE 0x00080000 /* 512kB */
	114	#define CONFIG_KERNEL_OFFSET 0x00300000
	115	#define CONFIG_ROOTFS_OFFSET 0x00800000
	116
	117	#define CONFIG_MTDMAP "mxc_nand.0"
	118	#define MTDIDS_DEFAULT "nand0=" CONFIG_MTDMAP
	119	#define MTDPARTS_DEFAULT "mtdparts=" CONFIG_MTDMAP \
	120	":1M(u-boot)ro," \
	121	"512K(env)," \
	122	"512K(env2)," \
	123	"512K(firmware)," \
	124	"512K(dtb)," \
	125	"5M(kernel)," \
	126	"-(rootfs)"
	127
	128	/*
	129	* U-Boot general configurations
	130	*/
	131	#define CONFIG_SYS_LONGHELP
bcc05c7a	132	#define CONFIG_SYS_CBSIZE 2048 /* console I/O buffer */
	133	#define CONFIG_SYS_PBSIZE \
	134	(CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
	135	/* Print buffer size */
	136	#define CONFIG_SYS_MAXARGS 16 /* max command args */
	137	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
	138	/* Boot argument buffer size */
	139	#define CONFIG_AUTO_COMPLETE
	140	#define CONFIG_CMDLINE_EDITING
bcc05c7a	141	#define CONFIG_ENV_VARS_UBOOT_CONFIG
	142	#define CONFIG_PREBOOT "run check_flash check_env;"
	143
bcc05c7a	144	/*
	145	* Boot Linux
	146	*/
	147	#define CONFIG_CMDLINE_TAG /* send commandline to Kernel */
	148	#define CONFIG_SETUP_MEMORY_TAGS /* send memory definition to kernel */
	149	#define CONFIG_INITRD_TAG /* send initrd params */
	150
bcc05c7a	151	#define CONFIG_ZERO_BOOTDELAY_CHECK
	152	#define CONFIG_BOOTFILE __stringify(CONFIG_BOARD_NAME) "-linux.bin"
	153	#define CONFIG_BOOTARGS "console=" __stringify(ACFG_CONSOLE_DEV) "," \
	154	__stringify(CONFIG_BAUDRATE) " " MTDPARTS_DEFAULT \
	155	" ubi.mtd=rootfs root=ubi0:rootfs rootfstype=ubifs "
	156
	157	#define ACFG_CONSOLE_DEV ttySMX0
	158	#define CONFIG_BOOTCOMMAND "run ubifsboot"
	159	#define CONFIG_SYS_AUTOLOAD "no"
	160	/*
	161	* Default load address for user programs and kernel
	162	*/
	163	#define CONFIG_LOADADDR 0xA0000000
	164	#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
	165
	166	/*
	167	* Extra Environments
	168	*/
	169	#define CONFIG_EXTRA_ENV_SETTINGS \
	170	"env_version=" __stringify(CONFIG_ENV_VERSION) "\0" \
	171	"consoledev=" __stringify(ACFG_CONSOLE_DEV) "\0" \
	172	"mtdparts=" MTDPARTS_DEFAULT "\0" \
	173	"partition=nand0,6\0" \
	174	"u-boot_addr=" __stringify(ACFG_MONITOR_OFFSET) "\0" \
	175	"env_addr=" __stringify(CONFIG_ENV_OFFSET) "\0" \
	176	"firmware_addr=" __stringify(CONFIG_FIRMWARE_OFFSET) "\0" \
	177	"firmware_size=" __stringify(CONFIG_FIRMWARE_SIZE) "\0" \
	178	"kernel_addr=" __stringify(CONFIG_KERNEL_OFFSET) "\0" \
	179	"rootfs_addr=" __stringify(CONFIG_ROOTFS_OFFSET) "\0" \
	180	"board_name=" __stringify(CONFIG_BOARD_NAME) "\0" \
	181	"kernel_addr_r=A0000000\0" \
	182	"check_env=if test -n ${flash_env_version}; " \
	183	"then env default env_version; " \
	184	"else env set flash_env_version ${env_version}; env save; "\
	185	"fi; " \
	186	"if itest ${flash_env_version} < ${env_version}; then " \
	187	"echo \"*** Warning - Environment version" \
	188	" change suggests: run flash_reset_env; reset\"; "\
	189	"env default flash_reset_env; "\
	190	"fi; \0" \
	191	"check_flash=nand lock; nand unlock ${env_addr}; \0" \
	192	"flash_reset_env=env default -f -a; saveenv; run update_env;" \
	193	"echo Flash environment variables erased!\0" \
	194	"download_uboot=tftpboot ${loadaddr} ${board_name}" \
	195	"-u-boot-with-spl.bin\0" \
	196	"flash_uboot=nand unlock ${u-boot_addr} ;" \
	197	"nand erase.part u-boot;" \
	198	"if nand write.trimffs ${fileaddr} ${u-boot_addr} ${filesize};"\
	199	"then nand lock; nand unlock ${env_addr};" \
	200	"echo Flashing of uboot succeed;" \
	201	"else echo Flashing of uboot failed;" \
	202	"fi; \0" \
	203	"update_uboot=run download_uboot flash_uboot\0" \
	204	"download_env=tftpboot ${loadaddr} ${board_name}" \
	205	"-u-boot-env.txt\0" \
	206	"flash_env=env import -t ${loadaddr}; env save; \0" \
	207	"update_env=run download_env flash_env\0" \
	208	"update_all=run update_env update_uboot\0" \
	209	"unlock_regs=mw 10000008 0; mw 10020008 0\0" \
	210
	211	/*
	212	* Serial Driver
	213	*/
	214	#define CONFIG_MXC_UART
215	#define CONFIG_CONS_INDEX 1
216	#define CONFIG_BAUDRATE 115200
217	#define CONFIG_MXC_UART_BASE UART1_BASE
218
219	/*
220	* GPIO
221	*/
222	#define CONFIG_MXC_GPIO
223
224	/*
225	* NOR
226	*/
227
228	/*
229	* NAND
230	*/
231	#define CONFIG_NAND_MXC
232
233	#define CONFIG_MXC_NAND_REGS_BASE 0xD8000000
234	#define CONFIG_SYS_NAND_BASE CONFIG_MXC_NAND_REGS_BASE
235	#define CONFIG_SYS_MAX_NAND_DEVICE 1
236
237	#define CONFIG_MXC_NAND_HWECC
238	#define CONFIG_SYS_NAND_LARGEPAGE
239	#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
240	#define CONFIG_SYS_NAND_PAGE_SIZE 2048
241	#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
242	#define CONFIG_SYS_NAND_PAGE_COUNT CONFIG_SYS_NAND_BLOCK_SIZE / \
243	CONFIG_SYS_NAND_PAGE_SIZE
244	#define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024)
245	#define CONFIG_SYS_NAND_BAD_BLOCK_POS 11
246	#define NAND_MAX_CHIPS 1
247
248	#define CONFIG_FLASH_SHOW_PROGRESS 45
249	#define CONFIG_SYS_NAND_QUIET 1
250
251	/*
252	* Partitions & Filsystems
253	*/
254	#define CONFIG_MTD_DEVICE
255	#define CONFIG_MTD_PARTITIONS
256	#define CONFIG_DOS_PARTITION
257	#define CONFIG_SUPPORT_VFAT
258
259	/*
260	* UBIFS
261	*/
262	#define CONFIG_RBTREE
263	#define CONFIG_LZO
264
265	/*
266	* Ethernet (on SOC imx FEC)
267	*/
268	#define CONFIG_FEC_MXC
269	#define CONFIG_FEC_MXC_PHYADDR 0x1f
270	#define CONFIG_MII /* MII PHY management */
271
b5e7f1bc	272	/*
	273	* FPGA
	274	*/
	275	#ifndef CONFIG_SPL_BUILD
	276	#define CONFIG_FPGA
	277	#endif
	278	#define CONFIG_FPGA_COUNT 1
	279	#define CONFIG_FPGA_XILINX
	280	#define CONFIG_FPGA_SPARTAN3
	281	#define CONFIG_SYS_FPGA_WAIT 250 /* 250 ms */
	282	#define CONFIG_SYS_FPGA_PROG_FEEDBACK
	283	#define CONFIG_SYS_FPGA_CHECK_CTRLC
	284	#define CONFIG_SYS_FPGA_CHECK_ERROR
	285
bcc05c7a	286	/*
	287	* Fuses - IIM
	288	*/
	289	#ifdef CONFIG_CMD_IMX_FUSE
	290	#define IIM_MAC_BANK 0
	291	#define IIM_MAC_ROW 5
	292	#define IIM0_SCC_KEY 11
	293	#define IIM1_SUID 1
	294	#endif
	295
	296	/*
	297	* I2C
	298	*/
	299
	300	#ifdef CONFIG_CMD_I2C
b089d039	301	#define CONFIG_SYS_I2C
b089d039	302	#define CONFIG_SYS_I2C_MXC
03544c66 AA	303	#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
03544c66 AA	304	#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
b089d039	305	#define CONFIG_SYS_MXC_I2C1_SPEED 100000 /* 100 kHz */
	306	#define CONFIG_SYS_MXC_I2C1_SLAVE 0x7F
	307	#define CONFIG_SYS_MXC_I2C2_SPEED 100000 /* 100 kHz */
	308	#define CONFIG_SYS_MXC_I2C2_SLAVE 0x7F
bcc05c7a	309	#define CONFIG_SYS_I2C_NOPROBES { }
	310
	311	#ifdef CONFIG_CMD_EEPROM
	312	# define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM 24LC02 */
	313	# define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */
	314	#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
	315	#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* msec */
	316	#endif /* CONFIG_CMD_EEPROM */
	317	#endif /* CONFIG_CMD_I2C */
	318
	319	/*
	320	* SD/MMC
	321	*/
	322	#ifdef CONFIG_CMD_MMC
	323	#define CONFIG_MMC
	324	#define CONFIG_GENERIC_MMC
	325	#define CONFIG_MXC_MMC
	326	#define CONFIG_MXC_MCI_REGS_BASE 0x10014000
	327	#endif
	328
	329	/*
	330	* RTC
	331	*/
	332	#ifdef CONFIG_CMD_DATE
	333	#define CONFIG_RTC_DS1374
	334	#define CONFIG_SYS_RTC_BUS_NUM 0
	335	#endif /* CONFIG_CMD_DATE */
	336
bcc05c7a	337	/*
	338	* PLL
	339	*
	340	* 31 \| x \|x\| x x x x \|x x x x x x x x x x \|x x\|x x x x\|x x x x x x x x x x\| 0
	341	* \|CPLM\|X\|----PD---\|--------MFD---------\|XXX\|--MFI--\|-----MFN-----------\|
	342	*/
	343	#define CONFIG_MX27_CLK32 32768 /* 32768 or 32000 Hz crystal */
	344
	345	#if (ACFG_SDRAM_MBYTE_SYZE == 64) /* micron MT46H16M32LF -6 */
	346	/* micron 64MB */
	347	#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
	348	#define PHYS_SDRAM_2_SIZE 0x04000000 /* 64 MB */
	349	#endif
	350
	351	#if (ACFG_SDRAM_MBYTE_SYZE == 128)
	352	/* micron 128MB */
	353	#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
	354	#define PHYS_SDRAM_2_SIZE 0x08000000 /* 128 MB */
	355	#endif
	356
	357	#if (ACFG_SDRAM_MBYTE_SYZE == 256)
	358	/* micron 256MB */
	359	#define PHYS_SDRAM_1_SIZE 0x10000000 /* 256 MB */
	360	#define PHYS_SDRAM_2_SIZE 0x10000000 /* 256 MB */
	361	#endif
	362
	363	#endif /* __CONFIG_H */