projects / people / ms / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| c1393bb3 VPP |
1 | /* |
| 2 | * Copyright (C) 2012 Bluegiga Technologies Oy | |
| 3 | * | |
| 4 | * Authors: | |
| 5 | * Veli-Pekka Peltola <veli-pekka.peltola@bluegiga.com> | |
| 6 | * Lauri Hintsala <lauri.hintsala@bluegiga.com> | |
| 7 | * | |
| 8 | * Based on m28evk.h: | |
| 9 | * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com> | |
| 10 | * on behalf of DENX Software Engineering GmbH | |
| 11 | * | |
| 12 | * This program is free software; you can redistribute it and/or | |
| 13 | * modify it under the terms of the GNU General Public License as | |
| 14 | * published by the Free Software Foundation; either version 2 of | |
| 15 | * the License, or (at your option) any later version. | |
| 16 | * | |
| 17 | * This program is distributed in the hope that it will be useful, | |
| 18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 20 | * GNU General Public License for more details. | |
| 21 | */ | |
| 22 | #ifndef __CONFIG_H | |
| 23 | #define __CONFIG_H | |
| 24 | ||
| 25 | #include <asm/arch/regs-base.h> | |
| 26 | ||
| 27 | /* SoC configurations */ | |
| 28 | #define CONFIG_MX28 /* i.MX28 SoC */ | |
| 29 | #define CONFIG_MXS_GPIO /* GPIO control */ | |
| 30 | #define CONFIG_SYS_HZ 1000 /* Ticks per second */ | |
| 31 | ||
| 32 | #define MACH_TYPE_APX4DEVKIT 3712 | |
| 33 | #define CONFIG_MACH_TYPE MACH_TYPE_APX4DEVKIT | |
| 34 | ||
| 35 | #define CONFIG_SYS_NO_FLASH | |
| 36 | #define CONFIG_SYS_ICACHE_OFF | |
| 37 | #define CONFIG_SYS_DCACHE_OFF | |
| 38 | #define CONFIG_BOARD_EARLY_INIT_F | |
| 39 | #define CONFIG_ARCH_CPU_INIT | |
| 40 | #define CONFIG_ARCH_MISC_INIT | |
| 41 | ||
| 42 | /* SPL */ | |
| 43 | #define CONFIG_SPL | |
| 44 | #define CONFIG_SPL_NO_CPU_SUPPORT_CODE | |
| 45 | #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mx28" | |
| 46 | #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mx28/u-boot-spl.lds" | |
| 47 | #define CONFIG_SPL_LIBCOMMON_SUPPORT | |
| 48 | #define CONFIG_SPL_LIBGENERIC_SUPPORT | |
| 49 | #define CONFIG_SPL_GPIO_SUPPORT | |
| 50 | ||
| 51 | /* U-Boot Commands */ | |
| 52 | #include <config_cmd_default.h> | |
| 53 | #define CONFIG_DISPLAY_CPUINFO | |
| 54 | #define CONFIG_DOS_PARTITION | |
| 55 | ||
| 56 | #define CONFIG_CMD_CACHE | |
| 57 | #define CONFIG_CMD_DATE | |
| 58 | #define CONFIG_CMD_DHCP | |
| 59 | #define CONFIG_CMD_EXT2 | |
| 60 | #define CONFIG_CMD_FAT | |
| 61 | #define CONFIG_CMD_I2C | |
| 62 | #define CONFIG_CMD_MII | |
| 63 | #define CONFIG_CMD_MMC | |
| 64 | #define CONFIG_CMD_NAND | |
| 65 | #define CONFIG_CMD_NET | |
| 66 | #define CONFIG_CMD_NFS | |
| 67 | #define CONFIG_CMD_PING | |
| 68 | #define CONFIG_CMD_SAVEENV | |
| 69 | #define CONFIG_CMD_USB | |
| 70 | ||
| 71 | /* Memory configurations */ | |
| 72 | #define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ | |
| 73 | #define PHYS_SDRAM_1 0x40000000 /* Base address */ | |
| 74 | #define PHYS_SDRAM_1_SIZE 0x20000000 /* Max 512 MB RAM */ | |
| 75 | #define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */ | |
| 76 | #define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */ | |
| 77 | #define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */ | |
| 78 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 | |
| 79 | ||
| 80 | /* Point initial SP in SRAM so SPL can use it too. */ | |
| 81 | #define CONFIG_SYS_INIT_RAM_ADDR 0x00000000 | |
| 82 | #define CONFIG_SYS_INIT_RAM_SIZE (128 * 1024) | |
| 83 | ||
| 84 | #define CONFIG_SYS_INIT_SP_OFFSET \ | |
| 85 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) | |
| 86 | #define CONFIG_SYS_INIT_SP_ADDR \ | |
| 87 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) | |
| 88 | ||
| 89 | /* | |
| 90 | * We need to sacrifice first 4 bytes of RAM here to avoid triggering some | |
| 91 | * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot | |
| 92 | * binary. In case there was more of this mess, 0x100 bytes are skipped. | |
| 93 | */ | |
| 94 | #define CONFIG_SYS_TEXT_BASE 0x40000100 | |
| 95 | ||
| 96 | #define CONFIG_ENV_OVERWRITE | |
| 97 | ||
| 98 | /* U-Boot general configurations */ | |
| 99 | #define CONFIG_SYS_LONGHELP | |
| 100 | #define CONFIG_SYS_PROMPT "=> " | |
| 101 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ | |
| 102 | #define CONFIG_SYS_PBSIZE \ | |
| 103 | (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) | |
| 104 | /* Print buffer size */ | |
| 105 | #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */ | |
| 106 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE | |
| 107 | /* Boot argument buffer size */ | |
| 108 | #define CONFIG_VERSION_VARIABLE /* U-Boot version */ | |
| 109 | #define CONFIG_AUTO_COMPLETE /* Command auto complete */ | |
| 110 | #define CONFIG_CMDLINE_EDITING /* Command history etc. */ | |
| 111 | #define CONFIG_SYS_HUSH_PARSER | |
| 112 | #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " | |
| 113 | #define CONFIG_OF_LIBFDT | |
| 114 | #define CONFIG_ENV_IS_IN_NAND | |
| 115 | ||
| 116 | /* Serial Driver */ | |
| 117 | #define CONFIG_PL011_SERIAL | |
| 118 | #define CONFIG_PL011_CLOCK 24000000 | |
| 119 | #define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE } | |
| 120 | #define CONFIG_CONS_INDEX 0 | |
| 121 | #define CONFIG_BAUDRATE 115200 /* Default baud rate */ | |
| 122 | #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } | |
| 123 | ||
| 124 | /* DMA */ | |
| 125 | #define CONFIG_APBH_DMA | |
| 126 | ||
| 127 | /* MMC Driver */ | |
| 128 | #ifdef CONFIG_ENV_IS_IN_MMC | |
| 129 | #define CONFIG_ENV_OFFSET (256 * 1024) | |
| 130 | #define CONFIG_ENV_SIZE (16 * 1024) | |
| 131 | #define CONFIG_SYS_MMC_ENV_DEV 0 | |
| 132 | #endif | |
| 133 | ||
| 134 | #ifdef CONFIG_CMD_MMC | |
| 135 | #define CONFIG_MMC | |
| 136 | #define CONFIG_GENERIC_MMC | |
| 137 | #define CONFIG_MMC_BOUNCE_BUFFER | |
| 138 | #define CONFIG_MXS_MMC | |
| 139 | #endif | |
| 140 | ||
| 141 | /* NAND Driver */ | |
| 142 | #ifdef CONFIG_ENV_IS_IN_NAND | |
| 143 | #define CONFIG_ENV_SECT_SIZE (128 * 1024) | |
| 144 | #define CONFIG_ENV_SIZE (128 * 1024) | |
| 145 | #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE | |
| 146 | #define CONFIG_ENV_RANGE (384 * 1024) | |
| 147 | #define CONFIG_ENV_OFFSET 0x120000 | |
| 148 | #define CONFIG_ENV_OFFSET_REDUND \ | |
| 149 | (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE) | |
| 150 | #endif | |
| 151 | ||
| 152 | #ifdef CONFIG_CMD_NAND | |
| 153 | #define CONFIG_NAND_MXS | |
| 154 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 | |
| 155 | #define CONFIG_SYS_NAND_BASE 0x60000000 | |
| 156 | #define CONFIG_SYS_NAND_5_ADDR_CYCLE | |
| 157 | ||
| 158 | #define CONFIG_CMD_UBI | |
| 159 | #define CONFIG_CMD_UBIFS | |
| 160 | #define CONFIG_CMD_MTDPARTS | |
| 161 | #define CONFIG_RBTREE | |
| 162 | #define CONFIG_LZO | |
| 163 | #define CONFIG_MTD_DEVICE | |
| 164 | #define CONFIG_MTD_PARTITIONS | |
| 165 | #define MTDIDS_DEFAULT "nand0=gpmi-nand" | |
| 166 | #define MTDPARTS_DEFAULT \ | |
| 167 | "mtdparts=gpmi-nand:128k(bootstrap),1024k(boot),768k(env),-(root)" | |
| 168 | #else | |
| 169 | #define MTDPARTS_DEFAULT "" | |
| 170 | #endif | |
| 171 | ||
| 172 | /* Ethernet on SOC (FEC) */ | |
| 173 | #ifdef CONFIG_CMD_NET | |
| 174 | #define CONFIG_NET_MULTI | |
| 175 | #define CONFIG_ETHPRIME "FEC" | |
| 176 | #define CONFIG_FEC_MXC | |
| 177 | #define CONFIG_FEC_MXC_PHYADDR 0 | |
| 178 | #define IMX_FEC_BASE MXS_ENET0_BASE | |
| 179 | #define CONFIG_MII | |
| 180 | #define CONFIG_DISCOVER_PHY | |
| 181 | #define CONFIG_FEC_XCV_TYPE RMII | |
| 182 | #endif | |
| 183 | ||
| 184 | /* USB */ | |
| 185 | #ifdef CONFIG_CMD_USB | |
| 186 | #define CONFIG_USB_EHCI | |
| 187 | #define CONFIG_USB_EHCI_MXS | |
| 188 | #define CONFIG_EHCI_MXS_PORT 1 | |
| 189 | #define CONFIG_EHCI_IS_TDI | |
| 190 | #define CONFIG_USB_STORAGE | |
| 191 | #endif | |
| 192 | ||
| 193 | /* I2C */ | |
| 194 | #ifdef CONFIG_CMD_I2C | |
| 195 | #define CONFIG_I2C_MXS | |
| 196 | #define CONFIG_HARD_I2C | |
| 197 | #define CONFIG_SYS_I2C_SPEED 400000 | |
| 198 | #endif | |
| 199 | ||
| 200 | /* RTC */ | |
| 201 | #if defined(CONFIG_CMD_DATE) | |
| 202 | #define CONFIG_RTC_PCF8563 | |
| 203 | #define CONFIG_SYS_I2C_RTC_ADDR 0x51 | |
| 204 | #endif | |
| 205 | ||
| 206 | /* Boot Linux */ | |
| 207 | #define CONFIG_CMDLINE_TAG | |
| 208 | #define CONFIG_SETUP_MEMORY_TAGS | |
| 209 | #define CONFIG_BOOTDELAY 1 | |
| 210 | #define CONFIG_BOOTFILE "uImage" | |
| 211 | #define CONFIG_BOOTCOMMAND "run bootcmd_nand" | |
| 212 | #define CONFIG_LOADADDR 0x41000000 | |
| 213 | #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR | |
| 214 | #define CONFIG_SERIAL_TAG | |
| 215 | #define CONFIG_REVISION_TAG | |
| 216 | ||
| 217 | /* Extra Environments */ | |
| 218 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
| 219 | "mtdparts=" MTDPARTS_DEFAULT "\0" \ | |
| 220 | "verify=no\0" \ | |
| 221 | "bootcmd=run bootcmd_nand\0" \ | |
| 222 | "kernelargs=console=tty0 console=ttyAMA0,115200 consoleblank=0\0" \ | |
| 223 | "bootargs_nand=" \ | |
| 224 | "setenv bootargs ${kernelargs} ubi.mtd=3,2048 " \ | |
| 225 | "root=ubi0:rootfs rootfstype=ubifs ${mtdparts} rw\0" \ | |
| 226 | "bootcmd_nand=" \ | |
| 227 | "run bootargs_nand && ubi part root 2048 && " \ | |
| 228 | "ubifsmount rootfs && ubifsload 41000000 boot/uImage && " \ | |
| 229 | "bootm 41000000\0" \ | |
| 230 | "bootargs_mmc=" \ | |
| 231 | "setenv bootargs ${kernelargs} " \ | |
| 232 | "root=/dev/mmcblk0p2 rootwait ${mtdparts} rw\0" \ | |
| 233 | "bootcmd_mmc=" \ | |
| 234 | "run bootargs_mmc && mmc rescan && " \ | |
| 235 | "ext2load mmc 0:2 41000000 boot/uImage && bootm 41000000\0" \ | |
| 236 | "" | |
| 237 | ||
| 238 | #endif /* __CONFIG_H */ |