[people/ms/u-boot.git] / include / configs / aristainetos-common.h

/*
 * (C) Copyright 2015
 * (C) Copyright 2014
 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
 *
 * Based on:
 * Copyright (C) 2012 Freescale Semiconductor, Inc.
 *
 * Configuration settings for the Freescale i.MX6Q SabreSD board.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */
#ifndef __ARISTAINETOS_COMMON_CONFIG_H
#define __ARISTAINETOS_COMMON_CONFIG_H

#define CONFIG_MX6

#include "mx6_common.h"
#include <linux/sizes.h>

#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO

#include <asm/arch/imx-regs.h>
#include <asm/imx-common/gpio.h>

#define CONFIG_MACH_TYPE	4501
#define CONFIG_MMCROOT		"/dev/mmcblk0p1"
#define PHYS_SDRAM_SIZE		(1u * 1024 * 1024 * 1024)

#define CONFIG_SYS_GENERIC_BOARD

/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN		(64 * SZ_1M)

#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_MXC_GPIO

#define CONFIG_MXC_UART

#define CONFIG_CMD_FUSE
#define CONFIG_MXC_OCOTP

/* MMC Configs */
#define CONFIG_FSL_ESDHC
#define CONFIG_FSL_USDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR      0

#define CONFIG_MMC
#define CONFIG_CMD_MMC
#define CONFIG_GENERIC_MMC
#define CONFIG_BOUNCE_BUFFER
#define CONFIG_CMD_EXT2
#define CONFIG_CMD_FAT
#define CONFIG_DOS_PARTITION

#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
#define CONFIG_CMD_NET
#define CONFIG_FEC_MXC
#define CONFIG_MII
#define IMX_FEC_BASE			ENET_BASE_ADDR
#define CONFIG_ETHPRIME			"FEC"
#define CONFIG_FEC_MXC_PHYADDR		0

#define CONFIG_PHYLIB
#define CONFIG_PHY_MICREL

#define CONFIG_CMD_SF
#define CONFIG_SPI_FLASH
#define CONFIG_SPI_FLASH_MTD
#define CONFIG_SPI_FLASH_STMICRO
#define CONFIG_MXC_SPI
#define CONFIG_SF_DEFAULT_BUS		3
#define CONFIG_SF_DEFAULT_SPEED		20000000
#define CONFIG_SF_DEFAULT_MODE		SPI_MODE_0
#define CONFIG_SYS_SPI_ST_ENABLE_WP_PIN

/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_CONS_INDEX		1
#define CONFIG_BAUDRATE			115200

/* Command definition */
#include <config_cmd_default.h>

#define CONFIG_CMD_BMODE
#define CONFIG_CMD_BOOTZ
#define CONFIG_CMD_SETEXPR
#undef CONFIG_CMD_IMLS

#define CONFIG_BOOTDELAY		3

#define CONFIG_LOADADDR			0x12000000
#define CONFIG_SYS_TEXT_BASE		0x17800000

#define CONFIG_EXTRA_ENV_SETTINGS \
	"script=u-boot.scr\0" \
	"fit_file=/boot/system.itb\0" \
	"loadaddr=0x12000000\0" \
	"fit_addr_r=0x14000000\0" \
	"uboot=/boot/u-boot.imx\0" \
	"uboot_sz=d0000\0" \
	"rescue_sys_addr=f0000\0" \
	"rescue_sys_length=f10000\0" \
	"panel=lb07wv8\0" \
	"splashpos=m,m\0" \
	"console=" CONFIG_CONSOLE_DEV "\0" \
	"fdt_high=0xffffffff\0"	  \
	"initrd_high=0xffffffff\0" \
	"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
	"set_fit_default=fdt addr ${fit_addr_r};fdt set /configurations " \
		"default ${board_type}\0" \
	"get_env=mw ${loadaddr} 0 0x20000;" \
		"mmc rescan;" \
		"ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} env.txt;" \
		"env import -t ${loadaddr}\0" \
	"default_env=mw ${loadaddr} 0 0x20000;" \
		"env export -t ${loadaddr} serial# ethaddr eth1addr " \
		"board_type panel;" \
		"env default -a;" \
		"env import -t ${loadaddr}\0" \
	"loadbootscript=" \
		"ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
	"bootscript=echo Running bootscript from mmc ...; " \
		"source\0" \
	"mmcpart=1\0" \
	"mmcdev=0\0" \
	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
	"mmcargs=setenv bootargs console=${console},${baudrate} " \
		"root=${mmcroot}\0" \
	"mmcboot=echo Booting from mmc ...; " \
		"run mmcargs addmtd addmisc set_fit_default;" \
		"bootm ${fit_addr_r}\0" \
	"mmc_load_fit=ext2load mmc ${mmcdev}:${mmcpart} ${fit_addr_r} " \
		"${fit_file}\0" \
	"mmc_load_uboot=ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} " \
		"${uboot}\0" \
	"mmc_upd_uboot=mw.b ${loadaddr} 0xff ${uboot_sz};" \
		"setexpr cmp_buf ${loadaddr} + ${uboot_sz};" \
		"setexpr uboot_maxsize ${uboot_sz} - 400;" \
		"mw.b ${cmp_buf} 0x00 ${uboot_sz};" \
		"run mmc_load_uboot;sf probe;sf erase 0 ${uboot_sz};" \
		"sf write ${loadaddr} 400 ${filesize};" \
		"sf read ${cmp_buf} 400 ${uboot_sz};" \
		"cmp.b ${loadaddr} ${cmp_buf} ${uboot_maxsize}\0" \
	"ubiboot=echo Booting from ubi ...; " \
		"run ubiargs addmtd addmisc set_fit_default;" \
		"bootm ${fit_addr_r}\0" \
	"ubifs_load_fit=sf probe;ubi part ubi 2048;ubifsmount ubi:rootfs;" \
		"ubifsload ${fit_addr_r} /boot/system.itb; " \
		"imi ${fit_addr_r}\0 " \
	"rescueargs=setenv bootargs console=${console},${baudrate} " \
		"root=/dev/ram rw\0 " \
	"rescueboot=echo Booting rescue system from NOR ...; " \
		"run rescueargs addmtd addmisc set_fit_default;" \
		"bootm ${fit_addr_r}\0" \
	"rescue_load_fit=sf probe;sf read ${fit_addr_r} ${rescue_sys_addr} " \
		"${rescue_sys_length}; imi ${fit_addr_r}\0" \
	CONFIG_EXTRA_ENV_BOARD_SETTINGS

#define CONFIG_BOOTCOMMAND \
	"mmc dev ${mmcdev};" \
	"if mmc rescan; then " \
		"if run loadbootscript; then " \
			"run bootscript; " \
		"else " \
			"if run mmc_load_fit; then " \
				"run mmcboot; " \
			"else " \
				"if run ubifs_load_fit; then " \
					"run ubiboot; " \
				"else " \
					"if run rescue_load_fit; then " \
						"run rescueboot; " \
					"else " \
						"echo RESCUE SYSTEM BOOT " \
							"FAILURE;" \
					"fi; " \
				"fi; " \
			"fi; " \
		"fi; " \
	"else " \
		"if run ubifs_load_fit; then " \
			"run ubiboot; " \
		"else " \
			"if run rescue_load_fit; then " \
				"run rescueboot; " \
			"else " \
				"echo RESCUE SYSTEM BOOT FAILURE;" \
			"fi; " \
		"fi; " \
	"fi"

#define CONFIG_ARP_TIMEOUT		200UL

/* Miscellaneous configurable options */
#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_CBSIZE		256

/* Print Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_MAXARGS             16
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE

#define CONFIG_SYS_MEMTEST_START	PHYS_SDRAM
#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x100000)
#define CONFIG_SYS_MEMTEST_SCRATCH	0x10800000

#define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR

#define CONFIG_CMDLINE_EDITING
#define CONFIG_STACKSIZE		(128 * 1024)

/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS		1
#define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR

#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
#define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE

#define CONFIG_SYS_INIT_SP_OFFSET \
	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)

/* FLASH and environment organization */
#define CONFIG_SYS_NO_FLASH

#define CONFIG_ENV_SIZE			(12 * 1024)
#define CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
#define CONFIG_ENV_SPI_BUS		CONFIG_SF_DEFAULT_BUS
#define CONFIG_ENV_SPI_CS		CONFIG_SF_DEFAULT_CS
#define CONFIG_ENV_SPI_MAX_HZ		CONFIG_SF_DEFAULT_SPEED
#define CONFIG_ENV_SPI_MODE		CONFIG_SF_DEFAULT_MODE
#define CONFIG_ENV_SECT_SIZE		(0x010000)
#define CONFIG_ENV_OFFSET		(0x0d0000)
#define CONFIG_ENV_OFFSET_REDUND	(0x0e0000)

#define CONFIG_OF_LIBFDT

#define CONFIG_CMD_CACHE

#define CONFIG_SYS_FSL_USDHC_NUM	2

/* I2C */
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED		100000
#define CONFIG_SYS_I2C_SLAVE		0x7f
#define CONFIG_SYS_I2C_NOPROBES		{ {0, 0x00} }

#define CONFIG_CMD_GPIO

/* NAND stuff */
#define CONFIG_CMD_NAND
#define CONFIG_CMD_NAND_TRIMFFS
#define CONFIG_NAND_MXS
#define CONFIG_SYS_MAX_NAND_DEVICE	1
#define CONFIG_SYS_NAND_BASE		0x40000000
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_ONFI_DETECTION

/* DMA stuff, needed for GPMI/MXS NAND support */
#define CONFIG_APBH_DMA
#define CONFIG_APBH_DMA_BURST
#define CONFIG_APBH_DMA_BURST8

/* RTC */
#define CONFIG_SYS_I2C_RTC_ADDR	0x68
#define CONFIG_SYS_RTC_BUS_NUM	2
#define CONFIG_RTC_M41T11
#define CONFIG_CMD_DATE

/* USB Configs */
#define CONFIG_CMD_USB
#define CONFIG_CMD_FAT
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_MX6
#define CONFIG_USB_STORAGE
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET	/* For OTG port */
#define CONFIG_MXC_USB_PORTSC	(PORT_PTS_UTMI | PORT_PTS_PTW)
#define CONFIG_MXC_USB_FLAGS	0

/* UBI support */
#define CONFIG_CMD_MTDPARTS
#define CONFIG_MTD_PARTITIONS
#define CONFIG_MTD_DEVICE
#define CONFIG_RBTREE
#define CONFIG_LZO
#define CONFIG_CMD_UBI
#define CONFIG_CMD_UBIFS

#define CONFIG_MTD_UBI_FASTMAP
#define CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT	1

#define CONFIG_HW_WATCHDOG
#define CONFIG_IMX_WATCHDOG

#define CONFIG_FIT

/* Framebuffer */
#define CONFIG_VIDEO
#define CONFIG_VIDEO_IPUV3
/* check this console not needed, after test remove it */
#define CONFIG_CFB_CONSOLE
#define CONFIG_VGA_AS_SINGLE_DEVICE
#define CONFIG_SYS_CONSOLE_IS_IN_ENV
#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
#define CONFIG_VIDEO_BMP_RLE8
#define CONFIG_SPLASH_SCREEN
#define CONFIG_SPLASH_SCREEN_ALIGN
#define CONFIG_BMP_16BPP
#define CONFIG_VIDEO_LOGO
#define CONFIG_VIDEO_BMP_LOGO
#define CONFIG_IPUV3_CLK 198000000
#define CONFIG_IMX_VIDEO_SKIP

#define CONFIG_CMD_BMP

#define CONFIG_PWM_IMX
#define CONFIG_IMX6_PWM_PER_CLK	66000000

#endif /* __ARISTAINETOS_COMMON_CONFIG_H */
Commit	Line	Data
7254d92e HS	1	/*
	2	* (C) Copyright 2015
	3	* (C) Copyright 2014
	4	* Heiko Schocher, DENX Software Engineering, hs@denx.de.
	5	*
	6	* Based on:
	7	* Copyright (C) 2012 Freescale Semiconductor, Inc.
	8	*
	9	* Configuration settings for the Freescale i.MX6Q SabreSD board.
	10	*
	11	* SPDX-License-Identifier: GPL-2.0+
	12	*/
	13	#ifndef __ARISTAINETOS_COMMON_CONFIG_H
	14	#define __ARISTAINETOS_COMMON_CONFIG_H
	15
	16	#define CONFIG_MX6
	17
	18	#include "mx6_common.h"
	19	#include <linux/sizes.h>
	20
	21	#define CONFIG_DISPLAY_CPUINFO
	22	#define CONFIG_DISPLAY_BOARDINFO
	23
	24	#include <asm/arch/imx-regs.h>
	25	#include <asm/imx-common/gpio.h>
	26
	27	#define CONFIG_MACH_TYPE 4501
	28	#define CONFIG_MMCROOT "/dev/mmcblk0p1"
	29	#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
	30
	31	#define CONFIG_SYS_GENERIC_BOARD
	32
	33	/* Size of malloc() pool */
	34	#define CONFIG_SYS_MALLOC_LEN (64 * SZ_1M)
	35
	36	#define CONFIG_BOARD_EARLY_INIT_F
	37	#define CONFIG_MXC_GPIO
	38
	39	#define CONFIG_MXC_UART
	40
	41	#define CONFIG_CMD_FUSE
	42	#define CONFIG_MXC_OCOTP
	43
	44	/* MMC Configs */
	45	#define CONFIG_FSL_ESDHC
	46	#define CONFIG_FSL_USDHC
	47	#define CONFIG_SYS_FSL_ESDHC_ADDR 0
	48
	49	#define CONFIG_MMC
	50	#define CONFIG_CMD_MMC
	51	#define CONFIG_GENERIC_MMC
	52	#define CONFIG_BOUNCE_BUFFER
	53	#define CONFIG_CMD_EXT2
	54	#define CONFIG_CMD_FAT
	55	#define CONFIG_DOS_PARTITION
	56
	57	#define CONFIG_CMD_PING
	58	#define CONFIG_CMD_DHCP
	59	#define CONFIG_CMD_MII
	60	#define CONFIG_CMD_NET
	61	#define CONFIG_FEC_MXC
	62	#define CONFIG_MII
	63	#define IMX_FEC_BASE ENET_BASE_ADDR
	64	#define CONFIG_ETHPRIME "FEC"
65	#define CONFIG_FEC_MXC_PHYADDR 0
66
67	#define CONFIG_PHYLIB
68	#define CONFIG_PHY_MICREL
69
70	#define CONFIG_CMD_SF
71	#define CONFIG_SPI_FLASH
72	#define CONFIG_SPI_FLASH_MTD
73	#define CONFIG_SPI_FLASH_STMICRO
74	#define CONFIG_MXC_SPI
75	#define CONFIG_SF_DEFAULT_BUS 3
76	#define CONFIG_SF_DEFAULT_SPEED 20000000
77	#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
78	#define CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
79
80	/* allow to overwrite serial and ethaddr */
81	#define CONFIG_ENV_OVERWRITE
82	#define CONFIG_CONS_INDEX 1
83	#define CONFIG_BAUDRATE 115200
84
85	/* Command definition */
86	#include <config_cmd_default.h>
87
88	#define CONFIG_CMD_BMODE
89	#define CONFIG_CMD_BOOTZ
90	#define CONFIG_CMD_SETEXPR
91	#undef CONFIG_CMD_IMLS
92
93	#define CONFIG_BOOTDELAY 3
94
95	#define CONFIG_LOADADDR 0x12000000
96	#define CONFIG_SYS_TEXT_BASE 0x17800000
97
98	#define CONFIG_EXTRA_ENV_SETTINGS \
99	"script=u-boot.scr\0" \
100	"fit_file=/boot/system.itb\0" \
101	"loadaddr=0x12000000\0" \
102	"fit_addr_r=0x14000000\0" \
103	"uboot=/boot/u-boot.imx\0" \
104	"uboot_sz=d0000\0" \
105	"rescue_sys_addr=f0000\0" \
106	"rescue_sys_length=f10000\0" \
107	"panel=lb07wv8\0" \
108	"splashpos=m,m\0" \
109	"console=" CONFIG_CONSOLE_DEV "\0" \
110	"fdt_high=0xffffffff\0" \
111	"initrd_high=0xffffffff\0" \
112	"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
113	"set_fit_default=fdt addr ${fit_addr_r};fdt set /configurations " \
114	"default ${board_type}\0" \
115	"get_env=mw ${loadaddr} 0 0x20000;" \
116	"mmc rescan;" \
117	"ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} env.txt;" \
118	"env import -t ${loadaddr}\0" \
119	"default_env=mw ${loadaddr} 0 0x20000;" \
120	"env export -t ${loadaddr} serial# ethaddr eth1addr " \
121	"board_type panel;" \
122	"env default -a;" \
123	"env import -t ${loadaddr}\0" \
124	"loadbootscript=" \
125	"ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
126	"bootscript=echo Running bootscript from mmc ...; " \
127	"source\0" \
128	"mmcpart=1\0" \
129	"mmcdev=0\0" \
130	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
131	"mmcargs=setenv bootargs console=${console},${baudrate} " \
132	"root=${mmcroot}\0" \
133	"mmcboot=echo Booting from mmc ...; " \
134	"run mmcargs addmtd addmisc set_fit_default;" \
135	"bootm ${fit_addr_r}\0" \
136	"mmc_load_fit=ext2load mmc ${mmcdev}:${mmcpart} ${fit_addr_r} " \
137	"${fit_file}\0" \
138	"mmc_load_uboot=ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} " \
139	"${uboot}\0" \
140	"mmc_upd_uboot=mw.b ${loadaddr} 0xff ${uboot_sz};" \
141	"setexpr cmp_buf ${loadaddr} + ${uboot_sz};" \
142	"setexpr uboot_maxsize ${uboot_sz} - 400;" \
143	"mw.b ${cmp_buf} 0x00 ${uboot_sz};" \
144	"run mmc_load_uboot;sf probe;sf erase 0 ${uboot_sz};" \
145	"sf write ${loadaddr} 400 ${filesize};" \
146	"sf read ${cmp_buf} 400 ${uboot_sz};" \
147	"cmp.b ${loadaddr} ${cmp_buf} ${uboot_maxsize}\0" \
148	"ubiboot=echo Booting from ubi ...; " \
149	"run ubiargs addmtd addmisc set_fit_default;" \
150	"bootm ${fit_addr_r}\0" \
151	"ubifs_load_fit=sf probe;ubi part ubi 2048;ubifsmount ubi:rootfs;" \
152	"ubifsload ${fit_addr_r} /boot/system.itb; " \
153	"imi ${fit_addr_r}\0 " \
154	"rescueargs=setenv bootargs console=${console},${baudrate} " \
155	"root=/dev/ram rw\0 " \
156	"rescueboot=echo Booting rescue system from NOR ...; " \
157	"run rescueargs addmtd addmisc set_fit_default;" \
158	"bootm ${fit_addr_r}\0" \
159	"rescue_load_fit=sf probe;sf read ${fit_addr_r} ${rescue_sys_addr} " \
160	"${rescue_sys_length}; imi ${fit_addr_r}\0" \
161	CONFIG_EXTRA_ENV_BOARD_SETTINGS
162
163	#define CONFIG_BOOTCOMMAND \
164	"mmc dev ${mmcdev};" \
165	"if mmc rescan; then " \
166	"if run loadbootscript; then " \
167	"run bootscript; " \
168	"else " \
169	"if run mmc_load_fit; then " \
170	"run mmcboot; " \
171	"else " \
172	"if run ubifs_load_fit; then " \
173	"run ubiboot; " \
174	"else " \
175	"if run rescue_load_fit; then " \
176	"run rescueboot; " \
177	"else " \
178	"echo RESCUE SYSTEM BOOT " \
179	"FAILURE;" \
180	"fi; " \
181	"fi; " \
182	"fi; " \
183	"fi; " \
184	"else " \
185	"if run ubifs_load_fit; then " \
186	"run ubiboot; " \
187	"else " \
188	"if run rescue_load_fit; then " \
189	"run rescueboot; " \
190	"else " \
191	"echo RESCUE SYSTEM BOOT FAILURE;" \
192	"fi; " \
193	"fi; " \
194	"fi"
195
196	#define CONFIG_ARP_TIMEOUT 200UL
197
198	/* Miscellaneous configurable options */
199	#define CONFIG_SYS_LONGHELP
200	#define CONFIG_SYS_HUSH_PARSER
201	#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
202	#define CONFIG_AUTO_COMPLETE
203	#define CONFIG_SYS_CBSIZE 256
204
205	/* Print Buffer Size */
206	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
207	#define CONFIG_SYS_MAXARGS 16
208	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
209
210	#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
211	#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000)
212	#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
213
214	#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
215
216	#define CONFIG_CMDLINE_EDITING
217	#define CONFIG_STACKSIZE (128 * 1024)
218
219	/* Physical Memory Map */
220	#define CONFIG_NR_DRAM_BANKS 1
221	#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
222
223	#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
224	#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
225	#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
226
227	#define CONFIG_SYS_INIT_SP_OFFSET \
228	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
229	#define CONFIG_SYS_INIT_SP_ADDR \
230	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
231
232	/* FLASH and environment organization */
233	#define CONFIG_SYS_NO_FLASH
234
235	#define CONFIG_ENV_SIZE (12 * 1024)
236	#define CONFIG_ENV_IS_IN_SPI_FLASH
237	#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
238	#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
239	#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
240	#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
241	#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
242	#define CONFIG_ENV_SECT_SIZE (0x010000)
243	#define CONFIG_ENV_OFFSET (0x0d0000)
244	#define CONFIG_ENV_OFFSET_REDUND (0x0e0000)
245
246	#define CONFIG_OF_LIBFDT
247
248	#define CONFIG_CMD_CACHE
249
250	#define CONFIG_SYS_FSL_USDHC_NUM 2
251
252	/* I2C */
253	#define CONFIG_CMD_I2C
254	#define CONFIG_SYS_I2C
255	#define CONFIG_SYS_I2C_MXC
256	#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
257	#define CONFIG_SYS_I2C_SPEED 100000
258	#define CONFIG_SYS_I2C_SLAVE 0x7f
259	#define CONFIG_SYS_I2C_NOPROBES { {0, 0x00} }
260
261	#define CONFIG_CMD_GPIO
262
263	/* NAND stuff */
264	#define CONFIG_CMD_NAND
265	#define CONFIG_CMD_NAND_TRIMFFS
266	#define CONFIG_NAND_MXS
267	#define CONFIG_SYS_MAX_NAND_DEVICE 1
268	#define CONFIG_SYS_NAND_BASE 0x40000000
269	#define CONFIG_SYS_NAND_5_ADDR_CYCLE
270	#define CONFIG_SYS_NAND_ONFI_DETECTION
271
272	/* DMA stuff, needed for GPMI/MXS NAND support */
273	#define CONFIG_APBH_DMA
274	#define CONFIG_APBH_DMA_BURST
275	#define CONFIG_APBH_DMA_BURST8
276
277	/* RTC */
278	#define CONFIG_SYS_I2C_RTC_ADDR 0x68
279	#define CONFIG_SYS_RTC_BUS_NUM 2
280	#define CONFIG_RTC_M41T11
281	#define CONFIG_CMD_DATE
282
283	/* USB Configs */
284	#define CONFIG_CMD_USB
285	#define CONFIG_CMD_FAT
286	#define CONFIG_USB_EHCI
287	#define CONFIG_USB_EHCI_MX6
288	#define CONFIG_USB_STORAGE
289	#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
290	#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
291	#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI \| PORT_PTS_PTW)
292	#define CONFIG_MXC_USB_FLAGS 0
293
294	/* UBI support */
295	#define CONFIG_CMD_MTDPARTS
296	#define CONFIG_MTD_PARTITIONS
297	#define CONFIG_MTD_DEVICE
298	#define CONFIG_RBTREE
299	#define CONFIG_LZO
300	#define CONFIG_CMD_UBI
301	#define CONFIG_CMD_UBIFS
302
303	#define CONFIG_MTD_UBI_FASTMAP
304	#define CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT 1
305
306	#define CONFIG_HW_WATCHDOG
307	#define CONFIG_IMX_WATCHDOG
308
309	#define CONFIG_FIT
310
311	/* Framebuffer */
312	#define CONFIG_VIDEO
313	#define CONFIG_VIDEO_IPUV3
314	/* check this console not needed, after test remove it */
315	#define CONFIG_CFB_CONSOLE
316	#define CONFIG_VGA_AS_SINGLE_DEVICE
317	#define CONFIG_SYS_CONSOLE_IS_IN_ENV
318	#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
319	#define CONFIG_VIDEO_BMP_RLE8
320	#define CONFIG_SPLASH_SCREEN
321	#define CONFIG_SPLASH_SCREEN_ALIGN
322	#define CONFIG_BMP_16BPP
323	#define CONFIG_VIDEO_LOGO
324	#define CONFIG_VIDEO_BMP_LOGO
325	#define CONFIG_IPUV3_CLK 198000000
326	#define CONFIG_IMX_VIDEO_SKIP
327
328	#define CONFIG_CMD_BMP
329
330	#define CONFIG_PWM_IMX
331	#define CONFIG_IMX6_PWM_PER_CLK 66000000
332
333	#endif /* __ARISTAINETOS_COMMON_CONFIG_H */