[people/ms/u-boot.git] / include / configs / astro_mcf5373l.h

/*
 * Configuration settings for the Sentec Cobra Board.
 *
 * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

/*
 * configuration for ASTRO "Urmel" board.
 * Originating from Cobra5272 configuration, messed up by
 * Wolfgang Wegner <w.wegner@astro-kom.de>
 * Please do not bother the original author with bug reports
 * concerning this file.
 */

#ifndef _CONFIG_ASTRO_MCF5373L_H
#define _CONFIG_ASTRO_MCF5373L_H

#include <linux/stringify.h>

/*
 * set the card type to actually compile for; either of
 * the possibilities listed below has to be used!
 */
#define CONFIG_ASTRO_V532	1

#if CONFIG_ASTRO_V532
#define ASTRO_ID	0xF8
#elif CONFIG_ASTRO_V512
#define ASTRO_ID	0xFA
#elif CONFIG_ASTRO_TWIN7S2
#define ASTRO_ID	0xF9
#elif CONFIG_ASTRO_V912
#define ASTRO_ID	0xFC
#elif CONFIG_ASTRO_COFDMDUOS2
#define ASTRO_ID	0xFB
#else
#error No card type defined!
#endif

#define CONFIG_ASTRO5373L		/* define board type */

/* Command line configuration */
/*
 * CONFIG_RAM defines if u-boot is loaded via BDM (or started from
 * a different bootloader that has already performed RAM setup) or
 * started directly from flash, which is the regular case for production
 * boards.
 */
#ifdef CONFIG_RAM
#define CONFIG_MONITOR_IS_IN_RAM
#define CONFIG_SYS_TEXT_BASE		0x40020000
#define ENABLE_JFFS	0
#else
#define CONFIG_SYS_TEXT_BASE		0x00000000
#define ENABLE_JFFS	1
#endif

/* Define which commands should be available at u-boot command prompt */

#define CONFIG_CMD_DATE
#if ENABLE_JFFS
#define CONFIG_CMD_JFFS2
#endif
#define CONFIG_CMD_REGINFO
#define CONFIG_CMD_FPGA_LOADMK
#define CONFIG_CMDLINE_EDITING

#define CONFIG_MCFRTC
#undef RTC_DEBUG

/* Timer */
#define CONFIG_MCFTMR
#undef CONFIG_MCFPIT

/* I2C */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED	80000
#define CONFIG_SYS_FSL_I2C_SLAVE	0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET	0x58000
#define CONFIG_SYS_IMMR			CONFIG_SYS_MBAR

/*
 * Defines processor clock - important for correct timings concerning serial
 * interface etc.
 */

#define CONFIG_SYS_CLK			80000000
#define CONFIG_SYS_CPU_CLK		(CONFIG_SYS_CLK * 3)
#define CONFIG_SYS_SDRAM_SIZE		32		/* SDRAM size in MB */

#define CONFIG_SYS_CORE_SRAM_SIZE	0x8000
#define CONFIG_SYS_CORE_SRAM		0x80000000

#define CONFIG_SYS_UNIFY_CACHE

/*
 * Define baudrate for UART1 (console output, tftp, ...)
 * default value of CONFIG_BAUDRATE for Sentec board: 19200 baud
 * CONFIG_SYS_BAUDRATE_TABLE defines values that can be selected
 * in u-boot command interface
 */

#define CONFIG_BAUDRATE		115200

#define CONFIG_MCFUART
#define CONFIG_SYS_UART_PORT		(2)
#define CONFIG_SYS_UART2_ALT3_GPIO

/*
 * Watchdog configuration; Watchdog is disabled for running from RAM
 * and set to highest possible value else. Beware there is no check
 * in the watchdog code to validate the timeout value set here!
 */

#ifndef CONFIG_MONITOR_IS_IN_RAM
#define CONFIG_WATCHDOG
#define CONFIG_WATCHDOG_TIMEOUT 3355	/* timeout in milliseconds */
#endif

/*
 * Configuration for environment
 * Environment is located in the last sector of the flash
 */

#ifndef CONFIG_MONITOR_IS_IN_RAM
#define CONFIG_ENV_OFFSET		0x1FF8000
#define CONFIG_ENV_SECT_SIZE		0x8000
#define CONFIG_ENV_IS_IN_FLASH		1
#else
/*
 * environment in RAM - This is used to use a single PC-based application
 * to load an image, load U-Boot, load an environment and then start U-Boot
 * to execute the commands from the environment. Feedback is done via setting
 * and reading memory locations.
 */
#define CONFIG_ENV_ADDR		0x40060000
#define CONFIG_ENV_SECT_SIZE	0x8000
#define CONFIG_ENV_IS_IN_FLASH	1
#endif

/* here we put our FPGA configuration... */
#define CONFIG_MISC_INIT_R	1

/* Define user parameters that have to be customized most likely */

/* AUTOBOOT settings - booting images automatically by u-boot after power on */

/*
 * used for autoboot, delay in seconds u-boot will wait before starting
 * defined (auto-)boot command, setting to -1 disables delay, setting to
 * 0 will too prevent access to u-boot command interface: u-boot then has
 * to be reflashed
 * beware - watchdog is not serviced during autoboot delay time!
 */
#ifdef CONFIG_MONITOR_IS_IN_RAM
#define CONFIG_BOOTDELAY	1
#else
#define CONFIG_BOOTDELAY	1
#endif

/*
 * The following settings will be contained in the environment block ; if you
 * want to use a neutral environment all those settings can be manually set in
 * u-boot: 'set' command
 */

#define CONFIG_EXTRA_ENV_SETTINGS			\
	"loaderversion=11\0"				\
	"card_id="__stringify(ASTRO_ID)"\0"			\
	"alterafile=0\0"				\
	"xilinxfile=0\0"				\
	"xilinxload=imxtract 0x540000 $xilinxfile 0x41000000&&"\
		"fpga load 0 0x41000000 $filesize\0" \
	"alteraload=imxtract 0x6c0000 $alterafile 0x41000000&&"\
		"fpga load 1 0x41000000 $filesize\0" \
	"env_default=1\0"				\
	"env_check=if test $env_default -eq 1;"\
		" then setenv env_default 0;saveenv;fi\0"

/*
 * "update" is a non-standard command that has to be supplied
 * by external update.c; This is not included in mainline because
 * it needs non-blocking CFI routines.
 */
#ifdef CONFIG_MONITOR_IS_IN_RAM
#define CONFIG_BOOTCOMMAND	""	/* no autoboot in this case */
#else
#if CONFIG_ASTRO_V532
#define CONFIG_BOOTCOMMAND	"protect off 0x80000 0x1ffffff;run env_check;"\
				"run xilinxload&&run alteraload&&bootm 0x80000;"\
				"update;reset"
#else
#define CONFIG_BOOTCOMMAND	"protect off 0x80000 0x1ffffff;run env_check;"\
				"run xilinxload&&bootm 0x80000;update;reset"
#endif
#endif

/* default bootargs that are considered during boot */
#define CONFIG_BOOTARGS		" console=ttyS2,115200 rootfstype=romfs"\
				" loaderversion=$loaderversion"

/* default RAM address for user programs */
#define CONFIG_SYS_LOAD_ADDR	0x20000

#define CONFIG_SYS_LONGHELP

#if (CONFIG_COMMANDS & CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE		1024
#else
#define CONFIG_SYS_CBSIZE		256
#endif
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
#define CONFIG_SYS_MAXARGS		16
#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE

#define CONFIG_FPGA_COUNT	1
#define CONFIG_FPGA
#define	CONFIG_FPGA_XILINX
#define	CONFIG_FPGA_SPARTAN3
#define CONFIG_FPGA_ALTERA
#define CONFIG_FPGA_CYCLON2
#define CONFIG_SYS_FPGA_PROG_FEEDBACK
#define CONFIG_SYS_FPGA_WAIT		1000

/* End of user parameters to be customized */

/* Defines memory range for test */

#define CONFIG_SYS_MEMTEST_START	0x40020000
#define CONFIG_SYS_MEMTEST_END		0x41ffffff

/*
 * Low Level Configuration Settings
 * (address mappings, register initial values, etc.)
 * You should know what you are doing if you make changes here.
 */

/* Base register address */

#define CONFIG_SYS_MBAR		0xFC000000	/* Register Base Addrs */

/* System Conf. Reg. & System Protection Reg. */

#define CONFIG_SYS_SCR		0x0003;
#define CONFIG_SYS_SPR		0xffff;

/*
 * Definitions for initial stack pointer and data area (in internal SRAM)
 */
#define CONFIG_SYS_INIT_RAM_ADDR	0x80000000
#define CONFIG_SYS_INIT_RAM_SIZE		0x8000
#define CONFIG_SYS_INIT_RAM_CTRL	0x221
#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - \
					 GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET

/*
 * Start addresses for the final memory configuration
 * (Set up by the startup code)
 * for MCF5373, the allowable range is 0x40000000 to 0x7FF00000
 */
#define CONFIG_SYS_SDRAM_BASE		0x40000000

/*
 * Chipselect bank definitions
 *
 * CS0 - Flash 32MB (first 16MB)
 * CS1 - Flash 32MB (second half)
 * CS2 - FPGA
 * CS3 - FPGA
 * CS4 - unused
 * CS5 - unused
 */
#define CONFIG_SYS_CS0_BASE		0
#define CONFIG_SYS_CS0_MASK		0x00ff0001
#define CONFIG_SYS_CS0_CTRL		0x00001fc0

#define CONFIG_SYS_CS1_BASE		0x01000000
#define CONFIG_SYS_CS1_MASK		0x00ff0001
#define CONFIG_SYS_CS1_CTRL		0x00001fc0

#define CONFIG_SYS_CS2_BASE		0x20000000
#define CONFIG_SYS_CS2_MASK		0x00ff0001
#define CONFIG_SYS_CS2_CTRL		0x0000fec0

#define CONFIG_SYS_CS3_BASE		0x21000000
#define CONFIG_SYS_CS3_MASK		0x00ff0001
#define CONFIG_SYS_CS3_CTRL		0x0000fec0

#define CONFIG_SYS_FLASH_BASE		0x00000000

#ifdef	CONFIG_MONITOR_IS_IN_RAM
#define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_TEXT_BASE
#else
/* This is mainly used during relocation in start.S */
#define CONFIG_SYS_MONITOR_BASE		(CONFIG_SYS_FLASH_BASE + 0x400)
#endif
/* Reserve 256 kB for Monitor */
#define CONFIG_SYS_MONITOR_LEN		(256 << 10)

#define CONFIG_SYS_BOOTPARAMS_LEN	(64 * 1024)
/* Reserve 128 kB for malloc() */
#define CONFIG_SYS_MALLOC_LEN		(128 << 10)

/*
 * For booting Linux, the board info and command line data
 * have to be in the first 8 MB of memory, since this is
 * the maximum mapped by the Linux kernel during initialization ??
 */
#define CONFIG_SYS_BOOTMAPSZ		(CONFIG_SYS_SDRAM_BASE + \
						(CONFIG_SYS_SDRAM_SIZE << 20))

/* FLASH organization */
#define CONFIG_SYS_MAX_FLASH_BANKS	1
#define CONFIG_SYS_MAX_FLASH_SECT	259
#define CONFIG_SYS_FLASH_ERASE_TOUT	1000

#define CONFIG_SYS_FLASH_CFI		1
#define CONFIG_FLASH_CFI_DRIVER		1
#define CONFIG_SYS_FLASH_SIZE		0x2000000
#define CONFIG_SYS_FLASH_PROTECTION	1
#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	1
#define CONFIG_SYS_FLASH_CFI_NONBLOCK	1

#define LDS_BOARD_TEXT \
	. = DEFINED(env_offset) ? env_offset : .; \
	common/env_embedded.o       (.text*)

#if ENABLE_JFFS
/* JFFS Partition offset set */
#define CONFIG_SYS_JFFS2_FIRST_BANK    0
#define CONFIG_SYS_JFFS2_NUM_BANKS     1
/* 512k reserved for u-boot */
#define CONFIG_SYS_JFFS2_FIRST_SECTOR  0x40
#endif

/* Cache Configuration */
#define CONFIG_SYS_CACHELINE_SIZE	16

#define ICACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
					 CONFIG_SYS_INIT_RAM_SIZE - 8)
#define DCACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
					 CONFIG_SYS_INIT_RAM_SIZE - 4)
#define CONFIG_SYS_ICACHE_INV		(CF_CACR_CINVA)
#define CONFIG_SYS_CACHE_ACR0		(CONFIG_SYS_SDRAM_BASE | \
					 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
					 CF_ACR_EN | CF_ACR_SM_ALL)
#define CONFIG_SYS_CACHE_ICACR		(CF_CACR_EC | CF_CACR_CINVA | \
					 CF_CACR_DCM_P)

#endif	/* _CONFIG_ASTRO_MCF5373L_H */
Commit	Line	Data
9d79e575 WW	1	/*
	2	* Configuration settings for the Sentec Cobra Board.
	3	*
	4	* (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
	5	*
3765b3e7	6	* SPDX-License-Identifier: GPL-2.0+
9d79e575 WW	7	*/
	8
	9	/*
	10	* configuration for ASTRO "Urmel" board.
	11	* Originating from Cobra5272 configuration, messed up by
	12	* Wolfgang Wegner <w.wegner@astro-kom.de>
	13	* Please do not bother the original author with bug reports
	14	* concerning this file.
	15	*/
	16
	17	#ifndef _CONFIG_ASTRO_MCF5373L_H
	18	#define _CONFIG_ASTRO_MCF5373L_H
	19
51926d5e MV	20	#include <linux/stringify.h>
51926d5e MV	21
9d79e575 WW	22	/*
	23	* set the card type to actually compile for; either of
	24	* the possibilities listed below has to be used!
	25	*/
	26	#define CONFIG_ASTRO_V532 1
	27
	28	#if CONFIG_ASTRO_V532
	29	#define ASTRO_ID 0xF8
	30	#elif CONFIG_ASTRO_V512
	31	#define ASTRO_ID 0xFA
	32	#elif CONFIG_ASTRO_TWIN7S2
	33	#define ASTRO_ID 0xF9
	34	#elif CONFIG_ASTRO_V912
	35	#define ASTRO_ID 0xFC
	36	#elif CONFIG_ASTRO_COFDMDUOS2
	37	#define ASTRO_ID 0xFB
	38	#else
	39	#error No card type defined!
	40	#endif
	41
9d79e575 WW	42	#define CONFIG_ASTRO5373L /* define board type */
	43
	44	/* Command line configuration */
9d79e575	45	/*
d24f2d32	46	* CONFIG_RAM defines if u-boot is loaded via BDM (or started from
9d79e575 WW	47	* a different bootloader that has already performed RAM setup) or
	48	* started directly from flash, which is the regular case for production
	49	* boards.
	50	*/
d24f2d32	51	#ifdef CONFIG_RAM
9d79e575	52	#define CONFIG_MONITOR_IS_IN_RAM
14d0a02a	53	#define CONFIG_SYS_TEXT_BASE 0x40020000
9d79e575 WW	54	#define ENABLE_JFFS 0
9d79e575 WW	55	#else
14d0a02a	56	#define CONFIG_SYS_TEXT_BASE 0x00000000
9d79e575 WW	57	#define ENABLE_JFFS 1
	58	#endif
	59
3f42dc87	60	/* Define which commands should be available at u-boot command prompt */
9d79e575	61
9d79e575	62	#define CONFIG_CMD_DATE
9d79e575 WW	63	#if ENABLE_JFFS
	64	#define CONFIG_CMD_JFFS2
	65	#endif
	66	#define CONFIG_CMD_REGINFO
64e809af	67	#define CONFIG_CMD_FPGA_LOADMK
9d79e575 WW	68	#define CONFIG_CMDLINE_EDITING
9d79e575 WW	69
9d79e575 WW	70	#define CONFIG_MCFRTC
	71	#undef RTC_DEBUG
	72
	73	/* Timer */
	74	#define CONFIG_MCFTMR
	75	#undef CONFIG_MCFPIT
	76
	77	/* I2C */
00f792e0 HS	78	#define CONFIG_SYS_I2C
	79	#define CONFIG_SYS_I2C_FSL
	80	#define CONFIG_SYS_FSL_I2C_SPEED 80000
	81	#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
	82	#define CONFIG_SYS_FSL_I2C_OFFSET 0x58000
9d79e575 WW	83	#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
	84
	85	/*
	86	* Defines processor clock - important for correct timings concerning serial
	87	* interface etc.
9d79e575 WW	88	*/
9d79e575 WW	89
9d79e575 WW	90	#define CONFIG_SYS_CLK 80000000
	91	#define CONFIG_SYS_CPU_CLK (CONFIG_SYS_CLK * 3)
	92	#define CONFIG_SYS_SDRAM_SIZE 32 /* SDRAM size in MB */
	93
	94	#define CONFIG_SYS_CORE_SRAM_SIZE 0x8000
	95	#define CONFIG_SYS_CORE_SRAM 0x80000000
	96
	97	#define CONFIG_SYS_UNIFY_CACHE
	98
	99	/*
	100	* Define baudrate for UART1 (console output, tftp, ...)
	101	* default value of CONFIG_BAUDRATE for Sentec board: 19200 baud
	102	* CONFIG_SYS_BAUDRATE_TABLE defines values that can be selected
	103	* in u-boot command interface
	104	*/
	105
	106	#define CONFIG_BAUDRATE 115200
9d79e575 WW	107
	108	#define CONFIG_MCFUART
	109	#define CONFIG_SYS_UART_PORT (2)
	110	#define CONFIG_SYS_UART2_ALT3_GPIO
	111
	112	/*
	113	* Watchdog configuration; Watchdog is disabled for running from RAM
	114	* and set to highest possible value else. Beware there is no check
	115	* in the watchdog code to validate the timeout value set here!
	116	*/
	117
	118	#ifndef CONFIG_MONITOR_IS_IN_RAM
	119	#define CONFIG_WATCHDOG
	120	#define CONFIG_WATCHDOG_TIMEOUT 3355 /* timeout in milliseconds */
	121	#endif
	122
	123	/*
	124	* Configuration for environment
	125	* Environment is located in the last sector of the flash
	126	*/
	127
	128	#ifndef CONFIG_MONITOR_IS_IN_RAM
	129	#define CONFIG_ENV_OFFSET 0x1FF8000
	130	#define CONFIG_ENV_SECT_SIZE 0x8000
	131	#define CONFIG_ENV_IS_IN_FLASH 1
	132	#else
	133	/*
	134	* environment in RAM - This is used to use a single PC-based application
	135	* to load an image, load U-Boot, load an environment and then start U-Boot
	136	* to execute the commands from the environment. Feedback is done via setting
	137	* and reading memory locations.
	138	*/
	139	#define CONFIG_ENV_ADDR 0x40060000
	140	#define CONFIG_ENV_SECT_SIZE 0x8000
	141	#define CONFIG_ENV_IS_IN_FLASH 1
	142	#endif
	143
	144	/* here we put our FPGA configuration... */
	145	#define CONFIG_MISC_INIT_R 1
	146
	147	/* Define user parameters that have to be customized most likely */
	148
	149	/* AUTOBOOT settings - booting images automatically by u-boot after power on */
	150
	151	/*
	152	* used for autoboot, delay in seconds u-boot will wait before starting
	153	* defined (auto-)boot command, setting to -1 disables delay, setting to
	154	* 0 will too prevent access to u-boot command interface: u-boot then has
	155	* to be reflashed
	156	* beware - watchdog is not serviced during autoboot delay time!
	157	*/
	158	#ifdef CONFIG_MONITOR_IS_IN_RAM
	159	#define CONFIG_BOOTDELAY 1
	160	#else
	161	#define CONFIG_BOOTDELAY 1
	162	#endif
	163
	164	/*
	165	* The following settings will be contained in the environment block ; if you
	166	* want to use a neutral environment all those settings can be manually set in
	167	* u-boot: 'set' command
	168	*/
	169
9d79e575 WW	170	#define CONFIG_EXTRA_ENV_SETTINGS \
9d79e575 WW	171	"loaderversion=11\0" \
51926d5e	172	"card_id="__stringify(ASTRO_ID)"\0" \
9d79e575 WW	173	"alterafile=0\0" \
	174	"xilinxfile=0\0" \
	175	"xilinxload=imxtract 0x540000 $xilinxfile 0x41000000&&"\
	176	"fpga load 0 0x41000000 $filesize\0" \
	177	"alteraload=imxtract 0x6c0000 $alterafile 0x41000000&&"\
	178	"fpga load 1 0x41000000 $filesize\0" \
	179	"env_default=1\0" \
	180	"env_check=if test $env_default -eq 1;"\
	181	" then setenv env_default 0;saveenv;fi\0"
	182
	183	/*
	184	* "update" is a non-standard command that has to be supplied
	185	* by external update.c; This is not included in mainline because
	186	* it needs non-blocking CFI routines.
	187	*/
	188	#ifdef CONFIG_MONITOR_IS_IN_RAM
	189	#define CONFIG_BOOTCOMMAND "" /* no autoboot in this case */
	190	#else
	191	#if CONFIG_ASTRO_V532
	192	#define CONFIG_BOOTCOMMAND "protect off 0x80000 0x1ffffff;run env_check;"\
	193	"run xilinxload&&run alteraload&&bootm 0x80000;"\
	194	"update;reset"
	195	#else
	196	#define CONFIG_BOOTCOMMAND "protect off 0x80000 0x1ffffff;run env_check;"\
	197	"run xilinxload&&bootm 0x80000;update;reset"
	198	#endif
	199	#endif
	200
	201	/* default bootargs that are considered during boot */
	202	#define CONFIG_BOOTARGS " console=ttyS2,115200 rootfstype=romfs"\
	203	" loaderversion=$loaderversion"
	204
9d79e575 WW	205	/* default RAM address for user programs */
	206	#define CONFIG_SYS_LOAD_ADDR 0x20000
	207
	208	#define CONFIG_SYS_LONGHELP
	209
	210	#if (CONFIG_COMMANDS & CONFIG_CMD_KGDB)
	211	#define CONFIG_SYS_CBSIZE 1024
	212	#else
	213	#define CONFIG_SYS_CBSIZE 256
	214	#endif
	215	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
	216	#define CONFIG_SYS_MAXARGS 16
	217	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
	218
	219	#define CONFIG_FPGA_COUNT 1
	220	#define CONFIG_FPGA
	221	#define CONFIG_FPGA_XILINX
	222	#define CONFIG_FPGA_SPARTAN3
	223	#define CONFIG_FPGA_ALTERA
	224	#define CONFIG_FPGA_CYCLON2
	225	#define CONFIG_SYS_FPGA_PROG_FEEDBACK
	226	#define CONFIG_SYS_FPGA_WAIT 1000
	227
	228	/* End of user parameters to be customized */
	229
	230	/* Defines memory range for test */
	231
	232	#define CONFIG_SYS_MEMTEST_START 0x40020000
	233	#define CONFIG_SYS_MEMTEST_END 0x41ffffff
	234
	235	/*
	236	* Low Level Configuration Settings
	237	* (address mappings, register initial values, etc.)
	238	* You should know what you are doing if you make changes here.
	239	*/
	240
	241	/* Base register address */
	242
	243	#define CONFIG_SYS_MBAR 0xFC000000 /* Register Base Addrs */
	244
	245	/* System Conf. Reg. & System Protection Reg. */
	246
	247	#define CONFIG_SYS_SCR 0x0003;
	248	#define CONFIG_SYS_SPR 0xffff;
	249
	250	/*
	251	* Definitions for initial stack pointer and data area (in internal SRAM)
	252	*/
	253	#define CONFIG_SYS_INIT_RAM_ADDR 0x80000000
553f0982	254	#define CONFIG_SYS_INIT_RAM_SIZE 0x8000
9d79e575	255	#define CONFIG_SYS_INIT_RAM_CTRL 0x221
553f0982	256	#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
25ddd1fb	257	GENERATED_GBL_DATA_SIZE)
9d79e575 WW	258	#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
	259
	260	/*
	261	* Start addresses for the final memory configuration
	262	* (Set up by the startup code)
	263	* for MCF5373, the allowable range is 0x40000000 to 0x7FF00000
	264	*/
	265	#define CONFIG_SYS_SDRAM_BASE 0x40000000
	266
	267	/*
	268	* Chipselect bank definitions
	269	*
	270	* CS0 - Flash 32MB (first 16MB)
	271	* CS1 - Flash 32MB (second half)
	272	* CS2 - FPGA
	273	* CS3 - FPGA
	274	* CS4 - unused
	275	* CS5 - unused
	276	*/
	277	#define CONFIG_SYS_CS0_BASE 0
	278	#define CONFIG_SYS_CS0_MASK 0x00ff0001
	279	#define CONFIG_SYS_CS0_CTRL 0x00001fc0
	280
	281	#define CONFIG_SYS_CS1_BASE 0x01000000
	282	#define CONFIG_SYS_CS1_MASK 0x00ff0001
	283	#define CONFIG_SYS_CS1_CTRL 0x00001fc0
	284
	285	#define CONFIG_SYS_CS2_BASE 0x20000000
	286	#define CONFIG_SYS_CS2_MASK 0x00ff0001
	287	#define CONFIG_SYS_CS2_CTRL 0x0000fec0
	288
	289	#define CONFIG_SYS_CS3_BASE 0x21000000
	290	#define CONFIG_SYS_CS3_MASK 0x00ff0001
	291	#define CONFIG_SYS_CS3_CTRL 0x0000fec0
	292
	293	#define CONFIG_SYS_FLASH_BASE 0x00000000
	294
	295	#ifdef CONFIG_MONITOR_IS_IN_RAM
14d0a02a	296	#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
9d79e575 WW	297	#else
	298	/* This is mainly used during relocation in start.S */
	299	#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
	300	#endif
	301	/* Reserve 256 kB for Monitor */
	302	#define CONFIG_SYS_MONITOR_LEN (256 << 10)
	303
	304	#define CONFIG_SYS_BOOTPARAMS_LEN (64 * 1024)
	305	/* Reserve 128 kB for malloc() */
	306	#define CONFIG_SYS_MALLOC_LEN (128 << 10)
	307
	308	/*
	309	* For booting Linux, the board info and command line data
	310	* have to be in the first 8 MB of memory, since this is
	311	* the maximum mapped by the Linux kernel during initialization ??
	312	*/
	313	#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + \
	314	(CONFIG_SYS_SDRAM_SIZE << 20))
	315
	316	/* FLASH organization */
	317	#define CONFIG_SYS_MAX_FLASH_BANKS 1
	318	#define CONFIG_SYS_MAX_FLASH_SECT 259
	319	#define CONFIG_SYS_FLASH_ERASE_TOUT 1000
	320
	321	#define CONFIG_SYS_FLASH_CFI 1
	322	#define CONFIG_FLASH_CFI_DRIVER 1
	323	#define CONFIG_SYS_FLASH_SIZE 0x2000000
	324	#define CONFIG_SYS_FLASH_PROTECTION 1
	325	#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
	326	#define CONFIG_SYS_FLASH_CFI_NONBLOCK 1
	327
5296cb1d	328	#define LDS_BOARD_TEXT \
	329	. = DEFINED(env_offset) ? env_offset : .; \
	330	common/env_embedded.o (.text*)
	331
9d79e575 WW	332	#if ENABLE_JFFS
	333	/* JFFS Partition offset set */
	334	#define CONFIG_SYS_JFFS2_FIRST_BANK 0
	335	#define CONFIG_SYS_JFFS2_NUM_BANKS 1
	336	/* 512k reserved for u-boot */
	337	#define CONFIG_SYS_JFFS2_FIRST_SECTOR 0x40
	338	#endif
	339
	340	/* Cache Configuration */
	341	#define CONFIG_SYS_CACHELINE_SIZE 16
	342
dd9f054e	343	#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
553f0982	344	CONFIG_SYS_INIT_RAM_SIZE - 8)
dd9f054e	345	#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
553f0982	346	CONFIG_SYS_INIT_RAM_SIZE - 4)
dd9f054e TL	347	#define CONFIG_SYS_ICACHE_INV (CF_CACR_CINVA)
	348	#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE \| \
	349	CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) \| \
	350	CF_ACR_EN \| CF_ACR_SM_ALL)
	351	#define CONFIG_SYS_CACHE_ICACR (CF_CACR_EC \| CF_CACR_CINVA \| \
	352	CF_CACR_DCM_P)
	353
9d79e575	354	#endif /* _CONFIG_ASTRO_MCF5373L_H */