[people/ms/u-boot.git] / include / configs / at91rm9200ek.h

/*
 * Ulf Samuelsson <ulf@atmel.com>
 * Rick Bronson <rick@efn.org>
 *
 * Configuration settings for the AT91RM9200EK board.
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/* ARM asynchronous clock */
/*
 * from 18.432 MHz crystal
 * (18432000 / 4 * 39)
 */
#define AT91C_MAIN_CLOCK	179712000
/*
 * peripheral clock
 * (AT91C_MASTER_CLOCK / 3)
 */
#define AT91C_MASTER_CLOCK	59904000

#define AT91_SLOW_CLOCK		32768	/* slow clock */

#define CONFIG_ARM920T		1	/* This is an ARM920T Core	*/
#define CONFIG_AT91RM9200	1	/* It's an Atmel AT91RM9200 SoC	*/
#define CONFIG_AT91RM9200EK	1	/* on an AT91RM9200EK Board	*/
#undef  CONFIG_USE_IRQ			/* we don't need IRQ/FIQ stuff	*/
#define USE_920T_MMU		1

#define CONFIG_CMDLINE_TAG	1	/* enable passing of ATAGs	*/
#define CONFIG_SETUP_MEMORY_TAGS 1
#define CONFIG_INITRD_TAG	1

/*
 * LowLevel Init
 */
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SYS_USE_MAIN_OSCILLATOR		1
/* flash */
#define CONFIG_SYS_EBI_CFGR_VAL	0x00000000
#define CONFIG_SYS_SMC_CSR0_VAL	0x00003284 /* 16bit, 2 TDF, 4 WS */

/* clocks */
#define CONFIG_SYS_PLLAR_VAL	0x20263E04 /* 179.712000 MHz for PCK */
#define CONFIG_SYS_PLLBR_VAL	0x10483E0E /* 48.054857 MHz (divider by 2 for USB) */
/* PCK/3 = MCK Master Clock = 59.904000MHz from PLLA */
#define CONFIG_SYS_MCKR_VAL	0x00000202

/* sdram */
#define CONFIG_SYS_PIOC_ASR_VAL	0xFFFF0000 /* Configure PIOC as peripheral (D16/D31) */
#define CONFIG_SYS_PIOC_BSR_VAL	0x00000000
#define CONFIG_SYS_PIOC_PDR_VAL	0xFFFF0000
#define CONFIG_SYS_EBI_CSA_VAL	0x00000002 /* CS1=CONFIG_SYS_SDRAM */
#define CONFIG_SYS_SDRC_CR_VAL	0x2188c155 /* set up the CONFIG_SYS_SDRAM */
#define CONFIG_SYS_SDRAM	0x20000000 /* address of the CONFIG_SYS_SDRAM */
#define CONFIG_SYS_SDRAM1	0x20000080 /* address of the CONFIG_SYS_SDRAM */
#define CONFIG_SYS_SDRAM_VAL	0x00000000 /* value written to CONFIG_SYS_SDRAM */
#define CONFIG_SYS_SDRC_MR_VAL	0x00000002 /* Precharge All */
#define CONFIG_SYS_SDRC_MR_VAL1	0x00000004 /* refresh */
#define CONFIG_SYS_SDRC_MR_VAL2	0x00000003 /* Load Mode Register */
#define CONFIG_SYS_SDRC_MR_VAL3	0x00000000 /* Normal Mode */
#define CONFIG_SYS_SDRC_TR_VAL	0x000002E0 /* Write refresh rate */
#else
#define CONFIG_SKIP_RELOCATE_UBOOT
#endif	/* CONFIG_SKIP_LOWLEVEL_INIT */

/* hardcode so no __divsi3 : AT91C_MASTER_CLOCK / baudrate / 16 */
#define CONFIG_SYS_AT91C_BRGR_DIVISOR	33

/*
 * Memory Configuration
 */
#define CONFIG_NR_DRAM_BANKS		1
#define PHYS_SDRAM			0x20000000
#define PHYS_SDRAM_SIZE			0x02000000	/* 32 megs */

#define CONFIG_SYS_MEMTEST_START	PHYS_SDRAM
#define CONFIG_SYS_MEMTEST_END		\
		(CONFIG_SYS_MEMTEST_START + PHYS_SDRAM_SIZE - 262144)

/*
 * Hardware drivers
 */

/*
 * UART Configuration
 *
 * define one of these to choose the DBGU,
 * USART0 or USART1 as console
 */
#define CONFIG_AT91RM9200_USART
#define CONFIG_DBGU
#undef CONFIG_USART0
#undef CONFIG_USART1
/* don't include RTS/CTS flow control support	*/
#undef	CONFIG_HWFLOW
/* disable modem initialization stuff */
#undef	CONFIG_MODEM_SUPPORT

#define CONFIG_SYS_BAUDRATE_TABLE	{115200 , 19200, 38400, 57600, 9600 }
#define CONFIG_BAUDRATE			115200

/*
 * Command line configuration.
 */
#include <config_cmd_default.h>

#define CONFIG_CMD_DHCP
#define CONFIG_CMD_FAT
#define CONFIG_CMD_MII
#define CONFIG_CMD_PING

#undef CONFIG_CMD_BDI
#undef CONFIG_CMD_IMI
#undef CONFIG_CMD_FPGA
#undef CONFIG_CMD_MISC
#undef CONFIG_CMD_LOADS

#include <asm/arch/AT91RM9200.h>	/* needed for port definitions */
/* Options for MMC/SD Card */
#define CONFIG_DOS_PARTITION	1
#undef CONFIG_MMC
#define CONFIG_SYS_MMC_BASE		0xFFFB4000
#define CONFIG_SYS_MMC_BLOCKSIZE	512

/*
 * Network Driver Setting
 */
#define CONFIG_NET_MULTI		1
#ifdef CONFIG_NET_MULTI
#define CONFIG_DRIVER_AT91EMAC		1
#define CONFIG_SYS_RX_ETH_BUFFER	8
#else
#define CONFIG_DRIVER_ETHER		1
#endif
#define CONFIG_NET_RETRY_COUNT		20
#define CONFIG_AT91C_USE_RMII

/*
 * AC Characteristics
 * DLYBS = tCSS = 250ns min and DLYBCT = tCSH = 250ns
 */
#define DATAFLASH_TCSS	(0xC << 16)
#define DATAFLASH_TCHS	(0x1 << 24)

#if defined(CONFIG_HAS_DATAFLASH)
#define CONFIG_SYS_SPI_WRITE_TOUT		(5 * CONFIG_SYS_HZ)
#define CONFIG_SYS_MAX_DATAFLASH_BANKS		2
#define CONFIG_SYS_MAX_DATAFLASH_PAGES		16384
/* Logical adress for CS0 */
#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0	0xC0000000
/* Logical adress for CS3 */
#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3	0xD0000000
#define	CONFIG_SYS_SUPPORT_BLOCK_ERASE		1
#define	CONFIG_SYS_DATAFLASH_MMC_PIO		AT91C_PIO_PB22
#endif

/*
 * NOR Flash
 */
#define CONFIG_SYS_FLASH_BASE			0x10000000
#define PHYS_FLASH_SIZE				0x800000	/* 8MB */
#define CONFIG_SYS_FLASH_CFI			1
#define CONFIG_FLASH_CFI_DRIVER			1
#define CONFIG_SYS_MAX_FLASH_BANKS		1
#define CONFIG_SYS_MAX_FLASH_SECT		256
#define CONFIG_SYS_FLASH_PROTECTION

/*
 * Environment Settings
 */
#ifdef CONFIG_ENV_IS_IN_DATAFLASH
/*
 * Datasflash Environment Settings
 */
#define CONFIG_ENV_OFFSET			0x4200
#define CONFIG_ENV_ADDR			\
		(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
/* 8 * 1056 really , but start.s is not OK with this*/
#define CONFIG_ENV_SIZE			0x2000

#else
/*
 * NOR Flash Environment Settings
 */
#define CONFIG_ENV_IS_IN_FLASH		1

#ifdef CONFIG_SKIP_LOWLEVEL_INIT
/*
 * between boot.bin and u-boot.bin.gz
 */
#define CONFIG_ENV_ADDR			(CONFIG_SYS_FLASH_BASE + 0xe000)
#define CONFIG_ENV_SIZE			0x10000 /* sectors are 64K here */
#else
/*
 * after u-boot.bin
 */
#define CONFIG_ENV_ADDR			\
		(CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
#define CONFIG_ENV_SIZE			0x10000 /* sectors are 64K here */
/* The following #defines are needed to get flash environment right */
#define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_MONITOR_LEN		\
		(CONFIG_SYS_BOOT_SIZE + CONFIG_SYS_U_BOOT_SIZE)
#endif	/* CONFIG_SKIP_LOWLEVEL_INIT */

#endif	/* CONFIG_ENV_IS_IN_DATAFLASH */

/*
 * Boot option
 */
#define CONFIG_BOOTDELAY		3

#ifdef CONFIG_SKIP_LOWLEVEL_INIT
/* boot.bin, env, u-boot.bin.gz */
#define CONFIG_SYS_BOOT_SIZE		0x6000 /* 24 KBytes */
#define CONFIG_SYS_U_BOOT_BASE		(CONFIG_SYS_FLASH_BASE + 0x10000)
#define CONFIG_SYS_U_BOOT_SIZE		0x10000 /* 64 KBytes */
#else
/* u-boot.bin */
#define CONFIG_SYS_BOOT_SIZE		0x0 /* 0 KBytes */
#define CONFIG_SYS_U_BOOT_BASE		CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_U_BOOT_SIZE		0x40000 /* 128 KBytes */
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */

#define CONFIG_SYS_LOAD_ADDR		0x21000000 /* default load address */
#define CONFIG_ENV_OVERWRITE	1

/*
 * USB Config
 */
#define CONFIG_CMD_USB
#define CONFIG_USB_OHCI_NEW	1
#define CONFIG_USB_KEYBOARD	1
#define CONFIG_USB_STORAGE	1
#define CONFIG_DOS_PARTITION	1

#undef CONFIG_SYS_USB_OHCI_BOARD_INIT
#define CONFIG_SYS_USB_OHCI_CPU_INIT		1
#define CONFIG_SYS_USB_OHCI_REGS_BASE		AT91_USB_HOST_BASE
#define CONFIG_SYS_USB_OHCI_SLOT_NAME		"at91rm9200"
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	15

/*
 * I2C
 */
#define CONFIG_HARD_I2C

#ifdef CONFIG_HARD_I2C
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C_SPEED		0	/* not used */
#define CONFIG_SYS_I2C_SLAVE		0	/* not used */
#endif

/*
 * Shell Settings
 */
#define CONFIG_CMDLINE_EDITING		1
#define CONFIG_SYS_LONGHELP		1
#define CONFIG_AUTO_COMPLETE		1
#define CONFIG_SYS_HUSH_PARSER		1
#define CONFIG_SYS_PROMPT		"U-Boot> "
#define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
#define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size */
#define CONFIG_SYS_MAXARGS		16	/* max number of command args */
/* Print Buffer Size */
#define CONFIG_SYS_PBSIZE		\
		(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)

#ifndef __ASSEMBLY__
/*-----------------------------------------------------------------------
 * Board specific extension for bd_info
 *
 * This structure is embedded in the global bd_info (bd_t) structure
 * and can be used by the board specific code (eg board/...)
 */

struct bd_info_ext {
	/* helper variable for board environment handling
	 *
	 * env_crc_valid == 0	=>	uninitialised
	 * env_crc_valid > 0	=>	environment crc in flash is valid
	 * env_crc_valid < 0	=>	environment crc in flash is invalid
	 */
	int env_crc_valid;
};
#endif

#define CONFIG_SYS_HZ 1000
/*
 * AT91C_TC0_CMR is implicitly set to
 * AT91C_TC_TIMER_DIV1_CLOCK
 */
#define CONFIG_SYS_HZ_CLOCK (AT91C_MASTER_CLOCK / 2)

/*
 * Size of malloc() pool
 */
#define CONFIG_SYS_MALLOC_LEN		ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024 \
					     , 0x1000)
/* size in bytes reserved for initial data */
#define CONFIG_SYS_GBL_DATA_SIZE	128

#define CONFIG_STACKSIZE		(32 * 1024)	/* regular stack */
#define CONFIG_STACKSIZE_IRQ		(4 * 1024) /* Unsure if to big or to small*/
#define CONFIG_STACKSIZE_FIQ		(4 * 1024) /* Unsure if to big or to small*/
#endif
Commit	Line	Data
cb82a532 US	1	/*
	2	* Ulf Samuelsson <ulf@atmel.com>
	3	* Rick Bronson <rick@efn.org>
	4	*
	5	* Configuration settings for the AT91RM9200EK board.
	6	*
	7	* See file CREDITS for list of people who contributed to this
	8	* project.
	9	*
	10	* This program is free software; you can redistribute it and/or
	11	* modify it under the terms of the GNU General Public License as
	12	* published by the Free Software Foundation; either version 2 of
	13	* the License, or (at your option) any later version.
	14	*
	15	* This program is distributed in the hope that it will be useful,
	16	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	17	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	18	* GNU General Public License for more details.
	19	*
	20	* You should have received a copy of the GNU General Public License
	21	* along with this program; if not, write to the Free Software
	22	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	23	* MA 02111-1307 USA
	24	*/
	25
	26	#ifndef __CONFIG_H
	27	#define __CONFIG_H
	28
	29	/* ARM asynchronous clock */
	30	/*
	31	* from 18.432 MHz crystal
	32	* (18432000 / 4 * 39)
	33	*/
	34	#define AT91C_MAIN_CLOCK 179712000
	35	/*
	36	* peripheral clock
	37	* (AT91C_MASTER_CLOCK / 3)
	38	*/
	39	#define AT91C_MASTER_CLOCK 59904000
	40
	41	#define AT91_SLOW_CLOCK 32768 /* slow clock */
	42
	43	#define CONFIG_ARM920T 1 /* This is an ARM920T Core */
	44	#define CONFIG_AT91RM9200 1 /* It's an Atmel AT91RM9200 SoC */
	45	#define CONFIG_AT91RM9200EK 1 /* on an AT91RM9200EK Board */
	46	#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
	47	#define USE_920T_MMU 1
	48
	49	#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
	50	#define CONFIG_SETUP_MEMORY_TAGS 1
	51	#define CONFIG_INITRD_TAG 1
	52
	53	/*
	54	* LowLevel Init
	55	*/
	56	#ifndef CONFIG_SKIP_LOWLEVEL_INIT
	57	#define CONFIG_SYS_USE_MAIN_OSCILLATOR 1
	58	/* flash */
cb82a532 US	59	#define CONFIG_SYS_EBI_CFGR_VAL 0x00000000
	60	#define CONFIG_SYS_SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */
	61
	62	/* clocks */
	63	#define CONFIG_SYS_PLLAR_VAL 0x20263E04 /* 179.712000 MHz for PCK */
	64	#define CONFIG_SYS_PLLBR_VAL 0x10483E0E /* 48.054857 MHz (divider by 2 for USB) */
	65	/* PCK/3 = MCK Master Clock = 59.904000MHz from PLLA */
	66	#define CONFIG_SYS_MCKR_VAL 0x00000202
	67
	68	/* sdram */
	69	#define CONFIG_SYS_PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as peripheral (D16/D31) */
	70	#define CONFIG_SYS_PIOC_BSR_VAL 0x00000000
	71	#define CONFIG_SYS_PIOC_PDR_VAL 0xFFFF0000
	72	#define CONFIG_SYS_EBI_CSA_VAL 0x00000002 /* CS1=CONFIG_SYS_SDRAM */
	73	#define CONFIG_SYS_SDRC_CR_VAL 0x2188c155 /* set up the CONFIG_SYS_SDRAM */
	74	#define CONFIG_SYS_SDRAM 0x20000000 /* address of the CONFIG_SYS_SDRAM */
	75	#define CONFIG_SYS_SDRAM1 0x20000080 /* address of the CONFIG_SYS_SDRAM */
	76	#define CONFIG_SYS_SDRAM_VAL 0x00000000 /* value written to CONFIG_SYS_SDRAM */
	77	#define CONFIG_SYS_SDRC_MR_VAL 0x00000002 /* Precharge All */
	78	#define CONFIG_SYS_SDRC_MR_VAL1 0x00000004 /* refresh */
	79	#define CONFIG_SYS_SDRC_MR_VAL2 0x00000003 /* Load Mode Register */
	80	#define CONFIG_SYS_SDRC_MR_VAL3 0x00000000 /* Normal Mode */
	81	#define CONFIG_SYS_SDRC_TR_VAL 0x000002E0 /* Write refresh rate */
	82	#else
	83	#define CONFIG_SKIP_RELOCATE_UBOOT
	84	#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
	85
	86	/* hardcode so no __divsi3 : AT91C_MASTER_CLOCK / baudrate / 16 */
	87	#define CONFIG_SYS_AT91C_BRGR_DIVISOR 33
	88
	89	/*
	90	* Memory Configuration
	91	*/
	92	#define CONFIG_NR_DRAM_BANKS 1
	93	#define PHYS_SDRAM 0x20000000
	94	#define PHYS_SDRAM_SIZE 0x02000000 /* 32 megs */
	95
	96	#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
	97	#define CONFIG_SYS_MEMTEST_END \
	98	(CONFIG_SYS_MEMTEST_START + PHYS_SDRAM_SIZE - 262144)
	99
	100	/*
	101	* Hardware drivers
	102	*/
	103
	104	/*
	105	* UART Configuration
	106	*
	107	* define one of these to choose the DBGU,
	108	* USART0 or USART1 as console
	109	*/
beebd851	110	#define CONFIG_AT91RM9200_USART
cb82a532 US	111	#define CONFIG_DBGU
	112	#undef CONFIG_USART0
	113	#undef CONFIG_USART1
	114	/* don't include RTS/CTS flow control support */
	115	#undef CONFIG_HWFLOW
	116	/* disable modem initialization stuff */
	117	#undef CONFIG_MODEM_SUPPORT
	118
	119	#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
	120	#define CONFIG_BAUDRATE 115200
	121
	122	/*
	123	* Command line configuration.
	124	*/
	125	#include <config_cmd_default.h>
	126
	127	#define CONFIG_CMD_DHCP
	128	#define CONFIG_CMD_FAT
	129	#define CONFIG_CMD_MII
	130	#define CONFIG_CMD_PING
	131
	132	#undef CONFIG_CMD_BDI
	133	#undef CONFIG_CMD_IMI
	134	#undef CONFIG_CMD_FPGA
	135	#undef CONFIG_CMD_MISC
	136	#undef CONFIG_CMD_LOADS
	137
	138	#include <asm/arch/AT91RM9200.h> /* needed for port definitions */
	139	/* Options for MMC/SD Card */
	140	#define CONFIG_DOS_PARTITION 1
	141	#undef CONFIG_MMC
	142	#define CONFIG_SYS_MMC_BASE 0xFFFB4000
	143	#define CONFIG_SYS_MMC_BLOCKSIZE 512
	144
	145	/*
	146	* Network Driver Setting
	147	*/
c041e9d2 JS	148	#define CONFIG_NET_MULTI 1
	149	#ifdef CONFIG_NET_MULTI
	150	#define CONFIG_DRIVER_AT91EMAC 1
	151	#define CONFIG_SYS_RX_ETH_BUFFER 8
	152	#else
	153	#define CONFIG_DRIVER_ETHER 1
	154	#endif
cb82a532 US	155	#define CONFIG_NET_RETRY_COUNT 20
	156	#define CONFIG_AT91C_USE_RMII
	157
	158	/*
	159	* AC Characteristics
	160	* DLYBS = tCSS = 250ns min and DLYBCT = tCSH = 250ns
	161	*/
	162	#define DATAFLASH_TCSS (0xC << 16)
	163	#define DATAFLASH_TCHS (0x1 << 24)
	164
	165	#if defined(CONFIG_HAS_DATAFLASH)
	166	#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
	167	#define CONFIG_SYS_MAX_DATAFLASH_BANKS 2
	168	#define CONFIG_SYS_MAX_DATAFLASH_PAGES 16384
	169	/* Logical adress for CS0 */
	170	#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000
	171	/* Logical adress for CS3 */
	172	#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000
	173	#define CONFIG_SYS_SUPPORT_BLOCK_ERASE 1
	174	#define CONFIG_SYS_DATAFLASH_MMC_PIO AT91C_PIO_PB22
	175	#endif
	176
	177	/*
	178	* NOR Flash
	179	*/
	180	#define CONFIG_SYS_FLASH_BASE 0x10000000
	181	#define PHYS_FLASH_SIZE 0x800000 /* 8MB */
	182	#define CONFIG_SYS_FLASH_CFI 1
	183	#define CONFIG_FLASH_CFI_DRIVER 1
	184	#define CONFIG_SYS_MAX_FLASH_BANKS 1
	185	#define CONFIG_SYS_MAX_FLASH_SECT 256
	186	#define CONFIG_SYS_FLASH_PROTECTION
	187
	188	/*
	189	* Environment Settings
	190	*/
	191	#ifdef CONFIG_ENV_IS_IN_DATAFLASH
	192	/*
	193	* Datasflash Environment Settings
	194	*/
	195	#define CONFIG_ENV_OFFSET 0x4200
	196	#define CONFIG_ENV_ADDR \
	197	(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
	198	/* 8 * 1056 really , but start.s is not OK with this*/
	199	#define CONFIG_ENV_SIZE 0x2000
	200
	201	#else
	202	/*
	203	* NOR Flash Environment Settings
	204	*/
	205	#define CONFIG_ENV_IS_IN_FLASH 1
	206
	207	#ifdef CONFIG_SKIP_LOWLEVEL_INIT
	208	/*
	209	* between boot.bin and u-boot.bin.gz
	210	*/
	211	#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0xe000)
	212	#define CONFIG_ENV_SIZE 0x10000 /* sectors are 64K here */
	213	#else
	214	/*
	215	* after u-boot.bin
	216	*/
	217	#define CONFIG_ENV_ADDR \
	218	(CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
219	#define CONFIG_ENV_SIZE 0x10000 /* sectors are 64K here */
220	/* The following #defines are needed to get flash environment right */
221	#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
222	#define CONFIG_SYS_MONITOR_LEN \
223	(CONFIG_SYS_BOOT_SIZE + CONFIG_SYS_U_BOOT_SIZE)
224	#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
225
226	#endif /* CONFIG_ENV_IS_IN_DATAFLASH */
227
228	/*
229	* Boot option
230	*/
231	#define CONFIG_BOOTDELAY 3
232
233	#ifdef CONFIG_SKIP_LOWLEVEL_INIT
234	/* boot.bin, env, u-boot.bin.gz */
235	#define CONFIG_SYS_BOOT_SIZE 0x6000 /* 24 KBytes */
236	#define CONFIG_SYS_U_BOOT_BASE (CONFIG_SYS_FLASH_BASE + 0x10000)
237	#define CONFIG_SYS_U_BOOT_SIZE 0x10000 /* 64 KBytes */
238	#else
239	/* u-boot.bin */
240	#define CONFIG_SYS_BOOT_SIZE 0x0 /* 0 KBytes */
241	#define CONFIG_SYS_U_BOOT_BASE CONFIG_SYS_FLASH_BASE
242	#define CONFIG_SYS_U_BOOT_SIZE 0x40000 /* 128 KBytes */
243	#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
244
245	#define CONFIG_SYS_LOAD_ADDR 0x21000000 /* default load address */
246	#define CONFIG_ENV_OVERWRITE 1
247
248	/*
249	* USB Config
250	*/
251	#define CONFIG_CMD_USB
252	#define CONFIG_USB_OHCI_NEW 1
253	#define CONFIG_USB_KEYBOARD 1
254	#define CONFIG_USB_STORAGE 1
255	#define CONFIG_DOS_PARTITION 1
256
257	#undef CONFIG_SYS_USB_OHCI_BOARD_INIT
258	#define CONFIG_SYS_USB_OHCI_CPU_INIT 1
259	#define CONFIG_SYS_USB_OHCI_REGS_BASE AT91_USB_HOST_BASE
260	#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91rm9200"
261	#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15
262
263	/*
264	* I2C
265	*/
266	#define CONFIG_HARD_I2C
267
268	#ifdef CONFIG_HARD_I2C
269	#define CONFIG_CMD_I2C
cb82a532 US	270	#define CONFIG_SYS_I2C_SPEED 0 /* not used */
	271	#define CONFIG_SYS_I2C_SLAVE 0 /* not used */
	272	#endif
	273
	274	/*
	275	* Shell Settings
	276	*/
	277	#define CONFIG_CMDLINE_EDITING 1
	278	#define CONFIG_SYS_LONGHELP 1
	279	#define CONFIG_AUTO_COMPLETE 1
	280	#define CONFIG_SYS_HUSH_PARSER 1
	281	#define CONFIG_SYS_PROMPT "U-Boot> "
	282	#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
	283	#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
	284	#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
	285	/* Print Buffer Size */
	286	#define CONFIG_SYS_PBSIZE \
	287	(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
	288
	289	#ifndef __ASSEMBLY__
	290	/*-----------------------------------------------------------------------
	291	* Board specific extension for bd_info
	292	*
	293	* This structure is embedded in the global bd_info (bd_t) structure
	294	* and can be used by the board specific code (eg board/...)
	295	*/
	296
	297	struct bd_info_ext {
	298	/* helper variable for board environment handling
	299	*
	300	* env_crc_valid == 0 => uninitialised
	301	* env_crc_valid > 0 => environment crc in flash is valid
	302	* env_crc_valid < 0 => environment crc in flash is invalid
	303	*/
	304	int env_crc_valid;
	305	};
	306	#endif
	307
	308	#define CONFIG_SYS_HZ 1000
	309	/*
	310	* AT91C_TC0_CMR is implicitly set to
	311	* AT91C_TC_TIMER_DIV1_CLOCK
	312	*/
	313	#define CONFIG_SYS_HZ_CLOCK (AT91C_MASTER_CLOCK / 2)
	314
cb82a532 US	315	/*
	316	* Size of malloc() pool
	317	*/
	318	#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024 \
	319	, 0x1000)
	320	/* size in bytes reserved for initial data */
	321	#define CONFIG_SYS_GBL_DATA_SIZE 128
	322
	323	#define CONFIG_STACKSIZE (32 * 1024) /* regular stack */
	324	#define CONFIG_STACKSIZE_IRQ (4 * 1024) /* Unsure if to big or to small*/
	325	#define CONFIG_STACKSIZE_FIQ (4 * 1024) /* Unsure if to big or to small*/
	326	#endif