[people/ms/u-boot.git] / include / configs / at91sam9n12ek.h

/*
 * (C) Copyright 2013 Atmel Corporation.
 * Josh Wu <josh.wu@atmel.com>
 *
 * Configuation settings for the AT91SAM9N12-EK boards.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __AT91SAM9N12_CONFIG_H_
#define __AT91SAM9N12_CONFIG_H_

/* ARM asynchronous clock */
#define CONFIG_SYS_AT91_SLOW_CLOCK	32768		/* slow clock xtal */
#define CONFIG_SYS_AT91_MAIN_CLOCK	16000000	/* main clock xtal */

/* Misc CPU related */
#define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_SKIP_LOWLEVEL_INIT

/* LCD */
#define LCD_BPP				LCD_COLOR16
#define LCD_OUTPUT_BPP			24
#define CONFIG_LCD_LOGO
#define CONFIG_LCD_INFO
#define CONFIG_LCD_INFO_BELOW_LOGO
#define CONFIG_ATMEL_HLCD
#define CONFIG_ATMEL_LCD_RGB565

/*
 * BOOTP options
 */
#define CONFIG_BOOTP_BOOTFILESIZE

#define CONFIG_NR_DRAM_BANKS		1
#define CONFIG_SYS_SDRAM_BASE		0x20000000
#define CONFIG_SYS_SDRAM_SIZE		0x08000000

/*
 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
 * leaving the correct space for initial global data structure above
 * that address while providing maximum stack area below.
 */
# define CONFIG_SYS_INIT_SP_ADDR \
	(0x00300000 + 16 * 1024 - GENERATED_GBL_DATA_SIZE)

/* DataFlash */
#ifdef CONFIG_CMD_SF
#define CONFIG_SF_DEFAULT_SPEED		30000000
#endif

/* NAND flash */
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_MAX_NAND_DEVICE	1
#define CONFIG_SYS_NAND_BASE		0x40000000
#define CONFIG_SYS_NAND_MASK_ALE	(1 << 21)
#define CONFIG_SYS_NAND_MASK_CLE	(1 << 22)
#define CONFIG_SYS_NAND_ENABLE_PIN	GPIO_PIN_PD(4)
#define CONFIG_SYS_NAND_READY_PIN	GPIO_PIN_PD(5)
#endif

/* PMECC & PMERRLOC */
#define CONFIG_ATMEL_NAND_HWECC
#define CONFIG_ATMEL_NAND_HW_PMECC
#define CONFIG_PMECC_CAP		2
#define CONFIG_PMECC_SECTOR_SIZE	512

#define CONFIG_MTD_PARTITIONS
#define CONFIG_MTD_DEVICE

#define CONFIG_EXTRA_ENV_SETTINGS                                       \
	"console=console=ttyS0,115200\0"                                \
	"mtdparts="CONFIG_MTDPARTS_DEFAULT"\0"					\
	"bootargs_nand=rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw\0"\
	"bootargs_mmc=root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait\0"

/* Ethernet */
#define CONFIG_KS8851_MLL
#define CONFIG_KS8851_MLL_BASEADDR	0x30000000 /* use NCS2 */

#define CONFIG_SYS_LOAD_ADDR		0x22000000 /* load address */

#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_MEMTEST_END		0x26e00000

/* USB host */
#ifdef CONFIG_CMD_USB
#define CONFIG_USB_ATMEL
#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
#define CONFIG_USB_OHCI_NEW
#define CONFIG_SYS_USB_OHCI_CPU_INIT
#define CONFIG_SYS_USB_OHCI_REGS_BASE	ATMEL_BASE_OHCI
#define CONFIG_SYS_USB_OHCI_SLOT_NAME	"at91sam9n12"
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	1
#endif

#ifdef CONFIG_SPI_BOOT

/* bootstrap + u-boot + env + linux in dataflash on CS0 */
#define CONFIG_ENV_OFFSET		0x5000
#define CONFIG_ENV_SIZE			0x3000
#define CONFIG_ENV_SECT_SIZE		0x1000
#define CONFIG_BOOTCOMMAND						\
	"setenv bootargs ${console} ${mtdparts} ${bootargs_nand};"	\
	"sf probe 0; sf read 0x22000000 0x100000 0x300000; "		\
	"bootm 0x22000000"

#elif defined(CONFIG_NAND_BOOT)

/* bootstrap + u-boot + env + linux in nandflash */
#define CONFIG_ENV_OFFSET		0x120000
#define CONFIG_ENV_OFFSET_REDUND	0x100000
#define CONFIG_ENV_SIZE			0x20000		/* 1 sector = 128 kB */
#define CONFIG_BOOTCOMMAND						\
	"setenv bootargs ${console} ${mtdparts} ${bootargs_nand};"	\
	"nand read 0x21000000 0x180000 0x080000;"			\
	"nand read 0x22000000 0x200000 0x400000;"			\
	"bootm 0x22000000 - 0x21000000"

#else /* CONFIG_SD_BOOT */

/* bootstrap + u-boot + env + linux in mmc */

#ifdef CONFIG_ENV_IS_IN_MMC
/* Use raw reserved sectors to save environment */
#define CONFIG_ENV_OFFSET		0x2000
#define CONFIG_ENV_SIZE			0x1000
#define CONFIG_SYS_MMC_ENV_DEV		0
#else
/* Use file in FAT file to save environment */
#define CONFIG_ENV_SIZE			0x4000
#endif

#define CONFIG_BOOTCOMMAND						\
	"setenv bootargs ${console} ${mtdparts} ${bootargs_mmc};"	\
	"fatload mmc 0:1 0x21000000 dtb;"				\
	"fatload mmc 0:1 0x22000000 uImage;"				\
	"bootm 0x22000000 - 0x21000000"

#endif

/*
 * Size of malloc() pool
 */
#define CONFIG_SYS_MALLOC_LEN	(4 * 1024 * 1024)

/* SPL */
#define CONFIG_SPL_TEXT_BASE		0x300000
#define CONFIG_SPL_MAX_SIZE		0x6000
#define CONFIG_SPL_STACK		0x308000

#define CONFIG_SPL_BSS_START_ADDR	0x20000000
#define CONFIG_SPL_BSS_MAX_SIZE		0x80000
#define CONFIG_SYS_SPL_MALLOC_START	0x20080000
#define CONFIG_SYS_SPL_MALLOC_SIZE	0x80000

#define CONFIG_SYS_MONITOR_LEN		(512 << 10)

#define CONFIG_SYS_MASTER_CLOCK		132096000
#define CONFIG_SYS_AT91_PLLA		0x20953f03
#define CONFIG_SYS_MCKR			0x1301
#define CONFIG_SYS_MCKR_CSS		0x1302

#ifdef CONFIG_SD_BOOT
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME		"u-boot.img"

#elif CONFIG_SYS_USE_NANDFLASH
#elif CONFIG_SPI_BOOT
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SYS_SPI_U_BOOT_OFFS	0x8400

#elif CONFIG_NAND_BOOT
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_BASE
#endif
#define CONFIG_SYS_NAND_U_BOOT_OFFS	0x40000
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_SIZE	0x800
#define CONFIG_SYS_NAND_PAGE_COUNT	64
#define CONFIG_SYS_NAND_OOBSIZE		64
#define CONFIG_SYS_NAND_BLOCK_SIZE	0x20000
#define CONFIG_SYS_NAND_BAD_BLOCK_POS	0x0
#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER

#endif
Commit	Line	Data
9e336903 WJ	1	/*
	2	* (C) Copyright 2013 Atmel Corporation.
	3	* Josh Wu <josh.wu@atmel.com>
	4	*
	5	* Configuation settings for the AT91SAM9N12-EK boards.
	6	*
1a459660	7	* SPDX-License-Identifier: GPL-2.0+
9e336903 WJ	8	*/
	9
	10	#ifndef __AT91SAM9N12_CONFIG_H_
	11	#define __AT91SAM9N12_CONFIG_H_
	12
9e336903 WJ	13	/* ARM asynchronous clock */
	14	#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
	15	#define CONFIG_SYS_AT91_MAIN_CLOCK 16000000 /* main clock xtal */
9e336903 WJ	16
	17	/* Misc CPU related */
	18	#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
	19	#define CONFIG_SETUP_MEMORY_TAGS
	20	#define CONFIG_INITRD_TAG
	21	#define CONFIG_SKIP_LOWLEVEL_INIT
9e336903	22
9e336903	23	/* LCD */
9e336903 WJ	24	#define LCD_BPP LCD_COLOR16
	25	#define LCD_OUTPUT_BPP 24
	26	#define CONFIG_LCD_LOGO
	27	#define CONFIG_LCD_INFO
	28	#define CONFIG_LCD_INFO_BELOW_LOGO
9e336903 WJ	29	#define CONFIG_ATMEL_HLCD
9e336903 WJ	30	#define CONFIG_ATMEL_LCD_RGB565
9e336903	31
9e336903 WJ	32	/*
	33	* BOOTP options
	34	*/
	35	#define CONFIG_BOOTP_BOOTFILESIZE
9e336903	36
9e336903 WJ	37	#define CONFIG_NR_DRAM_BANKS 1
	38	#define CONFIG_SYS_SDRAM_BASE 0x20000000
	39	#define CONFIG_SYS_SDRAM_SIZE 0x08000000
	40
	41	/*
	42	* Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
	43	* leaving the correct space for initial global data structure above
	44	* that address while providing maximum stack area below.
	45	*/
	46	# define CONFIG_SYS_INIT_SP_ADDR \
e61ed48f	47	(0x00300000 + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
9e336903 WJ	48
	49	/* DataFlash */
	50	#ifdef CONFIG_CMD_SF
9e336903	51	#define CONFIG_SF_DEFAULT_SPEED 30000000
9e336903 WJ	52	#endif
	53
	54	/* NAND flash */
	55	#ifdef CONFIG_CMD_NAND
	56	#define CONFIG_NAND_ATMEL
	57	#define CONFIG_SYS_MAX_NAND_DEVICE 1
	58	#define CONFIG_SYS_NAND_BASE 0x40000000
	59	#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
	60	#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
ac45bb16 AB	61	#define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(4)
ac45bb16 AB	62	#define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PD(5)
8f1a80e9	63	#endif
9e336903 WJ	64
	65	/* PMECC & PMERRLOC */
	66	#define CONFIG_ATMEL_NAND_HWECC
	67	#define CONFIG_ATMEL_NAND_HW_PMECC
	68	#define CONFIG_PMECC_CAP 2
	69	#define CONFIG_PMECC_SECTOR_SIZE 512
ce76f0aa	70
9e336903 WJ	71	#define CONFIG_MTD_PARTITIONS
9e336903 WJ	72	#define CONFIG_MTD_DEVICE
9e336903 WJ	73
	74	#define CONFIG_EXTRA_ENV_SETTINGS \
	75	"console=console=ttyS0,115200\0" \
43ede0bc	76	"mtdparts="CONFIG_MTDPARTS_DEFAULT"\0" \
9e336903 WJ	77	"bootargs_nand=rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw\0"\
	78	"bootargs_mmc=root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait\0"
	79
16276220 BS	80	/* Ethernet */
	81	#define CONFIG_KS8851_MLL
	82	#define CONFIG_KS8851_MLL_BASEADDR 0x30000000 /* use NCS2 */
	83
9e336903 WJ	84	#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
	85
	86	#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
	87	#define CONFIG_SYS_MEMTEST_END 0x26e00000
	88
d9bef0ad BS	89	/* USB host */
	90	#ifdef CONFIG_CMD_USB
	91	#define CONFIG_USB_ATMEL
dcd2f1a0	92	#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
d9bef0ad BS	93	#define CONFIG_USB_OHCI_NEW
	94	#define CONFIG_SYS_USB_OHCI_CPU_INIT
	95	#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI
	96	#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9n12"
	97	#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
d9bef0ad BS	98	#endif
d9bef0ad BS	99
5541543f	100	#ifdef CONFIG_SPI_BOOT
9e336903 WJ	101
9e336903 WJ	102	/* bootstrap + u-boot + env + linux in dataflash on CS0 */
9e336903 WJ	103	#define CONFIG_ENV_OFFSET 0x5000
	104	#define CONFIG_ENV_SIZE 0x3000
	105	#define CONFIG_ENV_SECT_SIZE 0x1000
	106	#define CONFIG_BOOTCOMMAND \
	107	"setenv bootargs ${console} ${mtdparts} ${bootargs_nand};" \
	108	"sf probe 0; sf read 0x22000000 0x100000 0x300000; " \
	109	"bootm 0x22000000"
	110
5541543f	111	#elif defined(CONFIG_NAND_BOOT)
9e336903 WJ	112
9e336903 WJ	113	/* bootstrap + u-boot + env + linux in nandflash */
0ab5433d	114	#define CONFIG_ENV_OFFSET 0x120000
9e336903 WJ	115	#define CONFIG_ENV_OFFSET_REDUND 0x100000
	116	#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
	117	#define CONFIG_BOOTCOMMAND \
	118	"setenv bootargs ${console} ${mtdparts} ${bootargs_nand};" \
	119	"nand read 0x21000000 0x180000 0x080000;" \
	120	"nand read 0x22000000 0x200000 0x400000;" \
	121	"bootm 0x22000000 - 0x21000000"
	122
5541543f	123	#else /* CONFIG_SD_BOOT */
9e336903 WJ	124
9e336903 WJ	125	/* bootstrap + u-boot + env + linux in mmc */
23ac62d4 WJ	126
	127	#ifdef CONFIG_ENV_IS_IN_MMC
	128	/* Use raw reserved sectors to save environment */
9e336903 WJ	129	#define CONFIG_ENV_OFFSET 0x2000
	130	#define CONFIG_ENV_SIZE 0x1000
	131	#define CONFIG_SYS_MMC_ENV_DEV 0
23ac62d4 WJ	132	#else
23ac62d4 WJ	133	/* Use file in FAT file to save environment */
23ac62d4 WJ	134	#define CONFIG_ENV_SIZE 0x4000
	135	#endif
	136
9e336903 WJ	137	#define CONFIG_BOOTCOMMAND \
	138	"setenv bootargs ${console} ${mtdparts} ${bootargs_mmc};" \
	139	"fatload mmc 0:1 0x21000000 dtb;" \
	140	"fatload mmc 0:1 0x22000000 uImage;" \
	141	"bootm 0x22000000 - 0x21000000"
	142
	143	#endif
	144
9e336903 WJ	145	/*
	146	* Size of malloc() pool
	147	*/
	148	#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
ff255e83 BS	149
ff255e83 BS	150	/* SPL */
ff255e83 BS	151	#define CONFIG_SPL_TEXT_BASE 0x300000
	152	#define CONFIG_SPL_MAX_SIZE 0x6000
	153	#define CONFIG_SPL_STACK 0x308000
	154
	155	#define CONFIG_SPL_BSS_START_ADDR 0x20000000
	156	#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
	157	#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
	158	#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
	159
ff255e83 BS	160	#define CONFIG_SYS_MONITOR_LEN (512 << 10)
	161
	162	#define CONFIG_SYS_MASTER_CLOCK 132096000
	163	#define CONFIG_SYS_AT91_PLLA 0x20953f03
	164	#define CONFIG_SYS_MCKR 0x1301
	165	#define CONFIG_SYS_MCKR_CSS 0x1302
	166
5541543f	167	#ifdef CONFIG_SD_BOOT
ff255e83 BS	168	#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
ff255e83 BS	169	#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
ff255e83 BS	170
ff255e83 BS	171	#elif CONFIG_SYS_USE_NANDFLASH
5541543f WY	172	#elif CONFIG_SPI_BOOT
	173	#define CONFIG_SPL_SPI_LOAD
	174	#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8400
	175
	176	#elif CONFIG_NAND_BOOT
ff255e83 BS	177	#define CONFIG_SPL_NAND_DRIVERS
ff255e83 BS	178	#define CONFIG_SPL_NAND_BASE
5541543f	179	#endif
ff255e83 BS	180	#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
	181	#define CONFIG_SYS_NAND_5_ADDR_CYCLE
	182	#define CONFIG_SYS_NAND_PAGE_SIZE 0x800
	183	#define CONFIG_SYS_NAND_PAGE_COUNT 64
	184	#define CONFIG_SYS_NAND_OOBSIZE 64
	185	#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
	186	#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
	187	#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
	188
9e336903	189	#endif