[people/ms/u-boot.git] / include / configs / at91sam9n12ek.h

/*
 * (C) Copyright 2013 Atmel Corporation.
 * Josh Wu <josh.wu@atmel.com>
 *
 * Configuation settings for the AT91SAM9N12-EK boards.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __AT91SAM9N12_CONFIG_H_
#define __AT91SAM9N12_CONFIG_H_

/*
 * SoC must be defined first, before hardware.h is included.
 * In this case SoC is defined in boards.cfg.
 */
#include <asm/hardware.h>

#define CONFIG_SYS_TEXT_BASE		0x26f00000

/* ARM asynchronous clock */
#define CONFIG_SYS_AT91_SLOW_CLOCK	32768		/* slow clock xtal */
#define CONFIG_SYS_AT91_MAIN_CLOCK	16000000	/* main clock xtal */

/* Misc CPU related */
#define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_DISPLAY_CPUINFO

/* general purpose I/O */
#define CONFIG_AT91_GPIO

/* serial console */
#define CONFIG_ATMEL_USART
#define CONFIG_USART_BASE		ATMEL_BASE_DBGU
#define CONFIG_USART_ID			ATMEL_ID_SYS
#define CONFIG_BAUDRATE			115200

/* LCD */
#define CONFIG_LCD
#define LCD_BPP				LCD_COLOR16
#define LCD_OUTPUT_BPP			24
#define CONFIG_LCD_LOGO
#define CONFIG_LCD_INFO
#define CONFIG_LCD_INFO_BELOW_LOGO
#define CONFIG_SYS_WHITE_ON_BLACK
#define CONFIG_ATMEL_HLCD
#define CONFIG_ATMEL_LCD_RGB565
#define CONFIG_SYS_CONSOLE_IS_IN_ENV


/*
 * BOOTP options
 */
#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME

/* NOR flash - no real flash on this board */
#define CONFIG_SYS_NO_FLASH

/*
 * Command line configuration.
 */
#define CONFIG_CMD_NAND

#define CONFIG_NR_DRAM_BANKS		1
#define CONFIG_SYS_SDRAM_BASE		0x20000000
#define CONFIG_SYS_SDRAM_SIZE		0x08000000

/*
 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
 * leaving the correct space for initial global data structure above
 * that address while providing maximum stack area below.
 */
# define CONFIG_SYS_INIT_SP_ADDR \
	(ATMEL_BASE_SRAM + 0x1000 - GENERATED_GBL_DATA_SIZE)

/* DataFlash */
#ifdef CONFIG_CMD_SF
#define CONFIG_ATMEL_SPI
#define CONFIG_SF_DEFAULT_SPEED		30000000
#define CONFIG_ENV_SPI_MODE		SPI_MODE_3
#define CONFIG_SF_DEFAULT_MODE		SPI_MODE_3
#endif

/* NAND flash */
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_MAX_NAND_DEVICE	1
#define CONFIG_SYS_NAND_BASE		0x40000000
#define CONFIG_SYS_NAND_MASK_ALE	(1 << 21)
#define CONFIG_SYS_NAND_MASK_CLE	(1 << 22)
#define CONFIG_SYS_NAND_ENABLE_PIN	GPIO_PIN_PD(4)
#define CONFIG_SYS_NAND_READY_PIN	GPIO_PIN_PD(5)

/* PMECC & PMERRLOC */
#define CONFIG_ATMEL_NAND_HWECC
#define CONFIG_ATMEL_NAND_HW_PMECC
#define CONFIG_PMECC_CAP		2
#define CONFIG_PMECC_SECTOR_SIZE	512
#define CONFIG_PMECC_INDEX_TABLE_OFFSET	0x8000

#define CONFIG_CMD_NAND_TRIMFFS

#endif

#define CONFIG_MTD_PARTITIONS
#define CONFIG_MTD_DEVICE
#define CONFIG_CMD_MTDPARTS
#define MTDIDS_DEFAULT			"nand0=atmel_nand"
#define MTDPARTS_DEFAULT						\
	"mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,"		\
	"256k(env),256k(env_redundant),256k(spare),"			\
	"512k(dtb),6M(kernel)ro,-(rootfs)"

#define CONFIG_EXTRA_ENV_SETTINGS                                       \
	"console=console=ttyS0,115200\0"                                \
	"mtdparts="MTDPARTS_DEFAULT"\0"					\
	"bootargs_nand=rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw\0"\
	"bootargs_mmc=root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait\0"

/* MMC */
#ifdef CONFIG_CMD_MMC
#define CONFIG_MMC
#define CONFIG_GENERIC_MMC
#define CONFIG_GENERIC_ATMEL_MCI
#endif

/* FAT */
#ifdef CONFIG_CMD_FAT
#define CONFIG_DOS_PARTITION
#endif

/* Ethernet */
#define CONFIG_KS8851_MLL
#define CONFIG_KS8851_MLL_BASEADDR	0x30000000 /* use NCS2 */

#define CONFIG_SYS_LOAD_ADDR		0x22000000 /* load address */

#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_MEMTEST_END		0x26e00000

/* USB host */
#ifdef CONFIG_CMD_USB
#define CONFIG_USB_ATMEL
#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
#define CONFIG_USB_OHCI_NEW
#define CONFIG_SYS_USB_OHCI_CPU_INIT
#define CONFIG_SYS_USB_OHCI_REGS_BASE	ATMEL_BASE_OHCI
#define CONFIG_SYS_USB_OHCI_SLOT_NAME	"at91sam9n12"
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	1
#endif

#ifdef CONFIG_SYS_USE_SPIFLASH

/* bootstrap + u-boot + env + linux in dataflash on CS0 */
#define CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_ENV_OFFSET		0x5000
#define CONFIG_ENV_SIZE			0x3000
#define CONFIG_ENV_SECT_SIZE		0x1000
#define CONFIG_BOOTCOMMAND						\
	"setenv bootargs ${console} ${mtdparts} ${bootargs_nand};"	\
	"sf probe 0; sf read 0x22000000 0x100000 0x300000; "		\
	"bootm 0x22000000"

#elif defined(CONFIG_SYS_USE_NANDFLASH)

/* bootstrap + u-boot + env + linux in nandflash */
#define CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_OFFSET		0xc0000
#define CONFIG_ENV_OFFSET_REDUND	0x100000
#define CONFIG_ENV_SIZE			0x20000		/* 1 sector = 128 kB */
#define CONFIG_BOOTCOMMAND						\
	"setenv bootargs ${console} ${mtdparts} ${bootargs_nand};"	\
	"nand read 0x21000000 0x180000 0x080000;"			\
	"nand read 0x22000000 0x200000 0x400000;"			\
	"bootm 0x22000000 - 0x21000000"

#else /* CONFIG_SYS_USE_MMC */

/* bootstrap + u-boot + env + linux in mmc */

#ifdef CONFIG_ENV_IS_IN_MMC
/* Use raw reserved sectors to save environment */
#define CONFIG_ENV_OFFSET		0x2000
#define CONFIG_ENV_SIZE			0x1000
#define CONFIG_SYS_MMC_ENV_DEV		0
#else
/* Use file in FAT file to save environment */
#define CONFIG_ENV_IS_IN_FAT
#define CONFIG_FAT_WRITE
#define FAT_ENV_INTERFACE		"mmc"
#define FAT_ENV_FILE			"uboot.env"
#define FAT_ENV_DEVICE_AND_PART		"0"
#define CONFIG_ENV_SIZE			0x4000
#endif

#define CONFIG_BOOTCOMMAND						\
	"setenv bootargs ${console} ${mtdparts} ${bootargs_mmc};"	\
	"fatload mmc 0:1 0x21000000 dtb;"				\
	"fatload mmc 0:1 0x22000000 uImage;"				\
	"bootm 0x22000000 - 0x21000000"

#endif

#define CONFIG_SYS_CBSIZE	256
#define CONFIG_SYS_MAXARGS	16
#define CONFIG_SYS_LONGHELP
#define CONFIG_CMDLINE_EDITING
#define CONFIG_AUTO_COMPLETE

/*
 * Size of malloc() pool
 */
#define CONFIG_SYS_MALLOC_LEN	(4 * 1024 * 1024)

/* SPL */
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_TEXT_BASE		0x300000
#define CONFIG_SPL_MAX_SIZE		0x6000
#define CONFIG_SPL_STACK		0x308000

#define CONFIG_SPL_BSS_START_ADDR	0x20000000
#define CONFIG_SPL_BSS_MAX_SIZE		0x80000
#define CONFIG_SYS_SPL_MALLOC_START	0x20080000
#define CONFIG_SYS_SPL_MALLOC_SIZE	0x80000

#define CONFIG_SPL_SERIAL_SUPPORT

#define CONFIG_SPL_BOARD_INIT
#define CONFIG_SYS_MONITOR_LEN		(512 << 10)

#define CONFIG_SYS_MASTER_CLOCK		132096000
#define CONFIG_SYS_AT91_PLLA		0x20953f03
#define CONFIG_SYS_MCKR			0x1301
#define CONFIG_SYS_MCKR_CSS		0x1302

#ifdef CONFIG_SYS_USE_MMC
#define CONFIG_SPL_LDSCRIPT		arch/arm/mach-at91/arm926ejs/u-boot-spl.lds
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	0x400
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME		"u-boot.img"

#elif CONFIG_SYS_USE_NANDFLASH
#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SYS_NAND_U_BOOT_OFFS	0x40000
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_SIZE	0x800
#define CONFIG_SYS_NAND_PAGE_COUNT	64
#define CONFIG_SYS_NAND_OOBSIZE		64
#define CONFIG_SYS_NAND_BLOCK_SIZE	0x20000
#define CONFIG_SYS_NAND_BAD_BLOCK_POS	0x0
#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER

#elif CONFIG_SYS_USE_SPIFLASH
#define CONFIG_SPL_SPI_SUPPORT
#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SYS_SPI_U_BOOT_OFFS	0x8400

#endif

#endif
Commit	Line	Data
9e336903 WJ	1	/*
	2	* (C) Copyright 2013 Atmel Corporation.
	3	* Josh Wu <josh.wu@atmel.com>
	4	*
	5	* Configuation settings for the AT91SAM9N12-EK boards.
	6	*
1a459660	7	* SPDX-License-Identifier: GPL-2.0+
9e336903 WJ	8	*/
	9
	10	#ifndef __AT91SAM9N12_CONFIG_H_
	11	#define __AT91SAM9N12_CONFIG_H_
	12
	13	/*
	14	* SoC must be defined first, before hardware.h is included.
	15	* In this case SoC is defined in boards.cfg.
	16	*/
	17	#include <asm/hardware.h>
	18
	19	#define CONFIG_SYS_TEXT_BASE 0x26f00000
	20
9e336903 WJ	21	/* ARM asynchronous clock */
	22	#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
	23	#define CONFIG_SYS_AT91_MAIN_CLOCK 16000000 /* main clock xtal */
9e336903 WJ	24
	25	/* Misc CPU related */
	26	#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
	27	#define CONFIG_SETUP_MEMORY_TAGS
	28	#define CONFIG_INITRD_TAG
	29	#define CONFIG_SKIP_LOWLEVEL_INIT
	30	#define CONFIG_BOARD_EARLY_INIT_F
	31	#define CONFIG_DISPLAY_CPUINFO
	32
9e336903 WJ	33	/* general purpose I/O */
	34	#define CONFIG_AT91_GPIO
	35
	36	/* serial console */
	37	#define CONFIG_ATMEL_USART
	38	#define CONFIG_USART_BASE ATMEL_BASE_DBGU
	39	#define CONFIG_USART_ID ATMEL_ID_SYS
	40	#define CONFIG_BAUDRATE 115200
	41
	42	/* LCD */
	43	#define CONFIG_LCD
	44	#define LCD_BPP LCD_COLOR16
	45	#define LCD_OUTPUT_BPP 24
	46	#define CONFIG_LCD_LOGO
	47	#define CONFIG_LCD_INFO
	48	#define CONFIG_LCD_INFO_BELOW_LOGO
	49	#define CONFIG_SYS_WHITE_ON_BLACK
	50	#define CONFIG_ATMEL_HLCD
	51	#define CONFIG_ATMEL_LCD_RGB565
	52	#define CONFIG_SYS_CONSOLE_IS_IN_ENV
	53
9e336903 WJ	54
	55	/*
	56	* BOOTP options
	57	*/
	58	#define CONFIG_BOOTP_BOOTFILESIZE
	59	#define CONFIG_BOOTP_BOOTPATH
	60	#define CONFIG_BOOTP_GATEWAY
	61	#define CONFIG_BOOTP_HOSTNAME
	62
	63	/* NOR flash - no real flash on this board */
	64	#define CONFIG_SYS_NO_FLASH
	65
	66	/*
	67	* Command line configuration.
	68	*/
9e336903	69	#define CONFIG_CMD_NAND
9e336903 WJ	70
	71	#define CONFIG_NR_DRAM_BANKS 1
	72	#define CONFIG_SYS_SDRAM_BASE 0x20000000
	73	#define CONFIG_SYS_SDRAM_SIZE 0x08000000
	74
	75	/*
	76	* Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
	77	* leaving the correct space for initial global data structure above
	78	* that address while providing maximum stack area below.
	79	*/
	80	# define CONFIG_SYS_INIT_SP_ADDR \
	81	(ATMEL_BASE_SRAM + 0x1000 - GENERATED_GBL_DATA_SIZE)
	82
	83	/* DataFlash */
	84	#ifdef CONFIG_CMD_SF
	85	#define CONFIG_ATMEL_SPI
9e336903 WJ	86	#define CONFIG_SF_DEFAULT_SPEED 30000000
	87	#define CONFIG_ENV_SPI_MODE SPI_MODE_3
	88	#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
	89	#endif
	90
	91	/* NAND flash */
	92	#ifdef CONFIG_CMD_NAND
	93	#define CONFIG_NAND_ATMEL
	94	#define CONFIG_SYS_MAX_NAND_DEVICE 1
	95	#define CONFIG_SYS_NAND_BASE 0x40000000
	96	#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
	97	#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
ac45bb16 AB	98	#define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(4)
ac45bb16 AB	99	#define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PD(5)
9e336903 WJ	100
	101	/* PMECC & PMERRLOC */
	102	#define CONFIG_ATMEL_NAND_HWECC
	103	#define CONFIG_ATMEL_NAND_HW_PMECC
	104	#define CONFIG_PMECC_CAP 2
	105	#define CONFIG_PMECC_SECTOR_SIZE 512
	106	#define CONFIG_PMECC_INDEX_TABLE_OFFSET 0x8000
ce76f0aa BS	107
	108	#define CONFIG_CMD_NAND_TRIMFFS
	109
9e336903 WJ	110	#endif
	111
	112	#define CONFIG_MTD_PARTITIONS
	113	#define CONFIG_MTD_DEVICE
	114	#define CONFIG_CMD_MTDPARTS
	115	#define MTDIDS_DEFAULT "nand0=atmel_nand"
	116	#define MTDPARTS_DEFAULT \
	117	"mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
	118	"256k(env),256k(env_redundant),256k(spare)," \
	119	"512k(dtb),6M(kernel)ro,-(rootfs)"
	120
	121	#define CONFIG_EXTRA_ENV_SETTINGS \
	122	"console=console=ttyS0,115200\0" \
	123	"mtdparts="MTDPARTS_DEFAULT"\0" \
	124	"bootargs_nand=rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw\0"\
	125	"bootargs_mmc=root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait\0"
	126
	127	/* MMC */
	128	#ifdef CONFIG_CMD_MMC
	129	#define CONFIG_MMC
	130	#define CONFIG_GENERIC_MMC
	131	#define CONFIG_GENERIC_ATMEL_MCI
	132	#endif
	133
	134	/* FAT */
	135	#ifdef CONFIG_CMD_FAT
	136	#define CONFIG_DOS_PARTITION
	137	#endif
	138
16276220 BS	139	/* Ethernet */
	140	#define CONFIG_KS8851_MLL
	141	#define CONFIG_KS8851_MLL_BASEADDR 0x30000000 /* use NCS2 */
	142
9e336903 WJ	143	#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
	144
	145	#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
	146	#define CONFIG_SYS_MEMTEST_END 0x26e00000
	147
d9bef0ad BS	148	/* USB host */
	149	#ifdef CONFIG_CMD_USB
	150	#define CONFIG_USB_ATMEL
dcd2f1a0	151	#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
d9bef0ad BS	152	#define CONFIG_USB_OHCI_NEW
	153	#define CONFIG_SYS_USB_OHCI_CPU_INIT
	154	#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI
	155	#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9n12"
	156	#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
d9bef0ad BS	157	#endif
d9bef0ad BS	158
9e336903 WJ	159	#ifdef CONFIG_SYS_USE_SPIFLASH
	160
	161	/* bootstrap + u-boot + env + linux in dataflash on CS0 */
	162	#define CONFIG_ENV_IS_IN_SPI_FLASH
	163	#define CONFIG_ENV_OFFSET 0x5000
	164	#define CONFIG_ENV_SIZE 0x3000
	165	#define CONFIG_ENV_SECT_SIZE 0x1000
	166	#define CONFIG_BOOTCOMMAND \
	167	"setenv bootargs ${console} ${mtdparts} ${bootargs_nand};" \
	168	"sf probe 0; sf read 0x22000000 0x100000 0x300000; " \
	169	"bootm 0x22000000"
	170
	171	#elif defined(CONFIG_SYS_USE_NANDFLASH)
	172
	173	/* bootstrap + u-boot + env + linux in nandflash */
	174	#define CONFIG_ENV_IS_IN_NAND
	175	#define CONFIG_ENV_OFFSET 0xc0000
	176	#define CONFIG_ENV_OFFSET_REDUND 0x100000
	177	#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
	178	#define CONFIG_BOOTCOMMAND \
	179	"setenv bootargs ${console} ${mtdparts} ${bootargs_nand};" \
	180	"nand read 0x21000000 0x180000 0x080000;" \
	181	"nand read 0x22000000 0x200000 0x400000;" \
	182	"bootm 0x22000000 - 0x21000000"
	183
	184	#else /* CONFIG_SYS_USE_MMC */
	185
	186	/* bootstrap + u-boot + env + linux in mmc */
23ac62d4 WJ	187
	188	#ifdef CONFIG_ENV_IS_IN_MMC
	189	/* Use raw reserved sectors to save environment */
9e336903 WJ	190	#define CONFIG_ENV_OFFSET 0x2000
	191	#define CONFIG_ENV_SIZE 0x1000
	192	#define CONFIG_SYS_MMC_ENV_DEV 0
23ac62d4 WJ	193	#else
	194	/* Use file in FAT file to save environment */
	195	#define CONFIG_ENV_IS_IN_FAT
	196	#define CONFIG_FAT_WRITE
	197	#define FAT_ENV_INTERFACE "mmc"
	198	#define FAT_ENV_FILE "uboot.env"
	199	#define FAT_ENV_DEVICE_AND_PART "0"
	200	#define CONFIG_ENV_SIZE 0x4000
	201	#endif
	202
9e336903 WJ	203	#define CONFIG_BOOTCOMMAND \
	204	"setenv bootargs ${console} ${mtdparts} ${bootargs_mmc};" \
	205	"fatload mmc 0:1 0x21000000 dtb;" \
	206	"fatload mmc 0:1 0x22000000 uImage;" \
	207	"bootm 0x22000000 - 0x21000000"
	208
	209	#endif
	210
9e336903 WJ	211	#define CONFIG_SYS_CBSIZE 256
9e336903 WJ	212	#define CONFIG_SYS_MAXARGS 16
9e336903 WJ	213	#define CONFIG_SYS_LONGHELP
	214	#define CONFIG_CMDLINE_EDITING
	215	#define CONFIG_AUTO_COMPLETE
9e336903 WJ	216
	217	/*
	218	* Size of malloc() pool
	219	*/
	220	#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
ff255e83 BS	221
	222	/* SPL */
	223	#define CONFIG_SPL_FRAMEWORK
	224	#define CONFIG_SPL_TEXT_BASE 0x300000
	225	#define CONFIG_SPL_MAX_SIZE 0x6000
	226	#define CONFIG_SPL_STACK 0x308000
	227
	228	#define CONFIG_SPL_BSS_START_ADDR 0x20000000
	229	#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
	230	#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
	231	#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
	232
ff255e83 BS	233	#define CONFIG_SPL_SERIAL_SUPPORT
	234
	235	#define CONFIG_SPL_BOARD_INIT
	236	#define CONFIG_SYS_MONITOR_LEN (512 << 10)
	237
	238	#define CONFIG_SYS_MASTER_CLOCK 132096000
	239	#define CONFIG_SYS_AT91_PLLA 0x20953f03
	240	#define CONFIG_SYS_MCKR 0x1301
	241	#define CONFIG_SYS_MCKR_CSS 0x1302
	242
ff255e83 BS	243	#ifdef CONFIG_SYS_USE_MMC
ff255e83 BS	244	#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/arm926ejs/u-boot-spl.lds
ff255e83 BS	245	#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x400
	246	#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
	247	#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
	248	#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
ff255e83 BS	249
	250	#elif CONFIG_SYS_USE_NANDFLASH
	251	#define CONFIG_SPL_NAND_SUPPORT
	252	#define CONFIG_SPL_NAND_DRIVERS
	253	#define CONFIG_SPL_NAND_BASE
	254	#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
	255	#define CONFIG_SYS_NAND_5_ADDR_CYCLE
	256	#define CONFIG_SYS_NAND_PAGE_SIZE 0x800
	257	#define CONFIG_SYS_NAND_PAGE_COUNT 64
	258	#define CONFIG_SYS_NAND_OOBSIZE 64
	259	#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
	260	#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
	261	#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
	262
	263	#elif CONFIG_SYS_USE_SPIFLASH
	264	#define CONFIG_SPL_SPI_SUPPORT
	265	#define CONFIG_SPL_SPI_FLASH_SUPPORT
	266	#define CONFIG_SPL_SPI_LOAD
	267	#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8400
	268
	269	#endif
9e336903 WJ	270
9e336903 WJ	271	#endif