]>
Commit | Line | Data |
---|---|---|
2118ebb4 SP |
1 | /* |
2 | * (C) Copyright 2007-2008 | |
c9e798d3 | 3 | * Stelian Pop <stelian@popies.net> |
2118ebb4 SP |
4 | * Lead Tech Design <www.leadtechdesign.com> |
5 | * | |
6 | * Configuation settings for the AT91SAM9RLEK board. | |
7 | * | |
1a459660 | 8 | * SPDX-License-Identifier: GPL-2.0+ |
2118ebb4 SP |
9 | */ |
10 | ||
11 | #ifndef __CONFIG_H | |
12 | #define __CONFIG_H | |
13 | ||
21d671d0 XH |
14 | #include <asm/hardware.h> |
15 | ||
16 | #define CONFIG_SYS_TEXT_BASE 0x21F00000 | |
425de62d | 17 | |
2118ebb4 | 18 | /* ARM asynchronous clock */ |
21d671d0 XH |
19 | #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ |
20 | #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* main clock xtal */ | |
21d671d0 XH |
21 | |
22 | #define CONFIG_AT91SAM9RLEK 1 /* It's an AT91SAM9RLEK Board */ | |
2118ebb4 | 23 | |
dc39ae95 | 24 | #define CONFIG_ARCH_CPU_INIT |
21d671d0 XH |
25 | #define CONFIG_SKIP_LOWLEVEL_INIT |
26 | #define CONFIG_BOARD_EARLY_INIT_F | |
2118ebb4 | 27 | |
21d671d0 XH |
28 | #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ |
29 | #define CONFIG_SETUP_MEMORY_TAGS 1 | |
30 | #define CONFIG_INITRD_TAG 1 | |
2118ebb4 | 31 | |
21d671d0 XH |
32 | #define CONFIG_DISPLAY_CPUINFO |
33 | ||
f9129fe3 | 34 | #define CONFIG_CMD_BOOTZ |
015b18c6 | 35 | |
21d671d0 XH |
36 | #define CONFIG_ATMEL_LEGACY |
37 | #define CONFIG_AT91_GPIO 1 | |
38 | #define CONFIG_AT91_GPIO_PULLUP 1 | |
2118ebb4 SP |
39 | |
40 | /* | |
41 | * Hardware drivers | |
42 | */ | |
21d671d0 XH |
43 | |
44 | /* serial console */ | |
45 | #define CONFIG_ATMEL_USART | |
46 | #define CONFIG_USART_BASE ATMEL_BASE_DBGU | |
47 | #define CONFIG_USART_ID ATMEL_ID_SYS | |
48 | #define CONFIG_BAUDRATE 115200 | |
2118ebb4 | 49 | |
761c70b8 SP |
50 | /* LCD */ |
51 | #define CONFIG_LCD 1 | |
52 | #define LCD_BPP LCD_COLOR8 | |
53 | #define CONFIG_LCD_LOGO 1 | |
54 | #undef LCD_TEST_PATTERN | |
55 | #define CONFIG_LCD_INFO 1 | |
56 | #define CONFIG_LCD_INFO_BELOW_LOGO 1 | |
21d671d0 | 57 | #define CONFIG_SYS_WHITE_ON_BLACK 1 |
761c70b8 SP |
58 | #define CONFIG_ATMEL_LCD 1 |
59 | #define CONFIG_ATMEL_LCD_RGB565 1 | |
21d671d0 XH |
60 | /* Let board_init_f handle the framebuffer allocation */ |
61 | #undef CONFIG_FB_ADDR | |
62 | #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 | |
63 | ||
761c70b8 | 64 | |
a484b00b JCPV |
65 | /* LED */ |
66 | #define CONFIG_AT91_LED | |
67 | #define CONFIG_RED_LED AT91_PIN_PD14 /* this is the power led */ | |
68 | #define CONFIG_GREEN_LED AT91_PIN_PD15 /* this is the user1 led */ | |
69 | #define CONFIG_YELLOW_LED AT91_PIN_PD16 /* this is the user2 led */ | |
70 | ||
2118ebb4 SP |
71 | #define CONFIG_BOOTDELAY 3 |
72 | ||
2118ebb4 SP |
73 | /* |
74 | * Command line configuration. | |
75 | */ | |
2118ebb4 SP |
76 | #undef CONFIG_CMD_USB |
77 | ||
21d671d0 | 78 | #define CONFIG_CMD_NAND 1 |
2118ebb4 SP |
79 | |
80 | /* SDRAM */ | |
81 | #define CONFIG_NR_DRAM_BANKS 1 | |
21d671d0 XH |
82 | #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 |
83 | #define CONFIG_SYS_SDRAM_SIZE 0x04000000 | |
84 | ||
85 | #define CONFIG_SYS_INIT_SP_ADDR \ | |
86 | (ATMEL_BASE_SRAM + 0x1000 - GENERATED_GBL_DATA_SIZE) | |
2118ebb4 SP |
87 | |
88 | /* DataFlash */ | |
4758ebdd | 89 | #define CONFIG_ATMEL_DATAFLASH_SPI |
21d671d0 | 90 | #define CONFIG_HAS_DATAFLASH 1 |
6d0f6bcf JCPV |
91 | #define CONFIG_SYS_MAX_DATAFLASH_BANKS 1 |
92 | #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ | |
21d671d0 XH |
93 | #define AT91_SPI_CLK 15000000 |
94 | #define DATAFLASH_TCSS (0x1a << 16) | |
95 | #define DATAFLASH_TCHS (0x1 << 24) | |
2118ebb4 SP |
96 | |
97 | /* NOR flash - not present */ | |
6d0f6bcf | 98 | #define CONFIG_SYS_NO_FLASH 1 |
2118ebb4 SP |
99 | |
100 | /* NAND flash */ | |
74c076d6 JCPV |
101 | #ifdef CONFIG_CMD_NAND |
102 | #define CONFIG_NAND_ATMEL | |
6d0f6bcf | 103 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
21d671d0 | 104 | #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 |
6d0f6bcf | 105 | #define CONFIG_SYS_NAND_DBW_8 1 |
74c076d6 JCPV |
106 | /* our ALE is AD21 */ |
107 | #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) | |
108 | /* our CLE is AD22 */ | |
109 | #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) | |
110 | #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PB6 | |
111 | #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD17 | |
2eb99ca8 | 112 | |
74c076d6 | 113 | #endif |
2118ebb4 | 114 | |
111ec4c6 WJ |
115 | /* MMC */ |
116 | #define CONFIG_CMD_MMC | |
117 | ||
118 | #ifdef CONFIG_CMD_MMC | |
119 | #define CONFIG_MMC | |
120 | #define CONFIG_GENERIC_MMC | |
121 | #define CONFIG_GENERIC_ATMEL_MCI | |
122 | #define CONFIG_CMD_FAT | |
123 | #define CONFIG_DOS_PARTITION | |
124 | #endif | |
125 | ||
2118ebb4 SP |
126 | /* Ethernet - not present */ |
127 | ||
128 | /* USB - not supported */ | |
129 | ||
6d0f6bcf | 130 | #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ |
2118ebb4 | 131 | |
21d671d0 | 132 | #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE |
6d0f6bcf | 133 | #define CONFIG_SYS_MEMTEST_END 0x23e00000 |
2118ebb4 | 134 | |
6d0f6bcf | 135 | #ifdef CONFIG_SYS_USE_DATAFLASH |
2118ebb4 SP |
136 | |
137 | /* bootstrap + u-boot + env + linux in dataflash on CS0 */ | |
057c849c | 138 | #define CONFIG_ENV_IS_IN_DATAFLASH 1 |
6d0f6bcf | 139 | #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400) |
0e8d1586 | 140 | #define CONFIG_ENV_OFFSET 0x4200 |
6d0f6bcf | 141 | #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET) |
0e8d1586 | 142 | #define CONFIG_ENV_SIZE 0x4200 |
e139cb31 | 143 | #define CONFIG_BOOTCOMMAND "cp.b 0xC0084000 0x22000000 0x210000; bootm" |
2118ebb4 SP |
144 | #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ |
145 | "root=/dev/mtdblock0 " \ | |
918319c7 | 146 | "mtdparts=atmel_nand:-(root) "\ |
2118ebb4 SP |
147 | "rw rootfstype=jffs2" |
148 | ||
0b128434 | 149 | #elif CONFIG_SYS_USE_NANDFLASH |
2118ebb4 SP |
150 | |
151 | /* bootstrap + u-boot + env + linux in nandflash */ | |
21d671d0 | 152 | #define CONFIG_ENV_IS_IN_NAND 1 |
65b553b7 WJ |
153 | #define CONFIG_ENV_OFFSET 0xc0000 |
154 | #define CONFIG_ENV_OFFSET_REDUND 0x100000 | |
0e8d1586 | 155 | #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ |
65b553b7 WJ |
156 | #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x600000; " \ |
157 | "nand read 0x21000000 0x180000 0x80000; " \ | |
158 | "bootz 0x22000000 - 0x21000000" | |
159 | #define CONFIG_BOOTARGS \ | |
160 | "console=ttyS0,115200 earlyprintk " \ | |
161 | "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \ | |
9aee8d83 | 162 | "256K(env),256k(env_redundent),256k(spare)," \ |
65b553b7 WJ |
163 | "512k(dtb),6M(kernel)ro,-(rootfs) " \ |
164 | "rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs" | |
2118ebb4 | 165 | |
0b128434 WJ |
166 | #else /* CONFIG_SYS_USE_MMC */ |
167 | ||
168 | /* bootstrap + u-boot + env + linux in mmc */ | |
169 | #define CONFIG_ENV_IS_IN_FAT | |
170 | #define CONFIG_FAT_WRITE | |
171 | #define FAT_ENV_INTERFACE "mmc" | |
172 | #define FAT_ENV_FILE "uboot.env" | |
173 | #define FAT_ENV_DEVICE_AND_PART "0" | |
174 | #define CONFIG_ENV_SIZE 0x4000 | |
175 | #define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x21000000 at91sam9rlek.dtb; " \ | |
176 | "fatload mmc 0:1 0x22000000 zImage; " \ | |
177 | "bootz 0x22000000 - 0x21000000" | |
178 | #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ | |
179 | "mtdparts=atmel_nand:" \ | |
180 | "8M(bootstrap/uboot/kernel)ro,-(rootfs) " \ | |
181 | "root=/dev/mmcblk0p2 rw rootwait" | |
2118ebb4 SP |
182 | #endif |
183 | ||
6d0f6bcf JCPV |
184 | #define CONFIG_SYS_CBSIZE 256 |
185 | #define CONFIG_SYS_MAXARGS 16 | |
6d0f6bcf | 186 | #define CONFIG_SYS_LONGHELP 1 |
21d671d0 | 187 | #define CONFIG_CMDLINE_EDITING 1 |
e139cb31 | 188 | #define CONFIG_AUTO_COMPLETE |
2118ebb4 | 189 | |
2118ebb4 SP |
190 | /* |
191 | * Size of malloc() pool | |
192 | */ | |
21d671d0 | 193 | #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) |
2118ebb4 | 194 | |
2118ebb4 | 195 | #endif |