]>
Commit | Line | Data |
---|---|---|
2118ebb4 SP |
1 | /* |
2 | * (C) Copyright 2007-2008 | |
3 | * Stelian Pop <stelian.pop@leadtechdesign.com> | |
4 | * Lead Tech Design <www.leadtechdesign.com> | |
5 | * | |
6 | * Configuation settings for the AT91SAM9RLEK board. | |
7 | * | |
8 | * See file CREDITS for list of people who contributed to this | |
9 | * project. | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or | |
12 | * modify it under the terms of the GNU General Public License as | |
13 | * published by the Free Software Foundation; either version 2 of | |
14 | * the License, or (at your option) any later version. | |
15 | * | |
16 | * This program is distributed in the hope that it will be useful, | |
17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | * GNU General Public License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License | |
22 | * along with this program; if not, write to the Free Software | |
23 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
24 | * MA 02111-1307 USA | |
25 | */ | |
26 | ||
27 | #ifndef __CONFIG_H | |
28 | #define __CONFIG_H | |
29 | ||
425de62d JS |
30 | #define CONFIG_AT91_LEGACY |
31 | ||
2118ebb4 | 32 | /* ARM asynchronous clock */ |
7c966a8b | 33 | #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ |
6ebff365 | 34 | #define CONFIG_SYS_HZ 1000 |
2118ebb4 | 35 | |
2118ebb4 SP |
36 | #define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ |
37 | #define CONFIG_AT91SAM9RL 1 /* It's an Atmel AT91SAM9RL SoC*/ | |
38 | #define CONFIG_AT91SAM9RLEK 1 /* on an AT91SAM9RLEK Board */ | |
dc39ae95 | 39 | #define CONFIG_ARCH_CPU_INIT |
2118ebb4 SP |
40 | #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ |
41 | ||
42 | #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ | |
43 | #define CONFIG_SETUP_MEMORY_TAGS 1 | |
44 | #define CONFIG_INITRD_TAG 1 | |
45 | ||
46 | #define CONFIG_SKIP_LOWLEVEL_INIT | |
2118ebb4 SP |
47 | |
48 | /* | |
49 | * Hardware drivers | |
50 | */ | |
ea8fbba7 | 51 | #define CONFIG_AT91_GPIO 1 |
2118ebb4 SP |
52 | #define CONFIG_ATMEL_USART 1 |
53 | #undef CONFIG_USART0 | |
54 | #undef CONFIG_USART1 | |
55 | #undef CONFIG_USART2 | |
56 | #define CONFIG_USART3 1 /* USART 3 is DBGU */ | |
57 | ||
761c70b8 SP |
58 | /* LCD */ |
59 | #define CONFIG_LCD 1 | |
60 | #define LCD_BPP LCD_COLOR8 | |
61 | #define CONFIG_LCD_LOGO 1 | |
62 | #undef LCD_TEST_PATTERN | |
63 | #define CONFIG_LCD_INFO 1 | |
64 | #define CONFIG_LCD_INFO_BELOW_LOGO 1 | |
6d0f6bcf | 65 | #define CONFIG_SYS_WHITE_ON_BLACK 1 |
761c70b8 SP |
66 | #define CONFIG_ATMEL_LCD 1 |
67 | #define CONFIG_ATMEL_LCD_RGB565 1 | |
6d0f6bcf | 68 | #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 |
761c70b8 | 69 | |
a484b00b JCPV |
70 | /* LED */ |
71 | #define CONFIG_AT91_LED | |
72 | #define CONFIG_RED_LED AT91_PIN_PD14 /* this is the power led */ | |
73 | #define CONFIG_GREEN_LED AT91_PIN_PD15 /* this is the user1 led */ | |
74 | #define CONFIG_YELLOW_LED AT91_PIN_PD16 /* this is the user2 led */ | |
75 | ||
2118ebb4 SP |
76 | #define CONFIG_BOOTDELAY 3 |
77 | ||
2118ebb4 SP |
78 | /* |
79 | * Command line configuration. | |
80 | */ | |
81 | #include <config_cmd_default.h> | |
82 | #undef CONFIG_CMD_BDI | |
2118ebb4 | 83 | #undef CONFIG_CMD_FPGA |
74de7aef | 84 | #undef CONFIG_CMD_IMI |
2118ebb4 | 85 | #undef CONFIG_CMD_IMLS |
74de7aef | 86 | #undef CONFIG_CMD_LOADS |
2118ebb4 | 87 | #undef CONFIG_CMD_NET |
74de7aef | 88 | #undef CONFIG_CMD_SOURCE |
2118ebb4 SP |
89 | #undef CONFIG_CMD_USB |
90 | ||
91 | #define CONFIG_CMD_NAND 1 | |
92 | ||
93 | /* SDRAM */ | |
94 | #define CONFIG_NR_DRAM_BANKS 1 | |
95 | #define PHYS_SDRAM 0x20000000 | |
96 | #define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */ | |
97 | ||
98 | /* DataFlash */ | |
4758ebdd | 99 | #define CONFIG_ATMEL_DATAFLASH_SPI |
2118ebb4 | 100 | #define CONFIG_HAS_DATAFLASH 1 |
6d0f6bcf JCPV |
101 | #define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ) |
102 | #define CONFIG_SYS_MAX_DATAFLASH_BANKS 1 | |
103 | #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ | |
2118ebb4 SP |
104 | #define AT91_SPI_CLK 15000000 |
105 | #define DATAFLASH_TCSS (0x1a << 16) | |
106 | #define DATAFLASH_TCHS (0x1 << 24) | |
107 | ||
108 | /* NOR flash - not present */ | |
6d0f6bcf | 109 | #define CONFIG_SYS_NO_FLASH 1 |
2118ebb4 SP |
110 | |
111 | /* NAND flash */ | |
74c076d6 JCPV |
112 | #ifdef CONFIG_CMD_NAND |
113 | #define CONFIG_NAND_ATMEL | |
6d0f6bcf JCPV |
114 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
115 | #define CONFIG_SYS_NAND_BASE 0x40000000 | |
116 | #define CONFIG_SYS_NAND_DBW_8 1 | |
74c076d6 JCPV |
117 | /* our ALE is AD21 */ |
118 | #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) | |
119 | /* our CLE is AD22 */ | |
120 | #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) | |
121 | #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PB6 | |
122 | #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD17 | |
2eb99ca8 | 123 | |
74c076d6 | 124 | #endif |
2118ebb4 SP |
125 | |
126 | /* Ethernet - not present */ | |
127 | ||
128 | /* USB - not supported */ | |
129 | ||
6d0f6bcf | 130 | #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ |
2118ebb4 | 131 | |
6d0f6bcf JCPV |
132 | #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM |
133 | #define CONFIG_SYS_MEMTEST_END 0x23e00000 | |
2118ebb4 | 134 | |
6d0f6bcf | 135 | #ifdef CONFIG_SYS_USE_DATAFLASH |
2118ebb4 SP |
136 | |
137 | /* bootstrap + u-boot + env + linux in dataflash on CS0 */ | |
057c849c | 138 | #define CONFIG_ENV_IS_IN_DATAFLASH 1 |
6d0f6bcf | 139 | #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400) |
0e8d1586 | 140 | #define CONFIG_ENV_OFFSET 0x4200 |
6d0f6bcf | 141 | #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET) |
0e8d1586 | 142 | #define CONFIG_ENV_SIZE 0x4200 |
2118ebb4 SP |
143 | #define CONFIG_BOOTCOMMAND "cp.b 0xC0042000 0x22000000 0x210000; bootm" |
144 | #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ | |
145 | "root=/dev/mtdblock0 " \ | |
918319c7 | 146 | "mtdparts=atmel_nand:-(root) "\ |
2118ebb4 SP |
147 | "rw rootfstype=jffs2" |
148 | ||
6d0f6bcf | 149 | #else /* CONFIG_SYS_USE_NANDFLASH */ |
2118ebb4 SP |
150 | |
151 | /* bootstrap + u-boot + env + linux in nandflash */ | |
51bfee19 | 152 | #define CONFIG_ENV_IS_IN_NAND 1 |
0e8d1586 JCPV |
153 | #define CONFIG_ENV_OFFSET 0x60000 |
154 | #define CONFIG_ENV_OFFSET_REDUND 0x80000 | |
155 | #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ | |
2118ebb4 SP |
156 | #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm" |
157 | #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ | |
158 | "root=/dev/mtdblock5 " \ | |
918319c7 | 159 | "mtdparts=atmel_nand:128k(bootstrap)ro,256k(uboot)ro,128k(env1)ro,128k(env2)ro,2M(linux),-(root) " \ |
2118ebb4 SP |
160 | "rw rootfstype=jffs2" |
161 | ||
162 | #endif | |
163 | ||
164 | #define CONFIG_BAUDRATE 115200 | |
6d0f6bcf | 165 | #define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } |
2118ebb4 | 166 | |
6d0f6bcf JCPV |
167 | #define CONFIG_SYS_PROMPT "U-Boot> " |
168 | #define CONFIG_SYS_CBSIZE 256 | |
169 | #define CONFIG_SYS_MAXARGS 16 | |
170 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) | |
171 | #define CONFIG_SYS_LONGHELP 1 | |
2118ebb4 SP |
172 | #define CONFIG_CMDLINE_EDITING 1 |
173 | ||
2118ebb4 SP |
174 | /* |
175 | * Size of malloc() pool | |
176 | */ | |
6d0f6bcf | 177 | #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) |
2118ebb4 SP |
178 | |
179 | #define CONFIG_STACKSIZE (32*1024) /* regular stack */ | |
180 | ||
181 | #ifdef CONFIG_USE_IRQ | |
182 | #error CONFIG_USE_IRQ not supported | |
183 | #endif | |
184 | ||
185 | #endif |