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1 | /* |
2 | * Copyright (C) 2012 Atmel Corporation | |
3 | * | |
4 | * Configuation settings for the AT91SAM9X5EK board. | |
5 | * | |
6 | * See file CREDITS for list of people who contributed to this | |
7 | * project. | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or | |
10 | * modify it under the terms of the GNU General Public License as | |
11 | * published by the Free Software Foundation; either version 2 of | |
12 | * the License, or (at your option) any later version. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
22 | * MA 02111-1307 USA | |
23 | */ | |
24 | ||
25 | #ifndef __CONFIG_H__ | |
26 | #define __CONFIG_H__ | |
27 | ||
28 | #include <asm/hardware.h> | |
29 | ||
30 | /* ARM asynchronous clock */ | |
31 | #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 | |
32 | #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ | |
33 | #define CONFIG_SYS_HZ 1000 | |
34 | ||
35 | #define CONFIG_AT91SAM9X5EK | |
36 | #define CONFIG_AT91FAMILY | |
37 | ||
f7fa2f37 BS |
38 | #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ |
39 | #define CONFIG_SETUP_MEMORY_TAGS | |
40 | #define CONFIG_INITRD_TAG | |
41 | #define CONFIG_SKIP_LOWLEVEL_INIT | |
42 | #define CONFIG_BOARD_EARLY_INIT_F | |
43 | #define CONFIG_DISPLAY_CPUINFO | |
44 | ||
dc3e30ba BS |
45 | #define CONFIG_OF_LIBFDT |
46 | ||
f7fa2f37 BS |
47 | /* general purpose I/O */ |
48 | #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ | |
49 | #define CONFIG_AT91_GPIO | |
50 | ||
51 | /* serial console */ | |
52 | #define CONFIG_ATMEL_USART | |
53 | #define CONFIG_USART_BASE ATMEL_BASE_DBGU | |
54 | #define CONFIG_USART_ID ATMEL_ID_SYS | |
55 | ||
56 | /* LCD */ | |
57 | #define CONFIG_LCD | |
58 | #define LCD_BPP LCD_COLOR16 | |
59 | #define LCD_OUTPUT_BPP 24 | |
60 | #define CONFIG_LCD_LOGO | |
61 | #undef LCD_TEST_PATTERN | |
62 | #define CONFIG_LCD_INFO | |
63 | #define CONFIG_LCD_INFO_BELOW_LOGO | |
64 | #define CONFIG_SYS_WHITE_ON_BLACK | |
65 | #define CONFIG_ATMEL_HLCD | |
66 | #define CONFIG_ATMEL_LCD_RGB565 | |
67 | #define CONFIG_SYS_CONSOLE_IS_IN_ENV | |
68 | ||
69 | #define CONFIG_BOOTDELAY 3 | |
70 | ||
71 | /* | |
72 | * BOOTP options | |
73 | */ | |
74 | #define CONFIG_BOOTP_BOOTFILESIZE | |
75 | #define CONFIG_BOOTP_BOOTPATH | |
76 | #define CONFIG_BOOTP_GATEWAY | |
77 | #define CONFIG_BOOTP_HOSTNAME | |
78 | ||
79 | /* | |
80 | * Command line configuration. | |
81 | */ | |
82 | #include <config_cmd_default.h> | |
83 | #undef CONFIG_CMD_FPGA | |
84 | #undef CONFIG_CMD_IMI | |
85 | #undef CONFIG_CMD_IMLS | |
86 | #undef CONFIG_CMD_LOADS | |
87 | ||
88 | #define CONFIG_CMD_PING | |
89 | #define CONFIG_CMD_DHCP | |
90 | #define CONFIG_CMD_NAND | |
1d7442e6 | 91 | #define CONFIG_CMD_SF |
3a49cd7e | 92 | #define CONFIG_CMD_MMC |
f7fa2f37 BS |
93 | |
94 | /* SDRAM */ | |
95 | #define CONFIG_NR_DRAM_BANKS 1 | |
96 | #define CONFIG_SYS_SDRAM_BASE 0x20000000 | |
97 | #define CONFIG_SYS_SDRAM_SIZE 0x08000000 /* 128 megs */ | |
98 | ||
99 | #define CONFIG_SYS_INIT_SP_ADDR \ | |
100 | (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE) | |
101 | ||
102 | /* DataFlash */ | |
1d7442e6 BS |
103 | #ifdef CONFIG_CMD_SF |
104 | #define CONFIG_ATMEL_SPI | |
f7fa2f37 BS |
105 | #define CONFIG_SPI_FLASH |
106 | #define CONFIG_SPI_FLASH_ATMEL | |
1d7442e6 | 107 | #define CONFIG_SF_DEFAULT_SPEED 30000000 |
f7fa2f37 BS |
108 | #endif |
109 | ||
110 | /* no NOR flash */ | |
111 | #define CONFIG_SYS_NO_FLASH | |
112 | ||
113 | /* NAND flash */ | |
114 | #ifdef CONFIG_CMD_NAND | |
115 | #define CONFIG_NAND_ATMEL | |
116 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 | |
117 | #define CONFIG_SYS_NAND_BASE 0x40000000 | |
118 | #define CONFIG_SYS_NAND_DBW_8 1 | |
119 | /* our ALE is AD21 */ | |
120 | #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) | |
121 | /* our CLE is AD22 */ | |
122 | #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) | |
123 | #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4 | |
124 | #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5 | |
125 | ||
df95321c WJ |
126 | /* PMECC & PMERRLOC */ |
127 | #define CONFIG_ATMEL_NAND_HWECC 1 | |
128 | #define CONFIG_ATMEL_NAND_HW_PMECC 1 | |
129 | #define CONFIG_PMECC_CAP 2 | |
130 | #define CONFIG_PMECC_SECTOR_SIZE 512 | |
131 | #define CONFIG_PMECC_INDEX_TABLE_OFFSET 0x8000 | |
132 | ||
f7fa2f37 BS |
133 | #define CONFIG_MTD_DEVICE |
134 | #define CONFIG_CMD_MTDPARTS | |
135 | #define CONFIG_MTD_PARTITIONS | |
136 | #define CONFIG_RBTREE | |
137 | #define CONFIG_LZO | |
138 | #define CONFIG_CMD_UBI | |
139 | #define CONFIG_CMD_UBIFS | |
140 | #endif | |
141 | ||
3a49cd7e WJ |
142 | /* MMC */ |
143 | #ifdef CONFIG_CMD_MMC | |
144 | #define CONFIG_MMC | |
145 | #define CONFIG_CMD_FAT | |
146 | #define CONFIG_GENERIC_MMC | |
147 | #define CONFIG_GENERIC_ATMEL_MCI | |
148 | #define CONFIG_DOS_PARTITION | |
149 | #endif | |
150 | ||
f7fa2f37 BS |
151 | /* Ethernet */ |
152 | #define CONFIG_MACB | |
153 | #define CONFIG_RMII | |
154 | #define CONFIG_NET_RETRY_COUNT 20 | |
155 | #define CONFIG_MACB_SEARCH_PHY | |
156 | ||
157 | #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ | |
158 | ||
159 | #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE | |
160 | #define CONFIG_SYS_MEMTEST_END 0x26e00000 | |
161 | ||
162 | #ifdef CONFIG_SYS_USE_NANDFLASH | |
163 | /* bootstrap + u-boot + env + linux in nandflash */ | |
164 | #define CONFIG_ENV_IS_IN_NAND | |
165 | #define CONFIG_ENV_OFFSET 0xc0000 | |
166 | #define CONFIG_ENV_OFFSET_REDUND 0x100000 | |
167 | #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ | |
168 | #define CONFIG_BOOTCOMMAND "nand read " \ | |
169 | "0x22000000 0x200000 0x300000; " \ | |
170 | "bootm 0x22000000" | |
1d7442e6 BS |
171 | #else |
172 | #ifdef CONFIG_SYS_USE_SPIFLASH | |
173 | /* bootstrap + u-boot + env + linux in spi flash */ | |
174 | #define CONFIG_ENV_IS_IN_SPI_FLASH | |
175 | #define CONFIG_ENV_OFFSET 0x5000 | |
176 | #define CONFIG_ENV_SIZE 0x3000 | |
177 | #define CONFIG_ENV_SECT_SIZE 0x1000 | |
178 | #define CONFIG_ENV_SPI_MAX_HZ 30000000 | |
179 | #define CONFIG_BOOTCOMMAND "sf probe 0; " \ | |
180 | "sf read 0x22000000 0x100000 0x300000; " \ | |
181 | "bootm 0x22000000" | |
182 | #endif | |
f7fa2f37 BS |
183 | #endif |
184 | ||
185 | #define CONFIG_BOOTARGS "mem=128M console=ttyS0,115200 " \ | |
186 | "mtdparts=atmel_nand:" \ | |
187 | "8M(bootstrap/uboot/kernel)ro,-(rootfs) " \ | |
188 | "root=/dev/mtdblock1 rw " \ | |
189 | "rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs" | |
190 | ||
191 | #define CONFIG_BAUDRATE 115200 | |
192 | ||
193 | #define CONFIG_SYS_PROMPT "U-Boot> " | |
194 | #define CONFIG_SYS_CBSIZE 256 | |
195 | #define CONFIG_SYS_MAXARGS 16 | |
196 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) \ | |
197 | + 16) | |
198 | #define CONFIG_SYS_LONGHELP | |
199 | #define CONFIG_CMDLINE_EDITING | |
200 | #define CONFIG_AUTO_COMPLETE | |
201 | #define CONFIG_SYS_HUSH_PARSER | |
202 | ||
203 | /* | |
204 | * Size of malloc() pool | |
205 | */ | |
206 | #define CONFIG_SYS_MALLOC_LEN (512 * 1024 + 0x1000) | |
207 | ||
208 | #ifdef CONFIG_USE_IRQ | |
209 | #error CONFIG_USE_IRQ not supported | |
210 | #endif | |
211 | ||
212 | #endif |