[people/ms/u-boot.git] / include / configs / bf506f-ezkit.h

/*
 * U-Boot - Configuration file for BF506F EZ-Kit board
 */

#ifndef __CONFIG_BF506F_EZKIT_H__
#define __CONFIG_BF506F_EZKIT_H__

#include <asm/config-pre.h>

/*
 * Processor Settings
 */
#define CONFIG_BFIN_CPU             bf506-0.0
#define CONFIG_BFIN_BOOT_MODE       BFIN_BOOT_PARA

/*
 * Clock Settings
 *	CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
 *	SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
 */
/* CONFIG_CLKIN_HZ is any value in Hz					*/
#define CONFIG_CLKIN_HZ			25000000
/* CLKIN_HALF controls the DF bit in PLL_CTL      0 = CLKIN		*/
/*                                                1 = CLKIN / 2		*/
#define CONFIG_CLKIN_HALF		0
/* PLL_BYPASS controls the BYPASS bit in PLL_CTL  0 = do not bypass	*/
/*                                                1 = bypass PLL	*/
#define CONFIG_PLL_BYPASS		0
/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL		*/
/* Values can range from 0-63 (where 0 means 64)			*/
#define CONFIG_VCO_MULT			16
/* CCLK_DIV controls the core clock divider				*/
/* Values can be 1, 2, 4, or 8 ONLY					*/
#define CONFIG_CCLK_DIV			1
/* SCLK_DIV controls the system clock divider				*/
/* Values can range from 1-15						*/
#define CONFIG_SCLK_DIV			5

/*
 * Memory Settings
 */
#define CONFIG_MEM_SIZE		0

#define CONFIG_EBIU_AMGCTL_VAL	(AMCKEN | AMBEN_ALL)
#define CONFIG_EBIU_AMBCTL0_VAL	0xffc2ffc2
#define CONFIG_EBIU_AMBCTL1_VAL	0xffc2ffc2

#define CONFIG_SYS_MONITOR_BASE (L1_DATA_A_SRAM_END)
#define CONFIG_SYS_MONITOR_LEN	(4 * 1024)
#define CONFIG_SYS_MALLOC_LEN	(4 * 1024)

/*
 * Flash Settings
 */
/*
#define CONFIG_FLASH_CFI_DRIVER
#define CONFIG_SYS_FLASH_BASE		0x20000000
#define CONFIG_SYS_FLASH_CFI
#define CONFIG_SYS_MAX_FLASH_BANKS	1
#define CONFIG_SYS_MAX_FLASH_SECT	71
#define CONFIG_MONITOR_IS_IN_RAM
*/
#define CONFIG_SYS_NO_FLASH

/*
 * SPI Settings
 */
#define CONFIG_BFIN_SPI
#define CONFIG_ENV_SPI_MAX_HZ	30000000
#define CONFIG_SF_DEFAULT_SPEED	30000000

/*
 * Env Storage Settings
 */
#define CONFIG_ENV_IS_NOWHERE
#define CONFIG_ENV_SIZE 0x400

/*
 * Misc Settings
 */
#define CONFIG_ICACHE_OFF
#define CONFIG_DCACHE_OFF
#define CONFIG_UART_CONSOLE	0
#define CONFIG_BAUDRATE 115200
#define CONFIG_BFIN_SERIAL

#undef CONFIG_GZIP
#undef CONFIG_ZLIB
#undef CONFIG_BOOTM_RTEMS
#undef CONFIG_BOOTM_LINUX

#endif
Commit	Line	Data
7577aab8	1	/*
a187559e	2	* U-Boot - Configuration file for BF506F EZ-Kit board
7577aab8 MF	3	*/
	4
	5	#ifndef __CONFIG_BF506F_EZKIT_H__
	6	#define __CONFIG_BF506F_EZKIT_H__
	7
	8	#include <asm/config-pre.h>
	9
7577aab8 MF	10	/*
	11	* Processor Settings
	12	*/
	13	#define CONFIG_BFIN_CPU bf506-0.0
	14	#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA
	15
7577aab8 MF	16	/*
	17	* Clock Settings
	18	* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
	19	* SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
	20	*/
	21	/* CONFIG_CLKIN_HZ is any value in Hz */
	22	#define CONFIG_CLKIN_HZ 25000000
	23	/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */
	24	/* 1 = CLKIN / 2 */
	25	#define CONFIG_CLKIN_HALF 0
	26	/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */
	27	/* 1 = bypass PLL */
	28	#define CONFIG_PLL_BYPASS 0
	29	/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */
	30	/* Values can range from 0-63 (where 0 means 64) */
	31	#define CONFIG_VCO_MULT 16
	32	/* CCLK_DIV controls the core clock divider */
	33	/* Values can be 1, 2, 4, or 8 ONLY */
	34	#define CONFIG_CCLK_DIV 1
	35	/* SCLK_DIV controls the system clock divider */
	36	/* Values can range from 1-15 */
	37	#define CONFIG_SCLK_DIV 5
	38
7577aab8 MF	39	/*
	40	* Memory Settings
	41	*/
	42	#define CONFIG_MEM_SIZE 0
	43
	44	#define CONFIG_EBIU_AMGCTL_VAL (AMCKEN \| AMBEN_ALL)
	45	#define CONFIG_EBIU_AMBCTL0_VAL 0xffc2ffc2
	46	#define CONFIG_EBIU_AMBCTL1_VAL 0xffc2ffc2
	47
	48	#define CONFIG_SYS_MONITOR_BASE (L1_DATA_A_SRAM_END)
	49	#define CONFIG_SYS_MONITOR_LEN (4 * 1024)
	50	#define CONFIG_SYS_MALLOC_LEN (4 * 1024)
	51
7577aab8 MF	52	/*
	53	* Flash Settings
	54	*/
c49eabef	55	/*
7577aab8 MF	56	#define CONFIG_FLASH_CFI_DRIVER
	57	#define CONFIG_SYS_FLASH_BASE 0x20000000
	58	#define CONFIG_SYS_FLASH_CFI
	59	#define CONFIG_SYS_MAX_FLASH_BANKS 1
	60	#define CONFIG_SYS_MAX_FLASH_SECT 71
a91eb2c5	61	#define CONFIG_MONITOR_IS_IN_RAM
a2d16908	62	*/
c49eabef	63	#define CONFIG_SYS_NO_FLASH
7577aab8 MF	64
	65	/*
	66	* SPI Settings
	67	*/
	68	#define CONFIG_BFIN_SPI
	69	#define CONFIG_ENV_SPI_MAX_HZ 30000000
	70	#define CONFIG_SF_DEFAULT_SPEED 30000000
7577aab8 MF	71
	72	/*
	73	* Env Storage Settings
	74	*/
	75	#define CONFIG_ENV_IS_NOWHERE
	76	#define CONFIG_ENV_SIZE 0x400
	77
7577aab8 MF	78	/*
	79	* Misc Settings
	80	*/
7577aab8 MF	81	#define CONFIG_ICACHE_OFF
	82	#define CONFIG_DCACHE_OFF
	83	#define CONFIG_UART_CONSOLE 0
	84	#define CONFIG_BAUDRATE 115200
7a58eb96	85	#define CONFIG_BFIN_SERIAL
7577aab8	86
7577aab8 MF	87	#undef CONFIG_GZIP
7577aab8 MF	88	#undef CONFIG_ZLIB
7577aab8 MF	89	#undef CONFIG_BOOTM_RTEMS
	90	#undef CONFIG_BOOTM_LINUX
	91
	92	#endif