projects / people / ms / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 7577aab8 MF |
1 | /* |
| 2 | * U-boot - Configuration file for BF506F EZ-Kit board | |
| 3 | */ | |
| 4 | ||
| 5 | #ifndef __CONFIG_BF506F_EZKIT_H__ | |
| 6 | #define __CONFIG_BF506F_EZKIT_H__ | |
| 7 | ||
| 8 | #include <asm/config-pre.h> | |
| 9 | ||
| 10 | ||
| 11 | /* | |
| 12 | * Processor Settings | |
| 13 | */ | |
| 14 | #define CONFIG_BFIN_CPU bf506-0.0 | |
| 15 | #define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA | |
| 16 | ||
| 17 | ||
| 18 | /* | |
| 19 | * Clock Settings | |
| 20 | * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV | |
| 21 | * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV | |
| 22 | */ | |
| 23 | /* CONFIG_CLKIN_HZ is any value in Hz */ | |
| 24 | #define CONFIG_CLKIN_HZ 25000000 | |
| 25 | /* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */ | |
| 26 | /* 1 = CLKIN / 2 */ | |
| 27 | #define CONFIG_CLKIN_HALF 0 | |
| 28 | /* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */ | |
| 29 | /* 1 = bypass PLL */ | |
| 30 | #define CONFIG_PLL_BYPASS 0 | |
| 31 | /* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */ | |
| 32 | /* Values can range from 0-63 (where 0 means 64) */ | |
| 33 | #define CONFIG_VCO_MULT 16 | |
| 34 | /* CCLK_DIV controls the core clock divider */ | |
| 35 | /* Values can be 1, 2, 4, or 8 ONLY */ | |
| 36 | #define CONFIG_CCLK_DIV 1 | |
| 37 | /* SCLK_DIV controls the system clock divider */ | |
| 38 | /* Values can range from 1-15 */ | |
| 39 | #define CONFIG_SCLK_DIV 5 | |
| 40 | ||
| 41 | ||
| 42 | /* | |
| 43 | * Memory Settings | |
| 44 | */ | |
| 45 | #define CONFIG_MEM_SIZE 0 | |
| 46 | ||
| 47 | #define CONFIG_EBIU_AMGCTL_VAL (AMCKEN | AMBEN_ALL) | |
| 48 | #define CONFIG_EBIU_AMBCTL0_VAL 0xffc2ffc2 | |
| 49 | #define CONFIG_EBIU_AMBCTL1_VAL 0xffc2ffc2 | |
| 50 | ||
| 51 | #define CONFIG_SYS_MONITOR_BASE (L1_DATA_A_SRAM_END) | |
| 52 | #define CONFIG_SYS_MONITOR_LEN (4 * 1024) | |
| 53 | #define CONFIG_SYS_MALLOC_LEN (4 * 1024) | |
| 54 | ||
| 55 | ||
| 56 | /* | |
| 57 | * Flash Settings | |
| 58 | */ | |
| c49eabef | 59 | /* |
| 7577aab8 MF |
60 | #define CONFIG_FLASH_CFI_DRIVER |
| 61 | #define CONFIG_SYS_FLASH_BASE 0x20000000 | |
| 62 | #define CONFIG_SYS_FLASH_CFI | |
| 63 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 | |
| 64 | #define CONFIG_SYS_MAX_FLASH_SECT 71 | |
| 65 | #define CONFIG_CMD_FLASH | |
| a91eb2c5 | 66 | #define CONFIG_MONITOR_IS_IN_RAM |
| a2d16908 | 67 | */ |
| c49eabef | 68 | #define CONFIG_SYS_NO_FLASH |
| 7577aab8 MF |
69 | |
| 70 | /* | |
| 71 | * SPI Settings | |
| 72 | */ | |
| 73 | #define CONFIG_BFIN_SPI | |
| 74 | #define CONFIG_ENV_SPI_MAX_HZ 30000000 | |
| 75 | #define CONFIG_SF_DEFAULT_SPEED 30000000 | |
| a2d16908 | 76 | /* |
| 7577aab8 MF |
77 | #define CONFIG_SPI_FLASH_STMICRO |
| 78 | #define CONFIG_CMD_SF | |
| 79 | #define CONFIG_CMD_SPI | |
| a2d16908 | 80 | */ |
| 7577aab8 MF |
81 | |
| 82 | /* | |
| 83 | * Env Storage Settings | |
| 84 | */ | |
| 85 | #define CONFIG_ENV_IS_NOWHERE | |
| 86 | #define CONFIG_ENV_SIZE 0x400 | |
| 87 | ||
| 88 | ||
| 89 | /* | |
| 90 | * Misc Settings | |
| 91 | */ | |
| 92 | #define CONFIG_BOARD_EARLY_INIT_F | |
| 93 | #define CONFIG_ICACHE_OFF | |
| 94 | #define CONFIG_DCACHE_OFF | |
| 95 | #define CONFIG_UART_CONSOLE 0 | |
| 96 | #define CONFIG_BAUDRATE 115200 | |
| 7a58eb96 | 97 | #define CONFIG_BFIN_SERIAL |
| 7577aab8 MF |
98 | |
| 99 | #define CONFIG_CMD_MEMORY | |
| 100 | #undef CONFIG_GZIP | |
| 101 | #undef CONFIG_ZLIB | |
| 7577aab8 MF |
102 | #undef CONFIG_BOOTM_RTEMS |
| 103 | #undef CONFIG_BOOTM_LINUX | |
| 104 | ||
| 105 | #endif |