[people/ms/u-boot.git] / include / configs / bf506f-ezkit.h

/*
 * U-boot - Configuration file for BF506F EZ-Kit board
 */

#ifndef __CONFIG_BF506F_EZKIT_H__
#define __CONFIG_BF506F_EZKIT_H__

#include <asm/config-pre.h>


/*
 * Processor Settings
 */
#define CONFIG_BFIN_CPU             bf506-0.0
#define CONFIG_BFIN_BOOT_MODE       BFIN_BOOT_PARA


/*
 * Clock Settings
 *	CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
 *	SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
 */
/* CONFIG_CLKIN_HZ is any value in Hz					*/
#define CONFIG_CLKIN_HZ			25000000
/* CLKIN_HALF controls the DF bit in PLL_CTL      0 = CLKIN		*/
/*                                                1 = CLKIN / 2		*/
#define CONFIG_CLKIN_HALF		0
/* PLL_BYPASS controls the BYPASS bit in PLL_CTL  0 = do not bypass	*/
/*                                                1 = bypass PLL	*/
#define CONFIG_PLL_BYPASS		0
/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL		*/
/* Values can range from 0-63 (where 0 means 64)			*/
#define CONFIG_VCO_MULT			16
/* CCLK_DIV controls the core clock divider				*/
/* Values can be 1, 2, 4, or 8 ONLY					*/
#define CONFIG_CCLK_DIV			1
/* SCLK_DIV controls the system clock divider				*/
/* Values can range from 1-15						*/
#define CONFIG_SCLK_DIV			5


/*
 * Memory Settings
 */
#define CONFIG_MEM_SIZE		0

#define CONFIG_EBIU_AMGCTL_VAL	(AMCKEN | AMBEN_ALL)
#define CONFIG_EBIU_AMBCTL0_VAL	0xffc2ffc2
#define CONFIG_EBIU_AMBCTL1_VAL	0xffc2ffc2

#define CONFIG_SYS_MONITOR_BASE (L1_DATA_A_SRAM_END)
#define CONFIG_SYS_MONITOR_LEN	(4 * 1024)
#define CONFIG_SYS_MALLOC_LEN	(4 * 1024)


/*
 * Flash Settings
 */
/*
#define CONFIG_FLASH_CFI_DRIVER
#define CONFIG_SYS_FLASH_BASE		0x20000000
#define CONFIG_SYS_FLASH_CFI
#define CONFIG_SYS_MAX_FLASH_BANKS	1
#define CONFIG_SYS_MAX_FLASH_SECT	71
#define CONFIG_MONITOR_IS_IN_RAM
*/
#define CONFIG_SYS_NO_FLASH

/*
 * SPI Settings
 */
#define CONFIG_BFIN_SPI
#define CONFIG_ENV_SPI_MAX_HZ	30000000
#define CONFIG_SF_DEFAULT_SPEED	30000000
/*
#define CONFIG_SPI_FLASH_STMICRO
#define CONFIG_CMD_SF
#define CONFIG_CMD_SPI
*/

/*
 * Env Storage Settings
 */
#define CONFIG_ENV_IS_NOWHERE
#define CONFIG_ENV_SIZE 0x400


/*
 * Misc Settings
 */
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_ICACHE_OFF
#define CONFIG_DCACHE_OFF
#define CONFIG_UART_CONSOLE	0
#define CONFIG_BAUDRATE 115200
#define CONFIG_BFIN_SERIAL

#undef CONFIG_GZIP
#undef CONFIG_ZLIB
#undef CONFIG_BOOTM_RTEMS
#undef CONFIG_BOOTM_LINUX

#endif
Commit	Line	Data
7577aab8 MF	1	/*
	2	* U-boot - Configuration file for BF506F EZ-Kit board
	3	*/
	4
	5	#ifndef __CONFIG_BF506F_EZKIT_H__
	6	#define __CONFIG_BF506F_EZKIT_H__
	7
	8	#include <asm/config-pre.h>
	9
	10
	11	/*
	12	* Processor Settings
	13	*/
	14	#define CONFIG_BFIN_CPU bf506-0.0
	15	#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA
	16
	17
	18	/*
	19	* Clock Settings
	20	* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
	21	* SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
	22	*/
	23	/* CONFIG_CLKIN_HZ is any value in Hz */
	24	#define CONFIG_CLKIN_HZ 25000000
	25	/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */
	26	/* 1 = CLKIN / 2 */
	27	#define CONFIG_CLKIN_HALF 0
	28	/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */
	29	/* 1 = bypass PLL */
	30	#define CONFIG_PLL_BYPASS 0
	31	/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */
	32	/* Values can range from 0-63 (where 0 means 64) */
	33	#define CONFIG_VCO_MULT 16
	34	/* CCLK_DIV controls the core clock divider */
	35	/* Values can be 1, 2, 4, or 8 ONLY */
	36	#define CONFIG_CCLK_DIV 1
	37	/* SCLK_DIV controls the system clock divider */
	38	/* Values can range from 1-15 */
	39	#define CONFIG_SCLK_DIV 5
	40
	41
	42	/*
	43	* Memory Settings
	44	*/
	45	#define CONFIG_MEM_SIZE 0
	46
	47	#define CONFIG_EBIU_AMGCTL_VAL (AMCKEN \| AMBEN_ALL)
	48	#define CONFIG_EBIU_AMBCTL0_VAL 0xffc2ffc2
	49	#define CONFIG_EBIU_AMBCTL1_VAL 0xffc2ffc2
	50
	51	#define CONFIG_SYS_MONITOR_BASE (L1_DATA_A_SRAM_END)
	52	#define CONFIG_SYS_MONITOR_LEN (4 * 1024)
	53	#define CONFIG_SYS_MALLOC_LEN (4 * 1024)
	54
	55
	56	/*
	57	* Flash Settings
	58	*/
c49eabef	59	/*
7577aab8 MF	60	#define CONFIG_FLASH_CFI_DRIVER
	61	#define CONFIG_SYS_FLASH_BASE 0x20000000
	62	#define CONFIG_SYS_FLASH_CFI
	63	#define CONFIG_SYS_MAX_FLASH_BANKS 1
	64	#define CONFIG_SYS_MAX_FLASH_SECT 71
a91eb2c5	65	#define CONFIG_MONITOR_IS_IN_RAM
a2d16908	66	*/
c49eabef	67	#define CONFIG_SYS_NO_FLASH
7577aab8 MF	68
	69	/*
	70	* SPI Settings
	71	*/
	72	#define CONFIG_BFIN_SPI
	73	#define CONFIG_ENV_SPI_MAX_HZ 30000000
	74	#define CONFIG_SF_DEFAULT_SPEED 30000000
a2d16908	75	/*
7577aab8 MF	76	#define CONFIG_SPI_FLASH_STMICRO
	77	#define CONFIG_CMD_SF
	78	#define CONFIG_CMD_SPI
a2d16908	79	*/
7577aab8 MF	80
	81	/*
	82	* Env Storage Settings
	83	*/
	84	#define CONFIG_ENV_IS_NOWHERE
	85	#define CONFIG_ENV_SIZE 0x400
	86
	87
	88	/*
	89	* Misc Settings
	90	*/
	91	#define CONFIG_BOARD_EARLY_INIT_F
	92	#define CONFIG_ICACHE_OFF
	93	#define CONFIG_DCACHE_OFF
	94	#define CONFIG_UART_CONSOLE 0
	95	#define CONFIG_BAUDRATE 115200
7a58eb96	96	#define CONFIG_BFIN_SERIAL
7577aab8	97
7577aab8 MF	98	#undef CONFIG_GZIP
7577aab8 MF	99	#undef CONFIG_ZLIB
7577aab8 MF	100	#undef CONFIG_BOOTM_RTEMS
	101	#undef CONFIG_BOOTM_LINUX
	102
	103	#endif