[people/ms/u-boot.git] / include / configs / bf537-minotaur.h

/*
 * U-Boot - Configuration file for CSP Minotaur board
 *
 * Thu Oct 25 15:30:44 CEST 2007 <hackfin@section5.ch>
 *    Minotaur config, brushed up for official uClinux dist.
 *    Parallel flash support disabled, SPI flash boot command
 *    added ('run flashboot').
 *
 * Flash image map:
 *
 * 0x00000000      u-boot bootstrap
 * 0x00010000      environment
 * 0x00020000      u-boot code
 * 0x00030000      uImage.initramfs
 *
 */

#ifndef __CONFIG_BF537_MINOTAUR_H__
#define __CONFIG_BF537_MINOTAUR_H__

#include <asm/config-pre.h>

/*
 * Processor Settings
 */
#define CONFIG_BFIN_CPU             bf537-0.2
#define CONFIG_BFIN_BOOT_MODE       BFIN_BOOT_SPI_MASTER

/*
 * Clock Settings
 *	CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
 *	SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
 */
/* CONFIG_CLKIN_HZ is any value in Hz					*/
#define CONFIG_CLKIN_HZ			25000000
/* CLKIN_HALF controls the DF bit in PLL_CTL      0 = CLKIN		*/
/*                                                1 = CLKIN / 2		*/
#define CONFIG_CLKIN_HALF		0
/* PLL_BYPASS controls the BYPASS bit in PLL_CTL  0 = do not bypass	*/
/*                                                1 = bypass PLL	*/
#define CONFIG_PLL_BYPASS		0
/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL		*/
/* Values can range from 0-63 (where 0 means 64)			*/
#define CONFIG_VCO_MULT			20
/* CCLK_DIV controls the core clock divider				*/
/* Values can be 1, 2, 4, or 8 ONLY					*/
#define CONFIG_CCLK_DIV			1
/* SCLK_DIV controls the system clock divider				*/
/* Values can range from 1-15						*/
#define CONFIG_SCLK_DIV			5

/*
 * Memory Settings
 */
#define CONFIG_MEM_SIZE			32
#define CONFIG_MEM_ADD_WDTH		9

#define CONFIG_EBIU_SDRRC_VAL		0x306
#define CONFIG_EBIU_SDGCTL_VAL		0x91114d

#define CONFIG_EBIU_AMGCTL_VAL		0xFF
#define CONFIG_EBIU_AMBCTL0_VAL		0x7BB07BB0
#define CONFIG_EBIU_AMBCTL1_VAL		0xFFC27BB0

#define CONFIG_SYS_MONITOR_LEN		(256 << 10)
#define CONFIG_SYS_MALLOC_LEN		(128 << 10)

/*
 * Network Settings
 */
#ifndef __ADSPBF534__
#define CONFIG_BFIN_MAC
#define CONFIG_NETCONSOLE	1
#endif
#ifdef CONFIG_BFIN_MAC
#define CONFIG_IPADDR		192.168.0.15
#define CONFIG_NETMASK		255.255.255.0
#define CONFIG_GATEWAYIP	192.168.0.1
#define CONFIG_SERVERIP		192.168.0.2
#define CONFIG_HOSTNAME		bf537-minotaur
#endif

#define CONFIG_SYS_AUTOLOAD	"no"
#define CONFIG_ROOTPATH		"/romfs"

/*
 * SPI Settings
 */
#define CONFIG_BFIN_SPI
#define CONFIG_ENV_SPI_MAX_HZ	30000000
#define CONFIG_SF_DEFAULT_SPEED	30000000

/*
 * Env Storage Settings
 */
#define CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_ENV_OFFSET	0x10000
#define CONFIG_ENV_SIZE		0x10000
#define CONFIG_ENV_SECT_SIZE	0x10000
#define CONFIG_ENV_IS_EMBEDDED_IN_LDR

/*
 * I2C settings
 */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_ADI
#define CONFIG_SYS_I2C_SPEED		50000
#define CONFIG_SYS_I2C_SLAVE		0

/*
 * Misc Settings
 */
#define CONFIG_SYS_LONGHELP		1
#define CONFIG_CMDLINE_EDITING	1
#define CONFIG_ENV_OVERWRITE	1

#define CONFIG_UART_CONSOLE	0
#define CONFIG_BFIN_SERIAL

#define CONFIG_PANIC_HANG	1
#define CONFIG_RTC_BFIN		1
#define CONFIG_BOOT_RETRY_TIME	-1
#define CONFIG_LOADS_ECHO		1

#define CONFIG_CMD_BOOTLDR
#define CONFIG_CMD_DATE

#define CONFIG_BOOTCOMMAND	"run ramboot"
#define CONFIG_BOOTARGS	"root=/dev/mtdblock0 rw"

#define BOOT_ENV_SETTINGS \
	"update=tftpboot $(loadaddr) u-boot.ldr;" \
		"sf probe " __stringify(BFIN_BOOT_SPI_SSEL) ";" \
		"sf erase 0 0x30000;" \
		"sf write $(loadaddr) 0 $(filesize)" \
	"flashboot=sf read 0x1000000 0x30000 0x320000;" \
		"bootm 0x1000000\0"
#ifdef CONFIG_BFIN_MAC
# define NETWORK_ENV_SETTINGS \
	"nfsargs=setenv bootargs root=/dev/nfs rw " \
		"nfsroot=$(serverip):$(rootpath)\0" \
	"addip=setenv bootargs $(bootargs) " \
		"ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)" \
		":$(hostname):eth0:off\0" \
	"ramboot=tftpboot $(loadaddr) linux;" \
		"run ramargs;run addip;bootelf\0" \
	"nfsboot=tftpboot $(loadaddr) linux;" \
		"run nfsargs;run addip;bootelf\0"
#else
# define NETWORK_ENV_SETTINGS
#endif
#define CONFIG_EXTRA_ENV_SETTINGS \
	NETWORK_ENV_SETTINGS \
	"ramargs=setenv bootargs " CONFIG_BOOTARGS "\0" \
	BOOT_ENV_SETTINGS

#endif
Commit	Line	Data
d7fdc141	1	/*
a187559e	2	* U-Boot - Configuration file for CSP Minotaur board
d7fdc141 MF	3	*
	4	* Thu Oct 25 15:30:44 CEST 2007 <hackfin@section5.ch>
	5	* Minotaur config, brushed up for official uClinux dist.
	6	* Parallel flash support disabled, SPI flash boot command
	7	* added ('run flashboot').
	8	*
	9	* Flash image map:
	10	*
	11	* 0x00000000 u-boot bootstrap
	12	* 0x00010000 environment
	13	* 0x00020000 u-boot code
	14	* 0x00030000 uImage.initramfs
	15	*
	16	*/
	17
	18	#ifndef __CONFIG_BF537_MINOTAUR_H__
	19	#define __CONFIG_BF537_MINOTAUR_H__
	20
f348ab85	21	#include <asm/config-pre.h>
d7fdc141	22
d7fdc141 MF	23	/*
	24	* Processor Settings
	25	*/
fbcf8e8c	26	#define CONFIG_BFIN_CPU bf537-0.2
d7fdc141 MF	27	#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_SPI_MASTER
d7fdc141 MF	28
d7fdc141 MF	29	/*
	30	* Clock Settings
	31	* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
	32	* SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
	33	*/
	34	/* CONFIG_CLKIN_HZ is any value in Hz */
	35	#define CONFIG_CLKIN_HZ 25000000
	36	/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */
	37	/* 1 = CLKIN / 2 */
	38	#define CONFIG_CLKIN_HALF 0
	39	/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */
	40	/* 1 = bypass PLL */
	41	#define CONFIG_PLL_BYPASS 0
	42	/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */
	43	/* Values can range from 0-63 (where 0 means 64) */
	44	#define CONFIG_VCO_MULT 20
	45	/* CCLK_DIV controls the core clock divider */
	46	/* Values can be 1, 2, 4, or 8 ONLY */
	47	#define CONFIG_CCLK_DIV 1
	48	/* SCLK_DIV controls the system clock divider */
	49	/* Values can range from 1-15 */
	50	#define CONFIG_SCLK_DIV 5
	51
d7fdc141 MF	52	/*
	53	* Memory Settings
	54	*/
	55	#define CONFIG_MEM_SIZE 32
	56	#define CONFIG_MEM_ADD_WDTH 9
	57
	58	#define CONFIG_EBIU_SDRRC_VAL 0x306
	59	#define CONFIG_EBIU_SDGCTL_VAL 0x91114d
	60
	61	#define CONFIG_EBIU_AMGCTL_VAL 0xFF
	62	#define CONFIG_EBIU_AMBCTL0_VAL 0x7BB07BB0
	63	#define CONFIG_EBIU_AMBCTL1_VAL 0xFFC27BB0
	64
	65	#define CONFIG_SYS_MONITOR_LEN (256 << 10)
	66	#define CONFIG_SYS_MALLOC_LEN (128 << 10)
	67
d7fdc141 MF	68	/*
	69	* Network Settings
	70	*/
	71	#ifndef __ADSPBF534__
	72	#define CONFIG_BFIN_MAC
	73	#define CONFIG_NETCONSOLE 1
d7fdc141 MF	74	#endif
	75	#ifdef CONFIG_BFIN_MAC
	76	#define CONFIG_IPADDR 192.168.0.15
	77	#define CONFIG_NETMASK 255.255.255.0
	78	#define CONFIG_GATEWAYIP 192.168.0.1
	79	#define CONFIG_SERVERIP 192.168.0.2
	80	#define CONFIG_HOSTNAME bf537-minotaur
	81	#endif
	82
	83	#define CONFIG_SYS_AUTOLOAD "no"
8b3637c6	84	#define CONFIG_ROOTPATH "/romfs"
d7fdc141	85
d7fdc141 MF	86	/*
	87	* SPI Settings
	88	*/
	89	#define CONFIG_BFIN_SPI
	90	#define CONFIG_ENV_SPI_MAX_HZ 30000000
afac8b07	91	#define CONFIG_SF_DEFAULT_SPEED 30000000
d7fdc141	92
d7fdc141 MF	93	/*
	94	* Env Storage Settings
	95	*/
	96	#define CONFIG_ENV_IS_IN_SPI_FLASH
	97	#define CONFIG_ENV_OFFSET 0x10000
	98	#define CONFIG_ENV_SIZE 0x10000
	99	#define CONFIG_ENV_SECT_SIZE 0x10000
76d82187	100	#define CONFIG_ENV_IS_EMBEDDED_IN_LDR
d7fdc141	101
d7fdc141 MF	102	/*
	103	* I2C settings
	104	*/
c469703b	105	#define CONFIG_SYS_I2C
fea9b69a	106	#define CONFIG_SYS_I2C_ADI
d7fdc141 MF	107	#define CONFIG_SYS_I2C_SPEED 50000
	108	#define CONFIG_SYS_I2C_SLAVE 0
	109
d7fdc141 MF	110	/*
	111	* Misc Settings
	112	*/
	113	#define CONFIG_SYS_LONGHELP 1
	114	#define CONFIG_CMDLINE_EDITING 1
	115	#define CONFIG_ENV_OVERWRITE 1
d7fdc141	116
d7fdc141	117	#define CONFIG_UART_CONSOLE 0
7a58eb96	118	#define CONFIG_BFIN_SERIAL
d7fdc141 MF	119
	120	#define CONFIG_PANIC_HANG 1
	121	#define CONFIG_RTC_BFIN 1
	122	#define CONFIG_BOOT_RETRY_TIME -1
	123	#define CONFIG_LOADS_ECHO 1
	124
d7fdc141	125	#define CONFIG_CMD_BOOTLDR
d7fdc141	126	#define CONFIG_CMD_DATE
d7fdc141 MF	127
	128	#define CONFIG_BOOTCOMMAND "run ramboot"
	129	#define CONFIG_BOOTARGS "root=/dev/mtdblock0 rw"
d7fdc141 MF	130
	131	#define BOOT_ENV_SETTINGS \
	132	"update=tftpboot $(loadaddr) u-boot.ldr;" \
5368c55d	133	"sf probe " __stringify(BFIN_BOOT_SPI_SSEL) ";" \
d7fdc141 MF	134	"sf erase 0 0x30000;" \
	135	"sf write $(loadaddr) 0 $(filesize)" \
	136	"flashboot=sf read 0x1000000 0x30000 0x320000;" \
	137	"bootm 0x1000000\0"
	138	#ifdef CONFIG_BFIN_MAC
	139	# define NETWORK_ENV_SETTINGS \
	140	"nfsargs=setenv bootargs root=/dev/nfs rw " \
	141	"nfsroot=$(serverip):$(rootpath)\0" \
	142	"addip=setenv bootargs $(bootargs) " \
	143	"ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)" \
	144	":$(hostname):eth0:off\0" \
	145	"ramboot=tftpboot $(loadaddr) linux;" \
	146	"run ramargs;run addip;bootelf\0" \
	147	"nfsboot=tftpboot $(loadaddr) linux;" \
	148	"run nfsargs;run addip;bootelf\0"
	149	#else
	150	# define NETWORK_ENV_SETTINGS
	151	#endif
	152	#define CONFIG_EXTRA_ENV_SETTINGS \
	153	NETWORK_ENV_SETTINGS \
	154	"ramargs=setenv bootargs " CONFIG_BOOTARGS "\0" \
	155	BOOT_ENV_SETTINGS
	156
d7fdc141	157	#endif