]>
Commit | Line | Data |
---|---|---|
59ac9729 | 1 | /* |
a187559e | 2 | * U-Boot - Configuration file for CSP Minotaur board |
59ac9729 MF |
3 | * |
4 | * Thu Oct 25 15:30:44 CEST 2007 <hackfin@section5.ch> | |
5 | * Minotaur config, brushed up for official uClinux dist. | |
6 | * Parallel flash support disabled, SPI flash boot command | |
7 | * added ('run flashboot'). | |
8 | * | |
9 | * Flash image map: | |
10 | * | |
11 | * 0x00000000 u-boot bootstrap | |
12 | * 0x00010000 environment | |
13 | * 0x00020000 u-boot code | |
14 | * 0x00030000 uImage.initramfs | |
15 | * | |
16 | */ | |
17 | ||
18 | #ifndef __CONFIG_BF537_SRV1_H__ | |
19 | #define __CONFIG_BF537_SRV1_H__ | |
20 | ||
f348ab85 | 21 | #include <asm/config-pre.h> |
59ac9729 | 22 | |
59ac9729 MF |
23 | /* |
24 | * Processor Settings | |
25 | */ | |
fbcf8e8c | 26 | #define CONFIG_BFIN_CPU bf537-0.2 |
59ac9729 MF |
27 | #define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_SPI_MASTER |
28 | ||
59ac9729 MF |
29 | /* |
30 | * Clock Settings | |
31 | * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV | |
32 | * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV | |
33 | */ | |
34 | /* CONFIG_CLKIN_HZ is any value in Hz */ | |
35 | #define CONFIG_CLKIN_HZ 22118400 | |
36 | /* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */ | |
37 | /* 1 = CLKIN / 2 */ | |
38 | #define CONFIG_CLKIN_HALF 0 | |
39 | /* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */ | |
40 | /* 1 = bypass PLL */ | |
41 | #define CONFIG_PLL_BYPASS 0 | |
42 | /* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */ | |
43 | /* Values can range from 0-63 (where 0 means 64) */ | |
44 | #define CONFIG_VCO_MULT 20 | |
45 | /* CCLK_DIV controls the core clock divider */ | |
46 | /* Values can be 1, 2, 4, or 8 ONLY */ | |
47 | #define CONFIG_CCLK_DIV 1 | |
48 | /* SCLK_DIV controls the system clock divider */ | |
49 | /* Values can range from 1-15 */ | |
50 | #define CONFIG_SCLK_DIV 5 | |
51 | ||
59ac9729 MF |
52 | /* |
53 | * Memory Settings | |
54 | */ | |
55 | #define CONFIG_MEM_SIZE 32 | |
56 | #define CONFIG_MEM_ADD_WDTH 9 | |
57 | ||
58 | #define CONFIG_EBIU_SDRRC_VAL 0x2ac | |
59 | #define CONFIG_EBIU_SDGCTL_VAL 0x91110d | |
60 | ||
61 | #define CONFIG_EBIU_AMGCTL_VAL 0xFF | |
62 | #define CONFIG_EBIU_AMBCTL0_VAL 0x7BB07BB0 | |
63 | #define CONFIG_EBIU_AMBCTL1_VAL 0xFFC27BB0 | |
64 | ||
65 | #define CONFIG_SYS_MONITOR_LEN (256 << 10) | |
66 | #define CONFIG_SYS_MALLOC_LEN (384 << 10) | |
67 | ||
59ac9729 MF |
68 | /* |
69 | * Network Settings | |
70 | */ | |
71 | #ifndef __ADSPBF534__ | |
72 | #define CONFIG_BFIN_MAC | |
73 | #define CONFIG_NETCONSOLE 1 | |
59ac9729 MF |
74 | #endif |
75 | #ifdef CONFIG_BFIN_MAC | |
76 | #define CONFIG_IPADDR 192.168.0.15 | |
77 | #define CONFIG_NETMASK 255.255.255.0 | |
78 | #define CONFIG_GATEWAYIP 192.168.0.1 | |
79 | #define CONFIG_SERVERIP 192.168.0.2 | |
80 | #define CONFIG_HOSTNAME bf537-srv1 | |
81 | #endif | |
82 | ||
83 | #define CONFIG_SYS_AUTOLOAD "no" | |
8b3637c6 | 84 | #define CONFIG_ROOTPATH "/romfs" |
59ac9729 | 85 | |
59ac9729 MF |
86 | /* |
87 | * SPI Settings | |
88 | */ | |
89 | #define CONFIG_BFIN_SPI | |
90 | #define CONFIG_ENV_SPI_MAX_HZ 30000000 | |
afac8b07 | 91 | #define CONFIG_SF_DEFAULT_SPEED 30000000 |
59ac9729 | 92 | |
59ac9729 MF |
93 | /* |
94 | * Env Storage Settings | |
95 | */ | |
96 | #define CONFIG_ENV_IS_IN_SPI_FLASH | |
97 | #define CONFIG_ENV_OFFSET 0x10000 | |
98 | #define CONFIG_ENV_SIZE 0x10000 | |
99 | #define CONFIG_ENV_SECT_SIZE 0x10000 | |
76d82187 | 100 | #define CONFIG_ENV_IS_EMBEDDED_IN_LDR |
59ac9729 | 101 | |
59ac9729 MF |
102 | /* |
103 | * I2C settings | |
104 | */ | |
c469703b | 105 | #define CONFIG_SYS_I2C |
fea9b69a | 106 | #define CONFIG_SYS_I2C_ADI |
59ac9729 MF |
107 | #define CONFIG_SYS_I2C_SPEED 50000 |
108 | #define CONFIG_SYS_I2C_SLAVE 0 | |
109 | ||
59ac9729 MF |
110 | /* |
111 | * Misc Settings | |
112 | */ | |
113 | #define CONFIG_SYS_LONGHELP 1 | |
114 | #define CONFIG_CMDLINE_EDITING 1 | |
115 | #define CONFIG_ENV_OVERWRITE 1 | |
59ac9729 MF |
116 | |
117 | #define CONFIG_BAUDRATE 115200 | |
118 | #define CONFIG_UART_CONSOLE 0 | |
7a58eb96 | 119 | #define CONFIG_BFIN_SERIAL |
59ac9729 MF |
120 | |
121 | #define CONFIG_PANIC_HANG 1 | |
122 | #define CONFIG_RTC_BFIN 1 | |
123 | #define CONFIG_BOOT_RETRY_TIME -1 | |
124 | #define CONFIG_LOADS_ECHO 1 | |
125 | ||
59ac9729 | 126 | #define CONFIG_CMD_BOOTLDR |
59ac9729 | 127 | #define CONFIG_CMD_DATE |
59ac9729 MF |
128 | |
129 | #define CONFIG_BOOTCOMMAND "run flashboot" | |
130 | #define CONFIG_BOOTARGS "root=/dev/mtdblock0 rw" | |
59ac9729 MF |
131 | |
132 | #define BOOT_ENV_SETTINGS \ | |
133 | "update=tftpboot $(loadaddr) u-boot.ldr;" \ | |
5368c55d | 134 | "sf probe " __stringify(BFIN_BOOT_SPI_SSEL) ";" \ |
59ac9729 MF |
135 | "sf erase 0 0x30000;" \ |
136 | "sf write $(loadaddr) 0 $(filesize)" \ | |
137 | "flashboot=sf read 0x1000000 0x30000 0x320000;" \ | |
138 | "bootm 0x1000000\0" | |
139 | #ifdef CONFIG_BFIN_MAC | |
140 | # define NETWORK_ENV_SETTINGS \ | |
141 | "nfsargs=setenv bootargs root=/dev/nfs rw " \ | |
142 | "nfsroot=$(serverip):$(rootpath)\0" \ | |
143 | "addip=setenv bootargs $(bootargs) " \ | |
144 | "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)" \ | |
145 | ":$(hostname):eth0:off\0" \ | |
146 | "ramboot=tftpboot $(loadaddr) linux;" \ | |
147 | "run ramargs;run addip;bootelf\0" \ | |
148 | "nfsboot=tftpboot $(loadaddr) linux;" \ | |
149 | "run nfsargs;run addip;bootelf\0" | |
150 | #else | |
151 | # define NETWORK_ENV_SETTINGS | |
152 | #endif | |
153 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
154 | NETWORK_ENV_SETTINGS \ | |
155 | "ramargs=setenv bootargs " CONFIG_BOOTARGS "\0" \ | |
156 | BOOT_ENV_SETTINGS | |
157 | ||
59ac9729 | 158 | #endif |