[people/ms/u-boot.git] / include / configs / cm_fx6.h

/*
 * Config file for Compulab CM-FX6 board
 *
 * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/
 *
 * Author: Nikita Kiryanov <nikita@compulab.co.il>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_CM_FX6_H
#define __CONFIG_CM_FX6_H

#include <asm/arch/imx-regs.h>
#include <config_distro_defaults.h>
#include "mx6_common.h"

/* Machine config */
#define CONFIG_MX6
#define CONFIG_SYS_LITTLE_ENDIAN
#define CONFIG_MACH_TYPE		4273

#ifndef CONFIG_SPL_BUILD
#define CONFIG_DM
#define CONFIG_CMD_DM

#define CONFIG_DM_GPIO
#define CONFIG_CMD_GPIO

#define CONFIG_DM_SERIAL
#define CONFIG_SYS_MALLOC_F_LEN		(1 << 10)
#endif

/* Display information on boot */
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_TIMESTAMP

/* CMD */
#include <config_cmd_default.h>
#define CONFIG_CMD_GREPENV
#undef CONFIG_CMD_FLASH
#undef CONFIG_CMD_LOADB
#undef CONFIG_CMD_LOADS
#undef CONFIG_CMD_XIMG
#undef CONFIG_CMD_FPGA
#undef CONFIG_CMD_IMLS

/* MMC */
#define CONFIG_MMC
#define CONFIG_CMD_MMC
#define CONFIG_GENERIC_MMC
#define CONFIG_FSL_ESDHC
#define CONFIG_FSL_USDHC
#define CONFIG_SYS_FSL_USDHC_NUM	3
#define CONFIG_SYS_FSL_ESDHC_ADDR	USDHC2_BASE_ADDR

/* RAM */
#define PHYS_SDRAM_1			MMDC0_ARB_BASE_ADDR
#define PHYS_SDRAM_2			MMDC1_ARB_BASE_ADDR
#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
#define CONFIG_NR_DRAM_BANKS		2
#define CONFIG_SYS_MEMTEST_START	0x10000000
#define CONFIG_SYS_MEMTEST_END		0x10010000
#define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
#define CONFIG_SYS_INIT_SP_OFFSET \
	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)

/* Serial console */
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE		UART4_BASE
#define CONFIG_BAUDRATE			115200
#define CONFIG_SYS_BAUDRATE_TABLE	{9600, 19200, 38400, 57600, 115200}

/* Shell */
#define CONFIG_SYS_PROMPT	"CM-FX6 # "
#define CONFIG_SYS_CBSIZE	1024
#define CONFIG_SYS_MAXARGS	16
#define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE
#define CONFIG_SYS_PBSIZE	(CONFIG_SYS_CBSIZE + \
					sizeof(CONFIG_SYS_PROMPT) + 16)

/* SPI flash */
#define CONFIG_SYS_NO_FLASH
#define CONFIG_CMD_SF
#define CONFIG_SF_DEFAULT_BUS		0
#define CONFIG_SF_DEFAULT_CS		0
#define CONFIG_SF_DEFAULT_SPEED		25000000
#define CONFIG_SF_DEFAULT_MODE		(SPI_MODE_0)

/* Environment */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_ENV_SPI_MAX_HZ		CONFIG_SF_DEFAULT_SPEED
#define CONFIG_ENV_SPI_MODE		CONFIG_SF_DEFAULT_MODE
#define CONFIG_ENV_SPI_BUS		CONFIG_SF_DEFAULT_BUS
#define CONFIG_ENV_SPI_CS		CONFIG_SF_DEFAULT_CS
#define CONFIG_ENV_SECT_SIZE		(64 * 1024)
#define CONFIG_ENV_SIZE			(8 * 1024)
#define CONFIG_ENV_OFFSET		(768 * 1024)

#define CONFIG_EXTRA_ENV_SETTINGS \
	"autoload=no\0" \
	"kernel=uImage-cm-fx6\0" \
	"script=boot.scr\0" \
	"dtb=cm-fx6.dtb\0" \
	"bootm_low=18000000\0" \
	"loadaddr=0x10800000\0" \
	"fdtaddr=0x11000000\0" \
	"console=ttymxc3,115200\0" \
	"ethprime=FEC0\0" \
	"video_hdmi=mxcfb0:dev=hdmi,1920x1080M-32@50,if=RGB32\0" \
	"video_dvi=mxcfb0:dev=dvi,1280x800M-32@50,if=RGB32\0" \
	"doboot=bootm ${loadaddr}\0" \
	"doloadfdt=false\0" \
	"setboottypez=setenv kernel zImage-cm-fx6;" \
		"setenv doboot bootz ${loadaddr} - ${fdtaddr};" \
		"setenv doloadfdt true;\0" \
	"setboottypem=setenv kernel uImage-cm-fx6;" \
		"setenv doboot bootm ${loadaddr};" \
		"setenv doloadfdt false;\0"\
	"mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
	"sataroot=/dev/sda2 rw rootwait\0" \
	"nandroot=/dev/mtdblock4 rw\0" \
	"nandrootfstype=ubifs\0" \
	"mmcargs=setenv bootargs console=${console} root=${mmcroot} " \
		"${video}\0" \
	"sataargs=setenv bootargs console=${console} root=${sataroot} " \
		"${video}\0" \
	"nandargs=setenv bootargs console=${console} " \
		"root=${nandroot} " \
		"rootfstype=${nandrootfstype} " \
		"${video}\0" \
	"nandboot=if run nandloadkernel; then " \
			"run nandloadfdt;" \
			"run setboottypem;" \
			"run storagebootcmd;" \
			"run setboottypez;" \
			"run storagebootcmd;" \
		"fi;\0" \
	"run_eboot=echo Starting EBOOT ...; "\
		"mmc dev 2 && " \
		"mmc rescan && mmc read 10042000 a 400 && go 10042000\0" \
	"loadscript=load ${storagetype} ${storagedev} ${loadaddr} ${script};\0"\
	"loadkernel=load ${storagetype} ${storagedev} ${loadaddr} ${kernel};\0"\
	"loadfdt=load ${storagetype} ${storagedev} ${fdtaddr} ${dtb};\0" \
	"bootscript=echo Running bootscript from ${storagetype} ...;" \
		   "source ${loadaddr};\0" \
	"nandloadkernel=nand read ${loadaddr} 0 780000;\0" \
	"nandloadfdt=nand read ${fdtaddr} 780000 80000;\0" \
	"setupmmcboot=setenv storagetype mmc; setenv storagedev 2;\0" \
	"setupsataboot=setenv storagetype sata; setenv storagedev 0;\0" \
	"setupnandboot=setenv storagetype nand;\0" \
	"setupusbboot=setenv storagetype usb; setenv storagedev 0;\0" \
	"storagebootcmd=echo Booting from ${storagetype} ...;" \
			"run ${storagetype}args; run doboot;\0" \
	"trybootk=if run loadkernel; then " \
		"if ${doloadfdt}; then " \
			"run loadfdt;" \
		"fi;" \
		"run storagebootcmd;" \
		"fi;\0" \
	"trybootsmz=if run loadscript; then " \
			"run bootscript;" \
		"fi;" \
		"run setboottypem;" \
		"run trybootk;" \
		"run setboottypez;" \
		"run trybootk;\0"

#define CONFIG_BOOTCOMMAND \
	"run setupmmcboot;" \
	"mmc dev ${storagedev};" \
	"if mmc rescan; then " \
		"run trybootsmz;" \
	"fi;" \
	"run setupusbboot;" \
	"if usb start; then "\
		"if run loadscript; then " \
			"run bootscript;" \
		"fi;" \
	"fi;" \
	"run setupsataboot;" \
	"if sata init; then " \
		"run trybootsmz;" \
	"fi;" \
	"run setupnandboot;" \
	"run nandboot;"

/* SPI */
#define CONFIG_SPI
#define CONFIG_MXC_SPI
#define CONFIG_SPI_FLASH
#define CONFIG_SPI_FLASH_ATMEL
#define CONFIG_SPI_FLASH_EON
#define CONFIG_SPI_FLASH_GIGADEVICE
#define CONFIG_SPI_FLASH_MACRONIX
#define CONFIG_SPI_FLASH_SPANSION
#define CONFIG_SPI_FLASH_STMICRO
#define CONFIG_SPI_FLASH_SST
#define CONFIG_SPI_FLASH_WINBOND

/* NAND */
#ifndef CONFIG_SPL_BUILD
#define CONFIG_CMD_NAND
#define CONFIG_SYS_NAND_BASE		0x40000000
#define CONFIG_SYS_NAND_MAX_CHIPS	1
#define CONFIG_SYS_MAX_NAND_DEVICE	1
#define CONFIG_NAND_MXS
#define CONFIG_SYS_NAND_ONFI_DETECTION
/* APBH DMA is required for NAND support */
#define CONFIG_APBH_DMA
#define CONFIG_APBH_DMA_BURST
#define CONFIG_APBH_DMA_BURST8
#endif

/* Ethernet */
#define CONFIG_FEC_MXC
#define CONFIG_FEC_MXC_PHYADDR		0
#define CONFIG_FEC_XCV_TYPE		RGMII
#define IMX_FEC_BASE			ENET_BASE_ADDR
#define CONFIG_PHYLIB
#define CONFIG_PHY_ATHEROS
#define CONFIG_MII
#define CONFIG_ETHPRIME			"FEC0"
#define CONFIG_ARP_TIMEOUT		200UL
#define CONFIG_NET_RETRY_COUNT		5

/* USB */
#define CONFIG_CMD_USB
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_MX6
#define CONFIG_USB_STORAGE
#define CONFIG_MXC_USB_PORTSC		(PORT_PTS_UTMI | PORT_PTS_PTW)
#define CONFIG_MXC_USB_FLAGS		0
#define CONFIG_USB_MAX_CONTROLLER_COUNT	2
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET	/* For OTG port */

/* I2C */
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_SPEED		100000
#define CONFIG_SYS_MXC_I2C3_SPEED	400000

#define CONFIG_SYS_I2C_EEPROM_ADDR	0x50
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	1
#define CONFIG_SYS_I2C_EEPROM_BUS	2

/* SATA */
#define CONFIG_CMD_SATA
#define CONFIG_SYS_SATA_MAX_DEVICE	1
#define CONFIG_LIBATA
#define CONFIG_LBA48
#define CONFIG_DWC_AHSATA
#define CONFIG_DWC_AHSATA_PORT_ID	0
#define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_ARB_BASE_ADDR

/* GPIO */
#define CONFIG_MXC_GPIO

/* Boot */
#define CONFIG_ZERO_BOOTDELAY_CHECK
#define CONFIG_LOADADDR			0x10800000
#define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
#define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
#define CONFIG_SYS_BOOTMAPSZ	        (8 << 20)
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_REVISION_TAG
#define CONFIG_SERIAL_TAG

/* misc */
#define CONFIG_SYS_GENERIC_BOARD
#define CONFIG_STACKSIZE			(128 * 1024)
#define CONFIG_SYS_MALLOC_LEN			(10 * 1024 * 1024)
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	800 /* 400 KB */
#define CONFIG_OF_BOARD_SETUP

/* SPL */
#include "imx6_spl.h"
#define CONFIG_SPL_BOARD_INIT
#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x80 /* offset 64 kb */
#define CONFIG_SYS_MONITOR_LEN	(CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS / 2 * 1024)
#define CONFIG_SPL_SPI_SUPPORT
#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SYS_SPI_U_BOOT_OFFS	(64 * 1024)
#define CONFIG_SPL_SPI_LOAD

#endif	/* __CONFIG_CM_FX6_H */
Commit	Line	Data
e32028a7 NK	1	/*
	2	* Config file for Compulab CM-FX6 board
	3	*
	4	* Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/
	5	*
	6	* Author: Nikita Kiryanov <nikita@compulab.co.il>
	7	*
	8	* SPDX-License-Identifier: GPL-2.0+
	9	*/
	10
	11	#ifndef __CONFIG_CM_FX6_H
	12	#define __CONFIG_CM_FX6_H
	13
	14	#include <asm/arch/imx-regs.h>
	15	#include <config_distro_defaults.h>
	16	#include "mx6_common.h"
	17
	18	/* Machine config */
	19	#define CONFIG_MX6
	20	#define CONFIG_SYS_LITTLE_ENDIAN
	21	#define CONFIG_MACH_TYPE 4273
e32028a7	22
3f0e935f SG	23	#ifndef CONFIG_SPL_BUILD
	24	#define CONFIG_DM
	25	#define CONFIG_CMD_DM
	26
	27	#define CONFIG_DM_GPIO
	28	#define CONFIG_CMD_GPIO
	29
	30	#define CONFIG_DM_SERIAL
	31	#define CONFIG_SYS_MALLOC_F_LEN (1 << 10)
	32	#endif
	33
e32028a7 NK	34	/* Display information on boot */
	35	#define CONFIG_DISPLAY_CPUINFO
	36	#define CONFIG_DISPLAY_BOARDINFO
	37	#define CONFIG_TIMESTAMP
	38
	39	/* CMD */
	40	#include <config_cmd_default.h>
	41	#define CONFIG_CMD_GREPENV
	42	#undef CONFIG_CMD_FLASH
	43	#undef CONFIG_CMD_LOADB
	44	#undef CONFIG_CMD_LOADS
	45	#undef CONFIG_CMD_XIMG
	46	#undef CONFIG_CMD_FPGA
	47	#undef CONFIG_CMD_IMLS
e32028a7 NK	48
	49	/* MMC */
	50	#define CONFIG_MMC
	51	#define CONFIG_CMD_MMC
	52	#define CONFIG_GENERIC_MMC
	53	#define CONFIG_FSL_ESDHC
	54	#define CONFIG_FSL_USDHC
	55	#define CONFIG_SYS_FSL_USDHC_NUM 3
	56	#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
	57
	58	/* RAM */
	59	#define PHYS_SDRAM_1 MMDC0_ARB_BASE_ADDR
	60	#define PHYS_SDRAM_2 MMDC1_ARB_BASE_ADDR
	61	#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
	62	#define CONFIG_NR_DRAM_BANKS 2
	63	#define CONFIG_SYS_MEMTEST_START 0x10000000
	64	#define CONFIG_SYS_MEMTEST_END 0x10010000
	65	#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
	66	#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
	67	#define CONFIG_SYS_INIT_SP_OFFSET \
	68	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
	69	#define CONFIG_SYS_INIT_SP_ADDR \
	70	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
	71
	72	/* Serial console */
	73	#define CONFIG_MXC_UART
	74	#define CONFIG_MXC_UART_BASE UART4_BASE
	75	#define CONFIG_BAUDRATE 115200
	76	#define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
	77
	78	/* Shell */
	79	#define CONFIG_SYS_PROMPT "CM-FX6 # "
	80	#define CONFIG_SYS_CBSIZE 1024
	81	#define CONFIG_SYS_MAXARGS 16
	82	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
	83	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
	84	sizeof(CONFIG_SYS_PROMPT) + 16)
	85
	86	/* SPI flash */
	87	#define CONFIG_SYS_NO_FLASH
	88	#define CONFIG_CMD_SF
	89	#define CONFIG_SF_DEFAULT_BUS 0
	90	#define CONFIG_SF_DEFAULT_CS 0
	91	#define CONFIG_SF_DEFAULT_SPEED 25000000
	92	#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
	93
	94	/* Environment */
	95	#define CONFIG_ENV_OVERWRITE
	96	#define CONFIG_ENV_IS_IN_SPI_FLASH
	97	#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
	98	#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
	99	#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
	100	#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
	101	#define CONFIG_ENV_SECT_SIZE (64 * 1024)
	102	#define CONFIG_ENV_SIZE (8 * 1024)
	103	#define CONFIG_ENV_OFFSET (768 * 1024)
	104
	105	#define CONFIG_EXTRA_ENV_SETTINGS \
e32028a7	106	"autoload=no\0" \
508a6ede NK	107	"kernel=uImage-cm-fx6\0" \
	108	"script=boot.scr\0" \
	109	"dtb=cm-fx6.dtb\0" \
	110	"bootm_low=18000000\0" \
e32028a7 NK	111	"loadaddr=0x10800000\0" \
	112	"fdtaddr=0x11000000\0" \
	113	"console=ttymxc3,115200\0" \
	114	"ethprime=FEC0\0" \
e32028a7 NK	115	"video_hdmi=mxcfb0:dev=hdmi,1920x1080M-32@50,if=RGB32\0" \
e32028a7 NK	116	"video_dvi=mxcfb0:dev=dvi,1280x800M-32@50,if=RGB32\0" \
e32028a7	117	"doboot=bootm ${loadaddr}\0" \
508a6ede	118	"doloadfdt=false\0" \
e32028a7 NK	119	"setboottypez=setenv kernel zImage-cm-fx6;" \
e32028a7 NK	120	"setenv doboot bootz ${loadaddr} - ${fdtaddr};" \
508a6ede	121	"setenv doloadfdt true;\0" \
e32028a7 NK	122	"setboottypem=setenv kernel uImage-cm-fx6;" \
e32028a7 NK	123	"setenv doboot bootm ${loadaddr};" \
508a6ede	124	"setenv doloadfdt false;\0"\
e32028a7	125	"mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
206f38f7	126	"sataroot=/dev/sda2 rw rootwait\0" \
a6b0652b NK	127	"nandroot=/dev/mtdblock4 rw\0" \
a6b0652b NK	128	"nandrootfstype=ubifs\0" \
508a6ede NK	129	"mmcargs=setenv bootargs console=${console} root=${mmcroot} " \
	130	"${video}\0" \
	131	"sataargs=setenv bootargs console=${console} root=${sataroot} " \
	132	"${video}\0" \
a6b0652b NK	133	"nandargs=setenv bootargs console=${console} " \
	134	"root=${nandroot} " \
	135	"rootfstype=${nandrootfstype} " \
	136	"${video}\0" \
508a6ede	137	"nandboot=if run nandloadkernel; then " \
a6b0652b	138	"run nandloadfdt;" \
508a6ede NK	139	"run setboottypem;" \
	140	"run storagebootcmd;" \
	141	"run setboottypez;" \
	142	"run storagebootcmd;" \
	143	"fi;\0" \
	144	"run_eboot=echo Starting EBOOT ...; "\
	145	"mmc dev 2 && " \
	146	"mmc rescan && mmc read 10042000 a 400 && go 10042000\0" \
	147	"loadscript=load ${storagetype} ${storagedev} ${loadaddr} ${script};\0"\
	148	"loadkernel=load ${storagetype} ${storagedev} ${loadaddr} ${kernel};\0"\
	149	"loadfdt=load ${storagetype} ${storagedev} ${fdtaddr} ${dtb};\0" \
	150	"bootscript=echo Running bootscript from ${storagetype} ...;" \
	151	"source ${loadaddr};\0" \
	152	"nandloadkernel=nand read ${loadaddr} 0 780000;\0" \
	153	"nandloadfdt=nand read ${fdtaddr} 780000 80000;\0" \
	154	"setupmmcboot=setenv storagetype mmc; setenv storagedev 2;\0" \
	155	"setupsataboot=setenv storagetype sata; setenv storagedev 0;\0" \
	156	"setupnandboot=setenv storagetype nand;\0" \
	157	"setupusbboot=setenv storagetype usb; setenv storagedev 0;\0" \
	158	"storagebootcmd=echo Booting from ${storagetype} ...;" \
	159	"run ${storagetype}args; run doboot;\0" \
	160	"trybootk=if run loadkernel; then " \
	161	"if ${doloadfdt}; then " \
	162	"run loadfdt;" \
a6b0652b	163	"fi;" \
508a6ede NK	164	"run storagebootcmd;" \
	165	"fi;\0" \
	166	"trybootsmz=if run loadscript; then " \
	167	"run bootscript;" \
206f38f7	168	"fi;" \
508a6ede NK	169	"run setboottypem;" \
	170	"run trybootk;" \
	171	"run setboottypez;" \
	172	"run trybootk;\0"
e32028a7 NK	173
e32028a7 NK	174	#define CONFIG_BOOTCOMMAND \
508a6ede NK	175	"run setupmmcboot;" \
	176	"mmc dev ${storagedev};" \
	177	"if mmc rescan; then " \
	178	"run trybootsmz;" \
	179	"fi;" \
	180	"run setupusbboot;" \
	181	"if usb start; then "\
	182	"if run loadscript; then " \
	183	"run bootscript;" \
	184	"fi;" \
	185	"fi;" \
	186	"run setupsataboot;" \
	187	"if sata init; then " \
	188	"run trybootsmz;" \
	189	"fi;" \
	190	"run setupnandboot;" \
	191	"run nandboot;"
e32028a7 NK	192
	193	/* SPI */
	194	#define CONFIG_SPI
	195	#define CONFIG_MXC_SPI
	196	#define CONFIG_SPI_FLASH
	197	#define CONFIG_SPI_FLASH_ATMEL
	198	#define CONFIG_SPI_FLASH_EON
	199	#define CONFIG_SPI_FLASH_GIGADEVICE
	200	#define CONFIG_SPI_FLASH_MACRONIX
	201	#define CONFIG_SPI_FLASH_SPANSION
	202	#define CONFIG_SPI_FLASH_STMICRO
	203	#define CONFIG_SPI_FLASH_SST
	204	#define CONFIG_SPI_FLASH_WINBOND
	205
a6b0652b NK	206	/* NAND */
	207	#ifndef CONFIG_SPL_BUILD
	208	#define CONFIG_CMD_NAND
	209	#define CONFIG_SYS_NAND_BASE 0x40000000
	210	#define CONFIG_SYS_NAND_MAX_CHIPS 1
	211	#define CONFIG_SYS_MAX_NAND_DEVICE 1
	212	#define CONFIG_NAND_MXS
	213	#define CONFIG_SYS_NAND_ONFI_DETECTION
	214	/* APBH DMA is required for NAND support */
	215	#define CONFIG_APBH_DMA
	216	#define CONFIG_APBH_DMA_BURST
	217	#define CONFIG_APBH_DMA_BURST8
	218	#endif
	219
02b1343e NK	220	/* Ethernet */
	221	#define CONFIG_FEC_MXC
	222	#define CONFIG_FEC_MXC_PHYADDR 0
	223	#define CONFIG_FEC_XCV_TYPE RGMII
	224	#define IMX_FEC_BASE ENET_BASE_ADDR
	225	#define CONFIG_PHYLIB
	226	#define CONFIG_PHY_ATHEROS
	227	#define CONFIG_MII
	228	#define CONFIG_ETHPRIME "FEC0"
	229	#define CONFIG_ARP_TIMEOUT 200UL
02b1343e NK	230	#define CONFIG_NET_RETRY_COUNT 5
02b1343e NK	231
0f3effb9 NK	232	/* USB */
	233	#define CONFIG_CMD_USB
	234	#define CONFIG_USB_EHCI
	235	#define CONFIG_USB_EHCI_MX6
	236	#define CONFIG_USB_STORAGE
	237	#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI \| PORT_PTS_PTW)
	238	#define CONFIG_MXC_USB_FLAGS 0
	239	#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
	240	#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
	241
f42b2f60 NK	242	/* I2C */
	243	#define CONFIG_CMD_I2C
	244	#define CONFIG_SYS_I2C
	245	#define CONFIG_SYS_I2C_MXC
	246	#define CONFIG_SYS_I2C_SPEED 100000
	247	#define CONFIG_SYS_MXC_I2C3_SPEED 400000
	248
	249	#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
	250	#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
	251	#define CONFIG_SYS_I2C_EEPROM_BUS 2
	252
206f38f7 NK	253	/* SATA */
	254	#define CONFIG_CMD_SATA
	255	#define CONFIG_SYS_SATA_MAX_DEVICE 1
	256	#define CONFIG_LIBATA
	257	#define CONFIG_LBA48
	258	#define CONFIG_DWC_AHSATA
	259	#define CONFIG_DWC_AHSATA_PORT_ID 0
	260	#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
	261
e32028a7 NK	262	/* GPIO */
	263	#define CONFIG_MXC_GPIO
	264
	265	/* Boot */
	266	#define CONFIG_ZERO_BOOTDELAY_CHECK
	267	#define CONFIG_LOADADDR 0x10800000
	268	#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
	269	#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
	270	#define CONFIG_SYS_BOOTMAPSZ (8 << 20)
	271	#define CONFIG_SETUP_MEMORY_TAGS
	272	#define CONFIG_INITRD_TAG
f66113c0 NK	273	#define CONFIG_REVISION_TAG
f66113c0 NK	274	#define CONFIG_SERIAL_TAG
e32028a7 NK	275
	276	/* misc */
	277	#define CONFIG_SYS_GENERIC_BOARD
	278	#define CONFIG_STACKSIZE (128 * 1024)
9fbdcf01	279	#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
e32028a7	280	#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 800 /* 400 KB */
02b1343e	281	#define CONFIG_OF_BOARD_SETUP
e32028a7 NK	282
	283	/* SPL */
	284	#include "imx6_spl.h"
	285	#define CONFIG_SPL_BOARD_INIT
	286	#define CONFIG_SPL_MMC_SUPPORT
	287	#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x80 /* offset 64 kb */
	288	#define CONFIG_SYS_MONITOR_LEN (CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS / 2 * 1024)
	289	#define CONFIG_SPL_SPI_SUPPORT
	290	#define CONFIG_SPL_SPI_FLASH_SUPPORT
	291	#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
	292	#define CONFIG_SPL_SPI_LOAD
	293
	294	#endif /* __CONFIG_CM_FX6_H */