]>
Commit | Line | Data |
---|---|---|
60083261 DE |
1 | /* |
2 | * Copyright (C) 2014 Stefan Roese <sr@denx.de> | |
3 | * Copyright (C) 2016 Mario Six <mario.six@gdsys.cc> | |
4 | * | |
5 | * SPDX-License-Identifier: GPL-2.0+ | |
6 | */ | |
7 | ||
8 | #ifndef _CONFIG_CONTROLCENTERDC_H | |
9 | #define _CONFIG_CONTROLCENTERDC_H | |
10 | ||
11 | /* | |
12 | * High Level Configuration Options (easy to change) | |
13 | */ | |
14 | #define CONFIG_CUSTOMER_BOARD_SUPPORT | |
15 | ||
16 | #define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ | |
17 | #define CONFIG_DISPLAY_BOARDINFO_LATE | |
18 | #define CONFIG_BOARD_LATE_INIT | |
19 | #define CONFIG_LAST_STAGE_INIT | |
60083261 DE |
20 | |
21 | /* | |
22 | * TEXT_BASE needs to be below 16MiB, since this area is scrubbed | |
23 | * for DDR ECC byte filling in the SPL before loading the main | |
24 | * U-Boot into it. | |
25 | */ | |
60083261 DE |
26 | |
27 | #define CONFIG_SYS_TCLK 250000000 /* 250MHz */ | |
28 | ||
29 | #define CONFIG_LOADADDR 1000000 | |
30 | ||
31 | /* | |
32 | * Commands configuration | |
33 | */ | |
60083261 | 34 | #define CONFIG_CMD_I2C |
60083261 DE |
35 | #define CONFIG_CMD_SPI |
36 | ||
37 | /* SPI NOR flash default params, used by sf commands */ | |
38 | #define CONFIG_SF_DEFAULT_BUS 1 | |
39 | #define CONFIG_SF_DEFAULT_SPEED 1000000 | |
40 | #define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 | |
41 | ||
42 | /* | |
43 | * SDIO/MMC Card Configuration | |
44 | */ | |
45 | #define CONFIG_SYS_MMC_BASE MVEBU_SDIO_BASE | |
46 | ||
47 | /* | |
48 | * SATA/SCSI/AHCI configuration | |
49 | */ | |
60083261 DE |
50 | #define CONFIG_SCSI_AHCI_PLAT |
51 | #define CONFIG_SYS_SCSI_MAX_SCSI_ID 2 | |
52 | #define CONFIG_SYS_SCSI_MAX_LUN 1 | |
53 | #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ | |
54 | CONFIG_SYS_SCSI_MAX_LUN) | |
55 | ||
60083261 DE |
56 | /* USB/EHCI configuration */ |
57 | #define CONFIG_EHCI_IS_TDI | |
58 | ||
59 | /* Environment in SPI NOR flash */ | |
60083261 DE |
60 | #define CONFIG_ENV_SPI_BUS 1 |
61 | #define CONFIG_ENV_OFFSET (1 << 20) /* 1MiB in */ | |
62 | #define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */ | |
63 | #define CONFIG_ENV_SECT_SIZE (256 << 10) /* 256KiB sectors */ | |
64 | ||
65 | #define CONFIG_PHY_MARVELL /* there is a marvell phy */ | |
66 | #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ | |
67 | ||
68 | /* PCIe support */ | |
69 | #ifndef CONFIG_SPL_BUILD | |
70 | #define CONFIG_PCI | |
71 | #define CONFIG_PCI_MVEBU | |
72 | #define CONFIG_PCI_PNP | |
73 | #define CONFIG_PCI_SCAN_SHOW | |
74 | #endif | |
75 | ||
76 | #define CONFIG_SYS_ALT_MEMTEST | |
77 | ||
78 | /* | |
79 | * Software (bit-bang) MII driver configuration | |
80 | */ | |
81 | #define CONFIG_BITBANGMII /* bit-bang MII PHY management */ | |
82 | #define CONFIG_BITBANGMII_MULTI | |
83 | ||
84 | /* SPL */ | |
85 | /* | |
86 | * Select the boot device here | |
87 | * | |
88 | * Currently supported are: | |
89 | * SPL_BOOT_SPI_NOR_FLASH - Booting via SPI NOR flash | |
90 | * SPL_BOOT_SDIO_MMC_CARD - Booting via SDIO/MMC card (partition 1) | |
91 | */ | |
92 | #define SPL_BOOT_SPI_NOR_FLASH 1 | |
93 | #define SPL_BOOT_SDIO_MMC_CARD 2 | |
94 | #define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SPI_NOR_FLASH | |
95 | ||
96 | /* Defines for SPL */ | |
60083261 DE |
97 | #define CONFIG_SPL_SIZE (160 << 10) |
98 | ||
99 | #if defined(CONFIG_SECURED_MODE_IMAGE) | |
100 | #define CONFIG_SPL_TEXT_BASE 0x40002614 | |
101 | #define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x2614) | |
102 | #else | |
103 | #define CONFIG_SPL_TEXT_BASE 0x40000030 | |
104 | #define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x30) | |
105 | #endif | |
106 | ||
107 | #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) | |
108 | #define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) | |
109 | ||
110 | #ifdef CONFIG_SPL_BUILD | |
111 | #define CONFIG_SYS_MALLOC_SIMPLE | |
112 | #endif | |
113 | ||
114 | #define CONFIG_SPL_STACK (0x40000000 + ((212 - 16) << 10)) | |
115 | #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) | |
116 | ||
117 | #define CONFIG_SPL_LIBCOMMON_SUPPORT | |
118 | #define CONFIG_SPL_LIBGENERIC_SUPPORT | |
119 | #define CONFIG_SPL_SERIAL_SUPPORT | |
120 | #define CONFIG_SPL_I2C_SUPPORT | |
121 | ||
122 | #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH | |
123 | /* SPL related SPI defines */ | |
124 | #define CONFIG_SPL_SPI_LOAD | |
125 | #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x30000 | |
126 | #define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS | |
127 | #endif | |
128 | ||
129 | #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD | |
130 | /* SPL related MMC defines */ | |
131 | #define CONFIG_SPL_MMC_SUPPORT | |
132 | #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 1 | |
133 | #define CONFIG_SYS_MMC_U_BOOT_OFFS (168 << 10) | |
134 | #define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS | |
135 | #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR (CONFIG_SYS_U_BOOT_OFFS / 512) | |
136 | #ifdef CONFIG_SPL_BUILD | |
137 | #define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */ | |
138 | #endif | |
139 | #endif | |
140 | ||
141 | /* | |
142 | * Environment Configuration | |
143 | */ | |
144 | #define CONFIG_ENV_OVERWRITE | |
145 | ||
146 | #define CONFIG_BAUDRATE 115200 | |
147 | ||
148 | #define CONFIG_HOSTNAME ccdc | |
149 | #define CONFIG_ROOTPATH "/opt/nfsroot" | |
150 | #define CONFIG_BOOTFILE "ccdc.img" | |
151 | ||
152 | #define CONFIG_PREBOOT /* enable preboot variable */ | |
153 | ||
154 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
155 | "netdev=eth1\0" \ | |
156 | "consoledev=ttyS1\0" \ | |
157 | "u-boot=u-boot.bin\0" \ | |
158 | "bootfile_addr=1000000\0" \ | |
159 | "keyprogram_addr=3000000\0" \ | |
160 | "keyprogram_file=keyprogram.img\0" \ | |
161 | "fdtfile=controlcenterdc.dtb\0" \ | |
162 | "load=tftpboot ${loadaddr} ${u-boot}\0" \ | |
163 | "mmcdev=0:2\0" \ | |
164 | "update=sf probe 1:0;" \ | |
165 | " sf erase 0 +${filesize};" \ | |
166 | " sf write ${fileaddr} 0 ${filesize}\0" \ | |
167 | "upd=run load update\0" \ | |
168 | "fdt_high=0x10000000\0" \ | |
169 | "initrd_high=0x10000000\0" \ | |
170 | "loadkeyprogram=tpm flush_keys;" \ | |
171 | " mmc rescan;" \ | |
172 | " ext4load mmc ${mmcdev} ${keyprogram_addr} ${keyprogram_file};"\ | |
173 | " source ${keyprogram_addr}:script@1\0" \ | |
174 | "gpio1=gpio@22_25\0" \ | |
175 | "gpio2=A29\0" \ | |
176 | "blinkseq='0 0 0 0 2 0 2 2 3 1 3 1 0 0 2 2 3 1 3 3 2 0 2 2 3 1 1 1 " \ | |
177 | "2 0 2 2 3 1 3 1 0 0 2 0 3 3 3 1 2 0 0 0 3 1 1 1 0 0 0 0'\0" \ | |
178 | "bootfail=for i in ${blinkseq}; do" \ | |
179 | " if test $i -eq 0; then" \ | |
180 | " gpio clear ${gpio1}; gpio set ${gpio2};" \ | |
181 | " elif test $i -eq 1; then" \ | |
182 | " gpio clear ${gpio1}; gpio clear ${gpio2};" \ | |
183 | " elif test $i -eq 2; then" \ | |
184 | " gpio set ${gpio1}; gpio set ${gpio2};" \ | |
185 | " else;" \ | |
186 | " gpio clear ${gpio1}; gpio set ${gpio2};" \ | |
187 | " fi; sleep 0.12; done\0" | |
188 | ||
189 | #define CONFIG_NFSBOOTCOMMAND \ | |
190 | "setenv bootargs root=/dev/nfs rw " \ | |
191 | "nfsroot=${serverip}:${rootpath} " \ | |
192 | "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:${netdev}:off " \ | |
193 | "console=${consoledev},${baudrate} ${othbootargs}; " \ | |
194 | "tftpboot ${bootfile_addr} ${bootfile}; " \ | |
195 | "bootm ${bootfile_addr}" | |
196 | ||
197 | #define CONFIG_MMCBOOTCOMMAND \ | |
198 | "setenv bootargs root=/dev/mmcblk0p3 rw rootwait " \ | |
199 | "console=${consoledev},${baudrate} ${othbootargs}; " \ | |
200 | "ext2load mmc 0:2 ${bootfile_addr} ${bootfile}; " \ | |
201 | "bootm ${bootfile_addr}" | |
202 | ||
203 | #define CONFIG_BOOTCOMMAND \ | |
204 | "if env exists keyprogram; then;" \ | |
205 | " setenv keyprogram; run nfsboot;" \ | |
206 | " fi;" \ | |
207 | " run dobootfail" | |
208 | ||
209 | /* | |
210 | * mv-common.h should be defined after CMD configs since it used them | |
211 | * to enable certain macros | |
212 | */ | |
213 | #include "mv-common.h" | |
214 | ||
215 | #endif /* _CONFIG_CONTROLCENTERDC_H */ |