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60083261 DE |
1 | /* |
2 | * Copyright (C) 2014 Stefan Roese <sr@denx.de> | |
3 | * Copyright (C) 2016 Mario Six <mario.six@gdsys.cc> | |
4 | * | |
5 | * SPDX-License-Identifier: GPL-2.0+ | |
6 | */ | |
7 | ||
8 | #ifndef _CONFIG_CONTROLCENTERDC_H | |
9 | #define _CONFIG_CONTROLCENTERDC_H | |
10 | ||
11 | /* | |
12 | * High Level Configuration Options (easy to change) | |
13 | */ | |
14 | #define CONFIG_CUSTOMER_BOARD_SUPPORT | |
15 | ||
16 | #define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ | |
17 | #define CONFIG_DISPLAY_BOARDINFO_LATE | |
18 | #define CONFIG_BOARD_LATE_INIT | |
19 | #define CONFIG_LAST_STAGE_INIT | |
60083261 DE |
20 | |
21 | /* | |
22 | * TEXT_BASE needs to be below 16MiB, since this area is scrubbed | |
23 | * for DDR ECC byte filling in the SPL before loading the main | |
24 | * U-Boot into it. | |
25 | */ | |
26 | #define CONFIG_SYS_TEXT_BASE 0x00800000 | |
27 | ||
28 | #define CONFIG_SYS_TCLK 250000000 /* 250MHz */ | |
29 | ||
30 | #define CONFIG_LOADADDR 1000000 | |
31 | ||
32 | /* | |
33 | * Commands configuration | |
34 | */ | |
60083261 | 35 | #define CONFIG_CMD_I2C |
60083261 DE |
36 | #define CONFIG_CMD_SPI |
37 | ||
38 | /* SPI NOR flash default params, used by sf commands */ | |
39 | #define CONFIG_SF_DEFAULT_BUS 1 | |
40 | #define CONFIG_SF_DEFAULT_SPEED 1000000 | |
41 | #define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 | |
42 | ||
43 | /* | |
44 | * SDIO/MMC Card Configuration | |
45 | */ | |
46 | #define CONFIG_SYS_MMC_BASE MVEBU_SDIO_BASE | |
47 | ||
48 | /* | |
49 | * SATA/SCSI/AHCI configuration | |
50 | */ | |
51 | #define CONFIG_LIBATA | |
60083261 DE |
52 | #define CONFIG_SCSI_AHCI_PLAT |
53 | #define CONFIG_SYS_SCSI_MAX_SCSI_ID 2 | |
54 | #define CONFIG_SYS_SCSI_MAX_LUN 1 | |
55 | #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ | |
56 | CONFIG_SYS_SCSI_MAX_LUN) | |
57 | ||
58 | /* Additional FS support/configuration */ | |
59 | #define CONFIG_SUPPORT_VFAT | |
60 | ||
61 | /* USB/EHCI configuration */ | |
62 | #define CONFIG_EHCI_IS_TDI | |
63 | ||
64 | /* Environment in SPI NOR flash */ | |
60083261 DE |
65 | #define CONFIG_ENV_SPI_BUS 1 |
66 | #define CONFIG_ENV_OFFSET (1 << 20) /* 1MiB in */ | |
67 | #define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */ | |
68 | #define CONFIG_ENV_SECT_SIZE (256 << 10) /* 256KiB sectors */ | |
69 | ||
70 | #define CONFIG_PHY_MARVELL /* there is a marvell phy */ | |
71 | #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ | |
72 | ||
73 | /* PCIe support */ | |
74 | #ifndef CONFIG_SPL_BUILD | |
75 | #define CONFIG_PCI | |
76 | #define CONFIG_PCI_MVEBU | |
77 | #define CONFIG_PCI_PNP | |
78 | #define CONFIG_PCI_SCAN_SHOW | |
79 | #endif | |
80 | ||
81 | #define CONFIG_SYS_ALT_MEMTEST | |
82 | ||
83 | /* | |
84 | * Software (bit-bang) MII driver configuration | |
85 | */ | |
86 | #define CONFIG_BITBANGMII /* bit-bang MII PHY management */ | |
87 | #define CONFIG_BITBANGMII_MULTI | |
88 | ||
89 | /* SPL */ | |
90 | /* | |
91 | * Select the boot device here | |
92 | * | |
93 | * Currently supported are: | |
94 | * SPL_BOOT_SPI_NOR_FLASH - Booting via SPI NOR flash | |
95 | * SPL_BOOT_SDIO_MMC_CARD - Booting via SDIO/MMC card (partition 1) | |
96 | */ | |
97 | #define SPL_BOOT_SPI_NOR_FLASH 1 | |
98 | #define SPL_BOOT_SDIO_MMC_CARD 2 | |
99 | #define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SPI_NOR_FLASH | |
100 | ||
101 | /* Defines for SPL */ | |
102 | #define CONFIG_SPL_FRAMEWORK | |
103 | #define CONFIG_SPL_SIZE (160 << 10) | |
104 | ||
105 | #if defined(CONFIG_SECURED_MODE_IMAGE) | |
106 | #define CONFIG_SPL_TEXT_BASE 0x40002614 | |
107 | #define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x2614) | |
108 | #else | |
109 | #define CONFIG_SPL_TEXT_BASE 0x40000030 | |
110 | #define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x30) | |
111 | #endif | |
112 | ||
113 | #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) | |
114 | #define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) | |
115 | ||
116 | #ifdef CONFIG_SPL_BUILD | |
117 | #define CONFIG_SYS_MALLOC_SIMPLE | |
118 | #endif | |
119 | ||
120 | #define CONFIG_SPL_STACK (0x40000000 + ((212 - 16) << 10)) | |
121 | #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) | |
122 | ||
123 | #define CONFIG_SPL_LIBCOMMON_SUPPORT | |
124 | #define CONFIG_SPL_LIBGENERIC_SUPPORT | |
125 | #define CONFIG_SPL_SERIAL_SUPPORT | |
126 | #define CONFIG_SPL_I2C_SUPPORT | |
127 | ||
128 | #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH | |
129 | /* SPL related SPI defines */ | |
130 | #define CONFIG_SPL_SPI_LOAD | |
131 | #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x30000 | |
132 | #define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS | |
133 | #endif | |
134 | ||
135 | #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD | |
136 | /* SPL related MMC defines */ | |
137 | #define CONFIG_SPL_MMC_SUPPORT | |
138 | #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 1 | |
139 | #define CONFIG_SYS_MMC_U_BOOT_OFFS (168 << 10) | |
140 | #define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS | |
141 | #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR (CONFIG_SYS_U_BOOT_OFFS / 512) | |
142 | #ifdef CONFIG_SPL_BUILD | |
143 | #define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */ | |
144 | #endif | |
145 | #endif | |
146 | ||
147 | /* | |
148 | * Environment Configuration | |
149 | */ | |
150 | #define CONFIG_ENV_OVERWRITE | |
151 | ||
152 | #define CONFIG_BAUDRATE 115200 | |
153 | ||
154 | #define CONFIG_HOSTNAME ccdc | |
155 | #define CONFIG_ROOTPATH "/opt/nfsroot" | |
156 | #define CONFIG_BOOTFILE "ccdc.img" | |
157 | ||
158 | #define CONFIG_PREBOOT /* enable preboot variable */ | |
159 | ||
160 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
161 | "netdev=eth1\0" \ | |
162 | "consoledev=ttyS1\0" \ | |
163 | "u-boot=u-boot.bin\0" \ | |
164 | "bootfile_addr=1000000\0" \ | |
165 | "keyprogram_addr=3000000\0" \ | |
166 | "keyprogram_file=keyprogram.img\0" \ | |
167 | "fdtfile=controlcenterdc.dtb\0" \ | |
168 | "load=tftpboot ${loadaddr} ${u-boot}\0" \ | |
169 | "mmcdev=0:2\0" \ | |
170 | "update=sf probe 1:0;" \ | |
171 | " sf erase 0 +${filesize};" \ | |
172 | " sf write ${fileaddr} 0 ${filesize}\0" \ | |
173 | "upd=run load update\0" \ | |
174 | "fdt_high=0x10000000\0" \ | |
175 | "initrd_high=0x10000000\0" \ | |
176 | "loadkeyprogram=tpm flush_keys;" \ | |
177 | " mmc rescan;" \ | |
178 | " ext4load mmc ${mmcdev} ${keyprogram_addr} ${keyprogram_file};"\ | |
179 | " source ${keyprogram_addr}:script@1\0" \ | |
180 | "gpio1=gpio@22_25\0" \ | |
181 | "gpio2=A29\0" \ | |
182 | "blinkseq='0 0 0 0 2 0 2 2 3 1 3 1 0 0 2 2 3 1 3 3 2 0 2 2 3 1 1 1 " \ | |
183 | "2 0 2 2 3 1 3 1 0 0 2 0 3 3 3 1 2 0 0 0 3 1 1 1 0 0 0 0'\0" \ | |
184 | "bootfail=for i in ${blinkseq}; do" \ | |
185 | " if test $i -eq 0; then" \ | |
186 | " gpio clear ${gpio1}; gpio set ${gpio2};" \ | |
187 | " elif test $i -eq 1; then" \ | |
188 | " gpio clear ${gpio1}; gpio clear ${gpio2};" \ | |
189 | " elif test $i -eq 2; then" \ | |
190 | " gpio set ${gpio1}; gpio set ${gpio2};" \ | |
191 | " else;" \ | |
192 | " gpio clear ${gpio1}; gpio set ${gpio2};" \ | |
193 | " fi; sleep 0.12; done\0" | |
194 | ||
195 | #define CONFIG_NFSBOOTCOMMAND \ | |
196 | "setenv bootargs root=/dev/nfs rw " \ | |
197 | "nfsroot=${serverip}:${rootpath} " \ | |
198 | "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:${netdev}:off " \ | |
199 | "console=${consoledev},${baudrate} ${othbootargs}; " \ | |
200 | "tftpboot ${bootfile_addr} ${bootfile}; " \ | |
201 | "bootm ${bootfile_addr}" | |
202 | ||
203 | #define CONFIG_MMCBOOTCOMMAND \ | |
204 | "setenv bootargs root=/dev/mmcblk0p3 rw rootwait " \ | |
205 | "console=${consoledev},${baudrate} ${othbootargs}; " \ | |
206 | "ext2load mmc 0:2 ${bootfile_addr} ${bootfile}; " \ | |
207 | "bootm ${bootfile_addr}" | |
208 | ||
209 | #define CONFIG_BOOTCOMMAND \ | |
210 | "if env exists keyprogram; then;" \ | |
211 | " setenv keyprogram; run nfsboot;" \ | |
212 | " fi;" \ | |
213 | " run dobootfail" | |
214 | ||
215 | /* | |
216 | * mv-common.h should be defined after CMD configs since it used them | |
217 | * to enable certain macros | |
218 | */ | |
219 | #include "mv-common.h" | |
220 | ||
221 | #endif /* _CONFIG_CONTROLCENTERDC_H */ |