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ahci: convert to use libata functions and definitions
[people/ms/u-boot.git] / include / configs / coreboot.h
CommitLineData
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1/*
2 * Copyright (c) 2011 The Chromium OS Authors.
3 * (C) Copyright 2008
4 * Graeme Russ, graeme.russ@gmail.com.
5 *
1a459660 6 * SPDX-License-Identifier: GPL-2.0+
ef5a5b00
GB
7 */
8
9#include <asm/ibmpc.h>
10/*
11 * board/config.h - configuration options, board specific
12 */
13
14#ifndef __CONFIG_H
15#define __CONFIG_H
16
17/*
18 * High Level Configuration Options
19 * (easy to change)
20 */
21#define CONFIG_SYS_COREBOOT
300081aa 22#define CONFIG_SHOW_BOOT_PROGRESS
ef5a5b00 23#define CONFIG_LAST_STAGE_INIT
a78d4947 24#define CONFIG_SYS_VSNPRINTF
34d6057b 25#define CONFIG_ZBOOT_32
ac426b72 26#define CONFIG_PHYSMEM
617c246f 27#define CONFIG_SYS_EARLY_PCI_INIT
ef5a5b00 28
fc959081
SG
29#define CONFIG_LMB
30#define CONFIG_OF_LIBFDT
31#define CONFIG_OF_CONTROL
32#define CONFIG_OF_SEPARATE
33#define CONFIG_DEFAULT_DEVICE_TREE link
34
2e65959b
SG
35#define CONFIG_BOOTSTAGE
36#define CONFIG_BOOTSTAGE_REPORT
37#define CONFIG_BOOTSTAGE_FDT
38#define CONFIG_CMD_BOOTSTAGE
39/* Place to stash bootstage data from first-stage U-Boot */
40#define CONFIG_BOOTSTAGE_STASH 0x0110f000
41#define CONFIG_BOOTSTAGE_STASH_SIZE 0x7fc
42#define CONFIG_BOOTSTAGE_USER_COUNT 60
43
04dbf77d
SG
44#define CONFIG_LZO
45#undef CONFIG_ZLIB
46#undef CONFIG_GZIP
47
ef5a5b00
GB
48/*-----------------------------------------------------------------------
49 * Watchdog Configuration
50 */
51#undef CONFIG_WATCHDOG
52#undef CONFIG_HW_WATCHDOG
53
51bdad67
SG
54/* SATA AHCI storage */
55
56#define CONFIG_SCSI_AHCI
57
58#ifdef CONFIG_SCSI_AHCI
344ca0b4 59#define CONFIG_LIBATA
51bdad67
SG
60#define CONFIG_SYS_64BIT_LBA
61#define CONFIG_SATA_INTEL 1
62#define CONFIG_SCSI_DEV_LIST {PCI_VENDOR_ID_INTEL, \
63 PCI_DEVICE_ID_INTEL_NM10_AHCI}, \
64 {PCI_VENDOR_ID_INTEL, \
65 PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_MOBILE}, \
66 {PCI_VENDOR_ID_INTEL, \
67 PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_SERIES6}, \
68 {PCI_VENDOR_ID_INTEL, \
69 PCI_DEVICE_ID_INTEL_PANTHERPOINT_AHCI_MOBILE}
70
71#define CONFIG_SYS_SCSI_MAX_SCSI_ID 2
72#define CONFIG_SYS_SCSI_MAX_LUN 1
73#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
74 CONFIG_SYS_SCSI_MAX_LUN)
75#endif
76
d02a568e 77/* Generic TPM interfaced through LPC bus */
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TWHT
78#define CONFIG_TPM
79#define CONFIG_TPM_TIS_LPC
d02a568e
SG
80#define CONFIG_TPM_TIS_BASE_ADDRESS 0xfed40000
81
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82/*-----------------------------------------------------------------------
83 * Real Time Clock Configuration
84 */
85#define CONFIG_RTC_MC146818
86#define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0
cbca883c 87#define CONFIG_SYS_ISA_IO CONFIG_SYS_ISA_IO_BASE_ADDRESS
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88
89/*-----------------------------------------------------------------------
90 * Serial Configuration
91 */
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92#define CONFIG_CONS_INDEX 1
93#define CONFIG_SYS_NS16550
94#define CONFIG_SYS_NS16550_SERIAL
95#define CONFIG_SYS_NS16550_REG_SIZE 1
96#define CONFIG_SYS_NS16550_CLK 1843200
97#define CONFIG_BAUDRATE 9600
98#define CONFIG_SYS_BAUDRATE_TABLE {300, 600, 1200, 2400, 4800, \
99 9600, 19200, 38400, 115200}
100#define CONFIG_SYS_NS16550_COM1 UART0_BASE
101#define CONFIG_SYS_NS16550_COM2 UART1_BASE
102#define CONFIG_SYS_NS16550_PORT_MAPPED
103
420a2ca7
SG
104#define CONFIG_STD_DEVICES_SETTINGS "stdin=usbkbd,vga,eserial0\0" \
105 "stdout=vga,eserial0,cbmem\0" \
106 "stderr=vga,eserial0,cbmem\0"
107
108#define CONFIG_CONSOLE_MUX
109#define CONFIG_SYS_CONSOLE_IS_IN_ENV
110#define CONFIG_SYS_STDIO_DEREGISTER
111#define CONFIG_CBMEM_CONSOLE
112
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SG
113#define CONFIG_CMDLINE_EDITING
114#define CONFIG_COMMAND_HISTORY
115#define CONFIG_AUTOCOMPLETE
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116
117#define CONFIG_SUPPORT_VFAT
118/************************************************************
119 * ATAPI support (experimental)
120 ************************************************************/
121#define CONFIG_ATAPI
122
123/************************************************************
124 * DISK Partition support
125 ************************************************************/
d954a431 126#define CONFIG_EFI_PARTITION
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127#define CONFIG_DOS_PARTITION
128#define CONFIG_MAC_PARTITION
129#define CONFIG_ISO_PARTITION /* Experimental */
130
d954a431 131#define CONFIG_CMD_PART
af9f881a
SG
132#define CONFIG_CMD_CBFS
133#define CONFIG_CMD_EXT4
134#define CONFIG_CMD_EXT4_WRITE
d954a431 135#define CONFIG_PARTITION_UUIDS
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136
137/*-----------------------------------------------------------------------
138 * Video Configuration
139 */
cbca883c
SG
140#define CONFIG_VIDEO
141#define CONFIG_VIDEO_COREBOOT
142#define CONFIG_VIDEO_SW_CURSOR
143#define VIDEO_FB_16BPP_WORD_SWAP
144#define CONFIG_I8042_KBD
145#define CONFIG_CFB_CONSOLE
146#define CONFIG_SYS_CONSOLE_INFO_QUIET
ef5a5b00 147
a7e6d549
SG
148/* x86 GPIOs are accessed through a PCI device */
149#define CONFIG_INTEL_ICH6_GPIO
150
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151/*-----------------------------------------------------------------------
152 * Command line configuration.
153 */
154#include <config_cmd_default.h>
155
b5f31937
SG
156#define CONFIG_TRACE
157#define CONFIG_CMD_TRACE
158#define CONFIG_TRACE_BUFFER_SIZE (16 << 20)
159#define CONFIG_TRACE_EARLY_SIZE (8 << 20)
160#define CONFIG_TRACE_EARLY
161#define CONFIG_TRACE_EARLY_ADDR 0x01400000
162
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163#define CONFIG_CMD_BDI
164#define CONFIG_CMD_BOOTD
165#define CONFIG_CMD_CONSOLE
166#define CONFIG_CMD_DATE
167#define CONFIG_CMD_ECHO
168#undef CONFIG_CMD_FLASH
169#define CONFIG_CMD_FPGA
a7e6d549 170#define CONFIG_CMD_GPIO
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171#define CONFIG_CMD_IMI
172#undef CONFIG_CMD_IMLS
a08afb39 173#define CONFIG_CMD_IO
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174#define CONFIG_CMD_IRQ
175#define CONFIG_CMD_ITEST
176#define CONFIG_CMD_LOADB
177#define CONFIG_CMD_LOADS
178#define CONFIG_CMD_MEMORY
179#define CONFIG_CMD_MISC
180#define CONFIG_CMD_NET
181#undef CONFIG_CMD_NFS
182#define CONFIG_CMD_PCI
183#define CONFIG_CMD_PING
184#define CONFIG_CMD_RUN
185#define CONFIG_CMD_SAVEENV
186#define CONFIG_CMD_SETGETDCR
187#define CONFIG_CMD_SOURCE
363464f9
SG
188#define CONFIG_CMD_TIME
189#define CONFIG_CMD_GETTIME
ef5a5b00 190#define CONFIG_CMD_XIMG
ac426b72
SG
191#define CONFIG_CMD_SCSI
192
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193#define CONFIG_CMD_FAT
194#define CONFIG_CMD_EXT2
195
34d6057b
SG
196#define CONFIG_CMD_ZBOOT
197
ef5a5b00 198#define CONFIG_BOOTDELAY 2
ac426b72
SG
199#define CONFIG_BOOTARGS \
200 "root=/dev/sdb3 init=/sbin/init rootwait ro"
201#define CONFIG_BOOTCOMMAND \
202 "ext2load scsi 0:3 01000000 /boot/vmlinuz; zboot 01000000"
203
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204
205#if defined(CONFIG_CMD_KGDB)
206#define CONFIG_KGDB_BAUDRATE 115200
207#define CONFIG_KGDB_SER_INDEX 2
208#endif
209
210/*
211 * Miscellaneous configurable options
212 */
213#define CONFIG_SYS_LONGHELP
214#define CONFIG_SYS_PROMPT "boot > "
215#define CONFIG_SYS_CBSIZE 256
216#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
217 sizeof(CONFIG_SYS_PROMPT) + \
218 16)
219#define CONFIG_SYS_MAXARGS 16
220#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
221
222#define CONFIG_SYS_MEMTEST_START 0x00100000
223#define CONFIG_SYS_MEMTEST_END 0x01000000
224#define CONFIG_SYS_LOAD_ADDR 0x100000
225#define CONFIG_SYS_HZ 1000
ef5a5b00
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226
227/*-----------------------------------------------------------------------
228 * SDRAM Configuration
229 */
230#define CONFIG_NR_DRAM_BANKS 4
231
232/* CONFIG_SYS_SDRAM_DRCTMCTL Overrides the following*/
233#undef CONFIG_SYS_SDRAM_PRECHARGE_DELAY
234#undef CONFIG_SYS_SDRAM_RAS_CAS_DELAY
235#undef CONFIG_SYS_SDRAM_CAS_LATENCY_2T
236#undef CONFIG_SYS_SDRAM_CAS_LATENCY_3T
237
238/*-----------------------------------------------------------------------
239 * CPU Features
240 */
241
e761ecdb 242#define CONFIG_SYS_X86_TSC_TIMER
ef5a5b00 243#define CONFIG_SYS_PCAT_INTERRUPTS
d0b6f247 244#define CONFIG_SYS_PCAT_TIMER
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GB
245#define CONFIG_SYS_NUM_IRQS 16
246
247/*-----------------------------------------------------------------------
248 * Memory organization:
249 * 32kB Stack
250 * 16kB Cache-As-RAM @ 0x19200000
251 * 256kB Monitor
252 * (128kB + Environment Sector Size) malloc pool
253 */
254#define CONFIG_SYS_STACK_SIZE (32 * 1024)
8d61625d
GR
255#define CONFIG_SYS_CAR_ADDR 0x19200000
256#define CONFIG_SYS_CAR_SIZE (16 * 1024)
ef5a5b00
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257#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
258#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
259#define CONFIG_SYS_MALLOC_LEN (0x20000 + 128 * 1024)
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260
261
262/* allow to overwrite serial and ethaddr */
263#define CONFIG_ENV_OVERWRITE
264
265/*-----------------------------------------------------------------------
266 * FLASH configuration
267 */
e30bd5cf
SG
268#define CONFIG_ICH_SPI
269#define CONFIG_SPI_FLASH
270#define CONFIG_SPI_FLASH_MACRONIX
271#define CONFIG_SPI_FLASH_WINBOND
272#define CONFIG_SPI_FLASH_GIGADEVICE
ef5a5b00 273#define CONFIG_SYS_NO_FLASH
e30bd5cf
SG
274#define CONFIG_CMD_SF
275#define CONFIG_CMD_SF_TEST
276#define CONFIG_CMD_SPI
277#define CONFIG_SPI
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278
279/*-----------------------------------------------------------------------
280 * Environment configuration
281 */
282#define CONFIG_ENV_IS_NOWHERE
283#define CONFIG_ENV_SIZE 0x01000
284
285/*-----------------------------------------------------------------------
286 * PCI configuration
287 */
288#define CONFIG_PCI
289
0641ce5b
SG
290/*-----------------------------------------------------------------------
291 * USB configuration
292 */
293#define CONFIG_USB_EHCI
294#define CONFIG_USB_EHCI_PCI
295#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 12
296#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
297#define CONFIG_USB_STORAGE
298#define CONFIG_USB_KEYBOARD
299#define CONFIG_SYS_USB_EVENT_POLL
300
301#define CONFIG_USB_HOST_ETHER
302#define CONFIG_USB_ETHER_ASIX
303#define CONFIG_USB_ETHER_SMSC95XX
304
305#define CONFIG_CMD_USB
306
420a2ca7
SG
307#define CONFIG_EXTRA_ENV_SETTINGS \
308 CONFIG_STD_DEVICES_SETTINGS
309
ef5a5b00 310#endif /* __CONFIG_H */