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2d4072c0 | 1 | /* |
a4474ff8 | 2 | * Copyright (C) 2009 Texas Instruments Incorporated |
2d4072c0 SP |
3 | * |
4 | * This program is free software; you can redistribute it and/or | |
5 | * modify it under the terms of the GNU General Public License as | |
6 | * published by the Free Software Foundation; either version 2 of | |
7 | * the License, or (at your option) any later version. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | * GNU General Public License for more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License | |
15 | * along with this program; if not, write to the Free Software | |
16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
17 | * MA 02111-1307 USA | |
18 | */ | |
19 | ||
20 | #ifndef __CONFIG_H | |
21 | #define __CONFIG_H | |
2d4072c0 SP |
22 | |
23 | /* Spectrum Digital TMS320DM365 EVM board */ | |
24 | #define DAVINCI_DM365EVM | |
25 | ||
26 | #define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is a 3rd stage loader */ | |
2d4072c0 SP |
27 | #define CONFIG_SYS_NO_FLASH /* that is, no *NOR* flash */ |
28 | #define CONFIG_SYS_CONSOLE_INFO_QUIET | |
29 | ||
30 | /* SoC Configuration */ | |
31 | #define CONFIG_ARM926EJS /* arm926ejs CPU */ | |
32 | #define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */ | |
33 | #define CONFIG_SYS_HZ_CLOCK 24000000 /* timer0 freq */ | |
34 | #define CONFIG_SYS_HZ 1000 | |
35 | #define CONFIG_SOC_DM365 | |
36 | ||
37 | /* Memory Info */ | |
38 | #define CONFIG_NR_DRAM_BANKS 1 | |
39 | #define PHYS_SDRAM_1 0x80000000 | |
a16df2c1 | 40 | #define PHYS_SDRAM_1_SIZE (128 << 20) /* 128 MiB */ |
2d4072c0 SP |
41 | |
42 | /* Serial Driver info: UART0 for console */ | |
43 | #define CONFIG_SYS_NS16550 | |
44 | #define CONFIG_SYS_NS16550_SERIAL | |
45 | #define CONFIG_SYS_NS16550_REG_SIZE -4 | |
46 | #define CONFIG_SYS_NS16550_COM1 0x01c20000 | |
47 | #define CONFIG_SYS_NS16550_CLK CONFIG_SYS_HZ_CLOCK | |
2d4072c0 SP |
48 | #define CONFIG_CONS_INDEX 1 |
49 | #define CONFIG_BAUDRATE 115200 | |
50 | ||
51 | /* EEPROM definitions for EEPROM on DM365 EVM */ | |
52 | #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 | |
53 | #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 | |
54 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 | |
55 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20 | |
56 | ||
57 | /* Network Configuration */ | |
58 | #define CONFIG_DRIVER_TI_EMAC | |
59 | #define CONFIG_MII | |
60 | #define CONFIG_BOOTP_DEFAULT | |
61 | #define CONFIG_BOOTP_DNS | |
62 | #define CONFIG_BOOTP_DNS2 | |
63 | #define CONFIG_BOOTP_SEND_HOSTNAME | |
64 | #define CONFIG_NET_RETRY_COUNT 10 | |
2d4072c0 SP |
65 | |
66 | /* I2C */ | |
67 | #define CONFIG_HARD_I2C | |
68 | #define CONFIG_DRIVER_DAVINCI_I2C | |
69 | #define CONFIG_SYS_I2C_SPEED 400000 | |
70 | #define CONFIG_SYS_I2C_SLAVE 0x10 /* SMBus host address */ | |
71 | ||
72 | /* NAND: socketed, two chipselects, normally 2 GBytes */ | |
73 | #define CONFIG_NAND_DAVINCI | |
97f4eb8c | 74 | #define CONFIG_SYS_NAND_CS 2 |
2d4072c0 SP |
75 | #define CONFIG_SYS_NAND_USE_FLASH_BBT |
76 | #define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST | |
77 | #define CONFIG_SYS_NAND_PAGE_2K | |
78 | ||
79 | #define CONFIG_SYS_NAND_LARGEPAGE | |
80 | #define CONFIG_SYS_NAND_BASE_LIST { 0x02000000, } | |
81 | /* socket has two chipselects, nCE0 gated by address BIT(14) */ | |
82 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 | |
83 | #define CONFIG_SYS_NAND_MAX_CHIPS 2 | |
84 | ||
e3e4e2f4 SP |
85 | /* SD/MMC */ |
86 | #define CONFIG_MMC | |
87 | #define CONFIG_GENERIC_MMC | |
88 | #define CONFIG_DAVINCI_MMC | |
89 | #define CONFIG_DAVINCI_MMC_SD1 | |
90 | #define CONFIG_MMC_MBLOCK | |
91 | ||
6e20e64f PS |
92 | #define PINMUX4_USBDRVBUS_BITCLEAR 0x3000 |
93 | #define PINMUX4_USBDRVBUS_BITSET 0x2000 | |
94 | ||
95 | /* USB Configuration */ | |
96 | #define CONFIG_USB_DAVINCI | |
97 | #define CONFIG_MUSB_HCD | |
98 | ||
99 | #ifdef CONFIG_USB_DAVINCI | |
100 | #define CONFIG_CMD_USB /* include support for usb */ | |
101 | #define CONFIG_CMD_STORAGE /* include support for usb */ | |
102 | #define CONFIG_CMD_FAT /* include support for FAT/storage*/ | |
103 | #define CONFIG_DOS_PARTITION /* include support for FAT/storage*/ | |
104 | #endif | |
105 | ||
106 | #ifdef CONFIG_MUSB_HCD /* include support for usb host */ | |
107 | #define CONFIG_CMD_USB /* include support for usb cmd */ | |
108 | #define CONFIG_USB_STORAGE /* MSC class support */ | |
109 | #define CONFIG_CMD_STORAGE /* inclue support for usb-storage cmd */ | |
110 | #define CONFIG_CMD_FAT /* inclue support for FAT/storage */ | |
111 | #define CONFIG_DOS_PARTITION /* inclue support for FAT/storage */ | |
112 | ||
113 | #ifdef CONFIG_USB_KEYBOARD /* HID class support */ | |
114 | #define CONFIG_SYS_USB_EVENT_POLL | |
115 | ||
116 | #define CONFIG_PREBOOT "usb start" | |
117 | #endif /* CONFIG_USB_KEYBOARD */ | |
118 | #endif /* CONFIG_MUSB_HCD */ | |
119 | ||
120 | #ifdef CONFIG_MUSB_UDC | |
121 | #define CONFIG_USB_DEVICE 1 | |
122 | #define CONFIG_USB_TTY 1 | |
123 | #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 | |
124 | #define CONFIG_USBD_VENDORID 0x0451 | |
125 | #define CONFIG_USBD_PRODUCTID 0x5678 | |
126 | #define CONFIG_USBD_MANUFACTURER "Texas Instruments" | |
127 | #define CONFIG_USBD_PRODUCT_NAME "DM365VM" | |
128 | #endif /* CONFIG_MUSB_UDC */ | |
129 | ||
2d4072c0 SP |
130 | /* U-Boot command configuration */ |
131 | #include <config_cmd_default.h> | |
132 | ||
133 | #undef CONFIG_CMD_BDI | |
134 | #undef CONFIG_CMD_FLASH | |
135 | #undef CONFIG_CMD_FPGA | |
136 | #undef CONFIG_CMD_SETGETDCR | |
137 | ||
138 | #define CONFIG_CMD_ASKENV | |
139 | #define CONFIG_CMD_DHCP | |
140 | #define CONFIG_CMD_I2C | |
141 | #define CONFIG_CMD_PING | |
142 | #define CONFIG_CMD_SAVES | |
2d4072c0 | 143 | |
8f5d4687 HM |
144 | #ifdef CONFIG_CMD_BDI |
145 | #define CONFIG_CLOCKS | |
146 | #endif | |
147 | ||
e3e4e2f4 SP |
148 | #ifdef CONFIG_MMC |
149 | #define CONFIG_DOS_PARTITION | |
150 | #define CONFIG_CMD_EXT2 | |
151 | #define CONFIG_CMD_FAT | |
152 | #define CONFIG_CMD_MMC | |
153 | #endif | |
154 | ||
2d4072c0 SP |
155 | #ifdef CONFIG_NAND_DAVINCI |
156 | #define CONFIG_CMD_MTDPARTS | |
157 | #define CONFIG_MTD_PARTITIONS | |
158 | #define CONFIG_MTD_DEVICE | |
159 | #define CONFIG_CMD_NAND | |
160 | #define CONFIG_CMD_UBI | |
161 | #define CONFIG_RBTREE | |
162 | #endif | |
163 | ||
164 | #define CONFIG_CRC32_VERIFY | |
165 | #define CONFIG_MX_CYCLIC | |
166 | ||
167 | /* U-Boot general configuration */ | |
2d4072c0 | 168 | #define CONFIG_BOOTFILE "uImage" /* Boot file name */ |
e7b20970 | 169 | #define CONFIG_SYS_PROMPT "DM36x EVM # " /* Monitor Command Prompt */ |
2d4072c0 SP |
170 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ |
171 | #define CONFIG_SYS_PBSIZE /* Print buffer size */ \ | |
172 | (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) | |
173 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ | |
174 | #define CONFIG_SYS_HUSH_PARSER | |
2d4072c0 SP |
175 | #define CONFIG_SYS_LONGHELP |
176 | ||
177 | #ifdef CONFIG_NAND_DAVINCI | |
a16df2c1 | 178 | #define CONFIG_ENV_SIZE (256 << 10) /* 256 KiB */ |
2d4072c0 SP |
179 | #define CONFIG_ENV_IS_IN_NAND |
180 | #define CONFIG_ENV_OFFSET 0x3C0000 | |
181 | #undef CONFIG_ENV_IS_IN_FLASH | |
182 | #endif | |
183 | ||
e3e4e2f4 SP |
184 | #if defined(CONFIG_MMC) && !defined(CONFIG_ENV_IS_IN_NAND) |
185 | #define CONFIG_CMD_ENV | |
186 | #define CONFIG_ENV_SIZE (16 << 10) /* 16 KiB */ | |
187 | #define CONFIG_ENV_OFFSET (51 << 9) /* Sector 51 */ | |
188 | #define CONFIG_ENV_IS_IN_MMC | |
189 | #undef CONFIG_ENV_IS_IN_FLASH | |
190 | #endif | |
191 | ||
2d4072c0 SP |
192 | #define CONFIG_BOOTDELAY 3 |
193 | #define CONFIG_BOOTCOMMAND \ | |
194 | "dhcp;bootm" | |
195 | #define CONFIG_BOOTARGS \ | |
196 | "console=ttyS0,115200n8 " \ | |
197 | "root=/dev/mmcblk0p1 rootwait rootfstype=ext3 ro" | |
198 | ||
199 | #define CONFIG_CMDLINE_EDITING | |
200 | #define CONFIG_VERSION_VARIABLE | |
201 | #define CONFIG_TIMESTAMP | |
202 | ||
203 | /* U-Boot memory configuration */ | |
a16df2c1 | 204 | #define CONFIG_SYS_MALLOC_LEN (1 << 20) /* 1 MiB */ |
2d4072c0 SP |
205 | #define CONFIG_SYS_MEMTEST_START 0x87000000 /* physical address */ |
206 | #define CONFIG_SYS_MEMTEST_END 0x88000000 /* test 16MB RAM */ | |
207 | ||
208 | /* Linux interfacing */ | |
209 | #define CONFIG_CMDLINE_TAG | |
210 | #define CONFIG_SETUP_MEMORY_TAGS | |
211 | #define CONFIG_SYS_BARGSIZE 1024 /* bootarg Size */ | |
212 | #define CONFIG_SYS_LOAD_ADDR 0x80700000 /* kernel address */ | |
213 | ||
214 | ||
215 | /* NAND configuration issocketed with two chipselects just like the DM355 EVM. | |
216 | * It normally comes with a 2GByte SLC part with 2KB pages | |
217 | * (and 128KB erase blocks); other | |
218 | * 2GByte parts may have 4KB pages, 256KB erase blocks, and use MLC. (MLC | |
219 | * pretty much demands the 4-bit ECC support.) You can of course swap in | |
220 | * other parts, including small page ones. | |
221 | */ | |
222 | #define MTDIDS_DEFAULT "nand0=davinci_nand.0" | |
223 | ||
224 | #ifdef CONFIG_SYS_NAND_LARGEPAGE | |
225 | /* Use same layout for 128K/256K blocks; allow some bad blocks */ | |
226 | #define PART_BOOT "2m(bootloader)ro," | |
227 | #else | |
228 | /* Assume 16K erase blocks; allow a few bad ones. */ | |
229 | #define PART_BOOT "512k(bootloader)ro," | |
230 | #endif | |
231 | ||
232 | #define PART_KERNEL "4m(kernel)," /* kernel + initramfs */ | |
233 | #define PART_REST "-(filesystem)" | |
234 | ||
235 | #define MTDPARTS_DEFAULT \ | |
236 | "mtdparts=davinci_nand.0:" PART_BOOT PART_KERNEL PART_REST | |
237 | ||
47fefac4 SP |
238 | #define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MB */ |
239 | ||
240 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 | |
241 | #define CONFIG_SYS_INIT_SP_ADDR \ | |
242 | (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE) | |
243 | ||
2d4072c0 | 244 | #endif /* __CONFIG_H */ |