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2bae75a4 SR |
1 | /* |
2 | * Copyright (C) 2014 Stefan Roese <sr@denx.de> | |
3 | * | |
4 | * SPDX-License-Identifier: GPL-2.0+ | |
5 | */ | |
6 | ||
7 | #ifndef _CONFIG_DB_88F6820_GP_H | |
8 | #define _CONFIG_DB_88F6820_GP_H | |
9 | ||
10 | /* | |
11 | * High Level Configuration Options (easy to change) | |
12 | */ | |
2bae75a4 | 13 | |
2bae75a4 SR |
14 | #define CONFIG_DISPLAY_BOARDINFO_LATE |
15 | ||
2923c2d2 SR |
16 | /* |
17 | * TEXT_BASE needs to be below 16MiB, since this area is scrubbed | |
18 | * for DDR ECC byte filling in the SPL before loading the main | |
19 | * U-Boot into it. | |
20 | */ | |
21 | #define CONFIG_SYS_TEXT_BASE 0x00800000 | |
2bae75a4 SR |
22 | #define CONFIG_SYS_TCLK 250000000 /* 250MHz */ |
23 | ||
24 | /* | |
25 | * Commands configuration | |
26 | */ | |
2bae75a4 | 27 | #define CONFIG_CMD_ENV |
ce2cb1d3 | 28 | #define CONFIG_CMD_PCI |
c649e3c9 | 29 | #define CONFIG_SCSI |
2bae75a4 SR |
30 | |
31 | /* I2C */ | |
32 | #define CONFIG_SYS_I2C | |
33 | #define CONFIG_SYS_I2C_MVTWSI | |
34 | #define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE | |
35 | #define CONFIG_SYS_I2C_SLAVE 0x0 | |
36 | #define CONFIG_SYS_I2C_SPEED 100000 | |
37 | ||
38 | /* SPI NOR flash default params, used by sf commands */ | |
39 | #define CONFIG_SF_DEFAULT_SPEED 1000000 | |
40 | #define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 | |
2bae75a4 | 41 | |
e80f1e85 SR |
42 | /* |
43 | * SDIO/MMC Card Configuration | |
44 | */ | |
e80f1e85 SR |
45 | #define CONFIG_SYS_MMC_BASE MVEBU_SDIO_BASE |
46 | ||
7cbaff95 SR |
47 | /* |
48 | * SATA/SCSI/AHCI configuration | |
49 | */ | |
50 | #define CONFIG_LIBATA | |
51 | #define CONFIG_SCSI_AHCI | |
52 | #define CONFIG_SCSI_AHCI_PLAT | |
53 | #define CONFIG_SYS_SCSI_MAX_SCSI_ID 2 | |
54 | #define CONFIG_SYS_SCSI_MAX_LUN 1 | |
55 | #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ | |
56 | CONFIG_SYS_SCSI_MAX_LUN) | |
57 | ||
e80f1e85 | 58 | /* Partition support */ |
e80f1e85 SR |
59 | |
60 | /* Additional FS support/configuration */ | |
61 | #define CONFIG_SUPPORT_VFAT | |
62 | ||
59565736 | 63 | /* USB/EHCI configuration */ |
59565736 SR |
64 | #define CONFIG_EHCI_IS_TDI |
65 | ||
2bae75a4 SR |
66 | /* Environment in SPI NOR flash */ |
67 | #define CONFIG_ENV_IS_IN_SPI_FLASH | |
68 | #define CONFIG_ENV_OFFSET (1 << 20) /* 1MiB in */ | |
69 | #define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */ | |
70 | #define CONFIG_ENV_SECT_SIZE (256 << 10) /* 256KiB sectors */ | |
71 | ||
72 | #define CONFIG_PHY_MARVELL /* there is a marvell phy */ | |
2bae75a4 SR |
73 | #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ |
74 | ||
ce2cb1d3 | 75 | /* PCIe support */ |
6451223a | 76 | #ifndef CONFIG_SPL_BUILD |
ce2cb1d3 | 77 | #define CONFIG_PCI_MVEBU |
ce2cb1d3 | 78 | #define CONFIG_PCI_SCAN_SHOW |
6451223a | 79 | #endif |
ce2cb1d3 | 80 | |
2bae75a4 SR |
81 | #define CONFIG_SYS_ALT_MEMTEST |
82 | ||
3fd38af7 KS |
83 | /* Keep device tree and initrd in lower memory so the kernel can access them */ |
84 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
85 | "fdt_high=0x10000000\0" \ | |
86 | "initrd_high=0x10000000\0" | |
87 | ||
9e30b31d | 88 | /* SPL */ |
7853c508 SR |
89 | /* |
90 | * Select the boot device here | |
91 | * | |
92 | * Currently supported are: | |
93 | * SPL_BOOT_SPI_NOR_FLASH - Booting via SPI NOR flash | |
94 | * SPL_BOOT_SDIO_MMC_CARD - Booting via SDIO/MMC card (partition 1) | |
95 | */ | |
96 | #define SPL_BOOT_SPI_NOR_FLASH 1 | |
97 | #define SPL_BOOT_SDIO_MMC_CARD 2 | |
98 | #define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SPI_NOR_FLASH | |
99 | ||
9e30b31d SR |
100 | /* Defines for SPL */ |
101 | #define CONFIG_SPL_FRAMEWORK | |
102 | #define CONFIG_SPL_SIZE (140 << 10) | |
103 | #define CONFIG_SPL_TEXT_BASE 0x40000030 | |
104 | #define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x0030) | |
105 | ||
106 | #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) | |
107 | #define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) | |
108 | ||
6451223a SR |
109 | #ifdef CONFIG_SPL_BUILD |
110 | #define CONFIG_SYS_MALLOC_SIMPLE | |
111 | #endif | |
9e30b31d SR |
112 | |
113 | #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) | |
114 | #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) | |
115 | ||
7853c508 | 116 | #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH |
9e30b31d | 117 | /* SPL related SPI defines */ |
9e30b31d | 118 | #define CONFIG_SPL_SPI_LOAD |
09a54c00 | 119 | #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x24000 |
7853c508 SR |
120 | #define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS |
121 | #endif | |
122 | ||
123 | #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD | |
124 | /* SPL related MMC defines */ | |
7853c508 SR |
125 | #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 1 |
126 | #define CONFIG_SYS_MMC_U_BOOT_OFFS (160 << 10) | |
127 | #define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS | |
7853c508 SR |
128 | #ifdef CONFIG_SPL_BUILD |
129 | #define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */ | |
130 | #endif | |
131 | #endif | |
9e30b31d | 132 | |
2bae75a4 SR |
133 | /* |
134 | * mv-common.h should be defined after CMD configs since it used them | |
135 | * to enable certain macros | |
136 | */ | |
137 | #include "mv-common.h" | |
138 | ||
139 | #endif /* _CONFIG_DB_88F6820_GP_H */ |