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1/*
2 * (C) Copyright 2003
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
1a459660 5 * SPDX-License-Identifier: GPL-2.0+
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6 */
7
8/*
9 * This file contains the configuration parameters for the dbau1x00 board.
10 */
11
12#ifndef __CONFIG_H
13#define __CONFIG_H
14
5da627a4 15#define CONFIG_DBAU1X00 1
8bde63eb 16#define CONFIG_SOC_AU1X00 1 /* alchemy series cpu */
5da627a4 17
a2663ea4 18#ifdef CONFIG_DBAU1000
5da627a4 19/* Also known as Merlot */
8bde63eb 20#define CONFIG_SOC_AU1000 1
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21#else
22#ifdef CONFIG_DBAU1100
8bde63eb 23#define CONFIG_SOC_AU1100 1
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24#else
25#ifdef CONFIG_DBAU1500
8bde63eb 26#define CONFIG_SOC_AU1500 1
d4ca31c4 27#else
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28#ifdef CONFIG_DBAU1550
29/* Cabernet */
8bde63eb 30#define CONFIG_SOC_AU1550 1
ff36fd85 31#else
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32#error "No valid board set"
33#endif
34#endif
35#endif
ff36fd85 36#endif
5da627a4 37
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38
39#define CONFIG_BAUDRATE 115200
40
41/* valid baudrates */
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42
43#define CONFIG_TIMESTAMP /* Print image info with timestamp */
44#undef CONFIG_BOOTARGS
45
46#define CONFIG_EXTRA_ENV_SETTINGS \
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47 "addmisc=setenv bootargs ${bootargs} " \
48 "console=ttyS0,${baudrate} " \
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49 "panic=1\0" \
50 "bootfile=/tftpboot/vmlinux.srec\0" \
fe126d8b 51 "load=tftp 80500000 ${u-boot}\0" \
5da627a4 52 ""
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53
54#ifdef CONFIG_DBAU1550
55/* Boot from flash by default, revert to bootp */
56#define CONFIG_BOOTCOMMAND "bootm 0xbfc20000; bootp; bootm"
ff36fd85 57#else /* CONFIG_DBAU1550 */
ad88297e 58#define CONFIG_BOOTCOMMAND "bootp;bootm"
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59#endif /* CONFIG_DBAU1550 */
60
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61/*
62 * BOOTP options
63 */
64#define CONFIG_BOOTP_BOOTFILESIZE
65#define CONFIG_BOOTP_BOOTPATH
66#define CONFIG_BOOTP_GATEWAY
67#define CONFIG_BOOTP_HOSTNAME
68
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69/*
70 * Command line configuration.
71 */
ab999ba1 72#undef CONFIG_CMD_BEDBUG
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73
74#ifdef CONFIG_DBAU1550
75
ab999ba1 76#undef CONFIG_CMD_IDE
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77#undef CONFIG_CMD_PCMCIA
78
79#else
80
81#define CONFIG_CMD_IDE
ab999ba1 82
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83#endif
84
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85/*
86 * Miscellaneous configurable options
87 */
6d0f6bcf 88#define CONFIG_SYS_LONGHELP /* undef to save memory */
ff36fd85 89
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90#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
91#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
92#define CONFIG_SYS_MAXARGS 16 /* max number of command args*/
5da627a4 93
6d0f6bcf 94#define CONFIG_SYS_MALLOC_LEN 128*1024
5da627a4 95
6d0f6bcf 96#define CONFIG_SYS_BOOTPARAMS_LEN 128*1024
5da627a4 97
6d0f6bcf 98#define CONFIG_SYS_MHZ 396
ff36fd85 99
6d0f6bcf 100#if (CONFIG_SYS_MHZ % 12) != 0
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101#error "Invalid CPU frequency - must be multiple of 12!"
102#endif
103
6d0f6bcf 104#define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000)
a55d4817 105
6d0f6bcf 106#define CONFIG_SYS_SDRAM_BASE 0x80000000 /* Cached addr */
5da627a4 107
6d0f6bcf 108#define CONFIG_SYS_LOAD_ADDR 0x81000000 /* default load address */
5da627a4 109
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110#define CONFIG_SYS_MEMTEST_START 0x80100000
111#define CONFIG_SYS_MEMTEST_END 0x80800000
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112
113/*-----------------------------------------------------------------------
114 * FLASH and environment organization
115 */
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116#ifdef CONFIG_DBAU1550
117
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118#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */
119#define CONFIG_SYS_MAX_FLASH_SECT (512) /* max number of sectors on one chip */
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120
121#define PHYS_FLASH_1 0xb8000000 /* Flash Bank #1 */
122#define PHYS_FLASH_2 0xbc000000 /* Flash Bank #2 */
123
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124#else /* CONFIG_DBAU1550 */
125
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126#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */
127#define CONFIG_SYS_MAX_FLASH_SECT (128) /* max number of sectors on one chip */
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128
129#define PHYS_FLASH_1 0xbec00000 /* Flash Bank #1 */
130#define PHYS_FLASH_2 0xbfc00000 /* Flash Bank #2 */
131
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132#endif /* CONFIG_DBAU1550 */
133
6d0f6bcf 134#define CONFIG_SYS_FLASH_BANKS_LIST {PHYS_FLASH_1, PHYS_FLASH_2}
ad88297e 135
6d0f6bcf 136#define CONFIG_SYS_FLASH_CFI 1
00b1883a 137#define CONFIG_FLASH_CFI_DRIVER 1
ff36fd85 138
14d0a02a 139#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
6d0f6bcf 140#define CONFIG_SYS_MONITOR_LEN (192 << 10)
5da627a4 141
6d0f6bcf 142#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
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143
144/* We boot from this flash, selected with dip switch */
6d0f6bcf 145#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_2
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146
147/* timeout values are in ticks */
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148#define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Timeout for Flash Erase */
149#define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Timeout for Flash Write */
5da627a4 150
93f6d725 151#define CONFIG_ENV_IS_NOWHERE 1
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152
153/* Address and size of Primary Environment Sector */
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154#define CONFIG_ENV_ADDR 0xB0030000
155#define CONFIG_ENV_SIZE 0x10000
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156
157#define CONFIG_FLASH_16BIT
158
159#define CONFIG_NR_DRAM_BANKS 2
160
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161#ifdef CONFIG_DBAU1550
162#define MEM_SIZE 192
163#else
164#define MEM_SIZE 64
165#endif
166
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167#define CONFIG_MEMSIZE_IN_BYTES
168
ff36fd85 169#ifndef CONFIG_DBAU1550
5da627a4 170/*---ATA PCMCIA ------------------------------------*/
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171#define CONFIG_SYS_PCMCIA_MEM_SIZE 0x4000000 /* Offset to slot 1 FIXME!!! */
172#define CONFIG_SYS_PCMCIA_MEM_ADDR 0x20000000
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173#define CONFIG_PCMCIA_SLOT_A
174
175#define CONFIG_ATAPI 1
176#define CONFIG_MAC_PARTITION 1
177
178/* We run CF in "true ide" mode or a harddrive via pcmcia */
179#define CONFIG_IDE_PCMCIA 1
180
181/* We only support one slot for now */
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182#define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */
183#define CONFIG_SYS_IDE_MAXDEVICE 1 /* max. 1 drive per IDE bus */
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184
185#undef CONFIG_IDE_LED /* LED for ide not supported */
186#undef CONFIG_IDE_RESET /* reset for ide not supported */
187
6d0f6bcf 188#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000
5da627a4 189
6d0f6bcf 190#define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_PCMCIA_MEM_ADDR
5da627a4 191
d4ca31c4 192/* Offset for data I/O */
6d0f6bcf 193#define CONFIG_SYS_ATA_DATA_OFFSET 8
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194
195/* Offset for normal register accesses */
6d0f6bcf 196#define CONFIG_SYS_ATA_REG_OFFSET 0
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197
198/* Offset for alternate registers */
6d0f6bcf 199#define CONFIG_SYS_ATA_ALT_OFFSET 0x0100
ff36fd85 200#endif /* CONFIG_DBAU1550 */
5da627a4 201
5da627a4 202#endif /* __CONFIG_H */