[people/ms/u-boot.git] / include / configs / dh_imx6.h

/*
 * DHCOM DH-iMX6 PDK board configuration
 *
 * Copyright (C) 2017 Marek Vasut <marex@denx.de>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __DH_IMX6_CONFIG_H
#define __DH_IMX6_CONFIG_H

#include <asm/arch/imx-regs.h>

#include "mx6_common.h"

/*
 * SPI NOR layout:
 * 0x00_0000-0x00_ffff ... U-Boot SPL
 * 0x01_0000-0x0f_ffff ... U-Boot
 * 0x10_0000-0x10_ffff ... U-Boot env #1
 * 0x11_0000-0x11_ffff ... U-Boot env #2
 * 0x12_0000-0x1f_ffff ... UNUSED
 */

/* SPL */
#include "imx6_spl.h"			/* common IMX6 SPL configuration */
#define CONFIG_SYS_SPI_U_BOOT_OFFS	0x11400
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SPL_TARGET		"u-boot-with-spl.imx"

/* Miscellaneous configurable options */

#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_REVISION_TAG

#define CONFIG_BOUNCE_BUFFER
#define CONFIG_BZIP2

/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN		(4 * SZ_1M)

/* Bootcounter */
#define CONFIG_SYS_BOOTCOUNT_BE

/* FEC ethernet */
#define CONFIG_MII
#define IMX_FEC_BASE			ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE		RMII
#define CONFIG_ETHPRIME			"FEC"
#define CONFIG_FEC_MXC_PHYADDR		0
#define CONFIG_ARP_TIMEOUT		200UL

/* Fuses */
#ifdef CONFIG_CMD_FUSE
#define CONFIG_MXC_OCOTP
#endif

/* I2C Configs */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED		100000

/* MMC Configs */
#define CONFIG_FSL_ESDHC
#define CONFIG_FSL_USDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR	0
#define CONFIG_SYS_FSL_USDHC_NUM	3
#define CONFIG_SYS_MMC_ENV_DEV		2 /* 1 = SDHC3, 2 = SDHC4 (eMMC) */

/* SATA Configs */
#ifdef CONFIG_CMD_SATA
#define CONFIG_SYS_SATA_MAX_DEVICE	1
#define CONFIG_DWC_AHSATA_PORT_ID	0
#define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_ARB_BASE_ADDR
#define CONFIG_LBA48
#endif

/* SPI Flash Configs */
#ifdef CONFIG_CMD_SF
#define CONFIG_SF_DEFAULT_BUS		0
#define CONFIG_SF_DEFAULT_CS		0
#define CONFIG_SF_DEFAULT_SPEED		25000000
#define CONFIG_SF_DEFAULT_MODE		(SPI_MODE_0)
#endif

/* UART */
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE		UART1_BASE
#define CONFIG_CONS_INDEX		1
#define CONFIG_BAUDRATE			115200

/* USB Configs */
#ifdef CONFIG_CMD_USB
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_ASIX
#define CONFIG_MXC_USB_PORTSC		(PORT_PTS_UTMI | PORT_PTS_PTW)
#define CONFIG_MXC_USB_FLAGS		0
#define CONFIG_USB_MAX_CONTROLLER_COUNT	2 /* Enabled USB controller number */

/* USB Gadget (DFU, UMS) */
#if defined(CONFIG_CMD_DFU) || defined(CONFIG_CMD_USB_MASS_STORAGE)
#define CONFIG_SYS_DFU_DATA_BUF_SIZE	(16 * 1024 * 1024)
#define DFU_DEFAULT_POLL_TIMEOUT	300

/* USB IDs */
#define CONFIG_G_DNL_UMS_VENDOR_NUM	0x0525
#define CONFIG_G_DNL_UMS_PRODUCT_NUM	0xA4A5
#endif
#endif

/* Watchdog */
#define CONFIG_HW_WATCHDOG
#define CONFIG_IMX_WATCHDOG
#define CONFIG_WATCHDOG_TIMEOUT_MSECS	60000

/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE

#define CONFIG_LOADADDR			0x12000000
#define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR

#ifndef CONFIG_SPL_BUILD
#define CONFIG_EXTRA_ENV_SETTINGS	\
	"console=ttymxc0,115200\0"	\
	"fdt_addr=0x18000000\0"		\
	"fdt_high=0xffffffff\0"		\
	"initrd_high=0xffffffff\0"	\
	"kernel_addr_r=0x10008000\0"	\
	"fdt_addr_r=0x13000000\0"	\
	"ramdisk_addr_r=0x18000000\0"	\
	"scriptaddr=0x14000000\0"	\
	"fdtfile=imx6q-dhcom-pdk2.dtb\0"\
	BOOTENV

#define CONFIG_BOOTCOMMAND		"run distro_bootcmd"

#define BOOT_TARGET_DEVICES(func) \
	func(MMC, mmc, 0) \
	func(MMC, mmc, 2) \
	func(USB, usb, 1) \
	func(SATA, sata, 0) \
	func(DHCP, dhcp, na)

#include <config_distro_bootcmd.h>
#endif

/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS		1
#define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR

#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
#define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE

#define CONFIG_SYS_INIT_SP_OFFSET \
	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)

#define CONFIG_SYS_INIT_SP_ADDR \
	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)

#define CONFIG_SYS_MEMTEST_START	0x10000000
#define CONFIG_SYS_MEMTEST_END		0x20000000
#define CONFIG_SYS_MEMTEST_SCRATCH	0x10800000

/* Environment */
#define CONFIG_ENV_SIZE			(16 * 1024)
#define CONFIG_SYS_REDUNDAND_ENVIRONMENT

#if defined(CONFIG_ENV_IS_IN_SPI_FLASH)
#define CONFIG_ENV_OFFSET		(1024 * 1024)
#define CONFIG_ENV_SECT_SIZE		(64 * 1024)
#define CONFIG_ENV_OFFSET_REDUND	\
	(CONFIG_ENV_OFFSET + CONFIG_ENV_SECT_SIZE)
#define CONFIG_ENV_SIZE_REDUND		CONFIG_ENV_SIZE
#define CONFIG_ENV_SPI_BUS		CONFIG_SF_DEFAULT_BUS
#define CONFIG_ENV_SPI_CS		CONFIG_SF_DEFAULT_CS
#define CONFIG_ENV_SPI_MODE		CONFIG_SF_DEFAULT_MODE
#define CONFIG_ENV_SPI_MAX_HZ		CONFIG_SF_DEFAULT_SPEED
#endif

#endif	/* __DH_IMX6_CONFIG_H */
Commit	Line	Data
0a333602 MV	1	/*
	2	* DHCOM DH-iMX6 PDK board configuration
	3	*
	4	* Copyright (C) 2017 Marek Vasut <marex@denx.de>
	5	*
	6	* SPDX-License-Identifier: GPL-2.0+
	7	*/
	8
	9	#ifndef __DH_IMX6_CONFIG_H
	10	#define __DH_IMX6_CONFIG_H
	11
	12	#include <asm/arch/imx-regs.h>
	13
0a333602 MV	14	#include "mx6_common.h"
	15
	16	/*
	17	* SPI NOR layout:
	18	* 0x00_0000-0x00_ffff ... U-Boot SPL
	19	* 0x01_0000-0x0f_ffff ... U-Boot
	20	* 0x10_0000-0x10_ffff ... U-Boot env #1
	21	* 0x11_0000-0x11_ffff ... U-Boot env #2
	22	* 0x12_0000-0x1f_ffff ... UNUSED
	23	*/
	24
	25	/* SPL */
	26	#include "imx6_spl.h" /* common IMX6 SPL configuration */
	27	#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x11400
	28	#define CONFIG_SPL_SPI_LOAD
	29	#define CONFIG_SPL_TARGET "u-boot-with-spl.imx"
	30
	31	/* Miscellaneous configurable options */
0a333602 MV	32
	33	#define CONFIG_CMDLINE_TAG
	34	#define CONFIG_SETUP_MEMORY_TAGS
	35	#define CONFIG_INITRD_TAG
	36	#define CONFIG_REVISION_TAG
	37
0a333602 MV	38	#define CONFIG_BOUNCE_BUFFER
	39	#define CONFIG_BZIP2
	40
	41	/* Size of malloc() pool */
	42	#define CONFIG_SYS_MALLOC_LEN (4 * SZ_1M)
	43
	44	/* Bootcounter */
0a333602 MV	45	#define CONFIG_SYS_BOOTCOUNT_BE
	46
	47	/* FEC ethernet */
	48	#define CONFIG_MII
	49	#define IMX_FEC_BASE ENET_BASE_ADDR
	50	#define CONFIG_FEC_XCV_TYPE RMII
	51	#define CONFIG_ETHPRIME "FEC"
	52	#define CONFIG_FEC_MXC_PHYADDR 0
	53	#define CONFIG_ARP_TIMEOUT 200UL
	54
	55	/* Fuses */
	56	#ifdef CONFIG_CMD_FUSE
	57	#define CONFIG_MXC_OCOTP
	58	#endif
	59
0a333602 MV	60	/* I2C Configs */
	61	#define CONFIG_SYS_I2C
	62	#define CONFIG_SYS_I2C_MXC
	63	#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
	64	#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
	65	#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
	66	#define CONFIG_SYS_I2C_SPEED 100000
	67
	68	/* MMC Configs */
	69	#define CONFIG_FSL_ESDHC
	70	#define CONFIG_FSL_USDHC
	71	#define CONFIG_SYS_FSL_ESDHC_ADDR 0
	72	#define CONFIG_SYS_FSL_USDHC_NUM 3
	73	#define CONFIG_SYS_MMC_ENV_DEV 2 /* 1 = SDHC3, 2 = SDHC4 (eMMC) */
	74
	75	/* SATA Configs */
	76	#ifdef CONFIG_CMD_SATA
0a333602 MV	77	#define CONFIG_SYS_SATA_MAX_DEVICE 1
	78	#define CONFIG_DWC_AHSATA_PORT_ID 0
	79	#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
	80	#define CONFIG_LBA48
0a333602 MV	81	#endif
	82
	83	/* SPI Flash Configs */
	84	#ifdef CONFIG_CMD_SF
0a333602 MV	85	#define CONFIG_SF_DEFAULT_BUS 0
	86	#define CONFIG_SF_DEFAULT_CS 0
	87	#define CONFIG_SF_DEFAULT_SPEED 25000000
	88	#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
	89	#endif
	90
	91	/* UART */
	92	#define CONFIG_MXC_UART
	93	#define CONFIG_MXC_UART_BASE UART1_BASE
	94	#define CONFIG_CONS_INDEX 1
	95	#define CONFIG_BAUDRATE 115200
	96
	97	/* USB Configs */
	98	#ifdef CONFIG_CMD_USB
	99	#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
	100	#define CONFIG_USB_HOST_ETHER
	101	#define CONFIG_USB_ETHER_ASIX
	102	#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI \| PORT_PTS_PTW)
	103	#define CONFIG_MXC_USB_FLAGS 0
	104	#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Enabled USB controller number */
506abdb4 MV	105
	106	/* USB Gadget (DFU, UMS) */
	107	#if defined(CONFIG_CMD_DFU) \|\| defined(CONFIG_CMD_USB_MASS_STORAGE)
506abdb4 MV	108	#define CONFIG_SYS_DFU_DATA_BUF_SIZE (16 * 1024 * 1024)
	109	#define DFU_DEFAULT_POLL_TIMEOUT 300
	110
	111	/* USB IDs */
	112	#define CONFIG_G_DNL_UMS_VENDOR_NUM 0x0525
	113	#define CONFIG_G_DNL_UMS_PRODUCT_NUM 0xA4A5
	114	#endif
0a333602 MV	115	#endif
	116
	117	/* Watchdog */
	118	#define CONFIG_HW_WATCHDOG
	119	#define CONFIG_IMX_WATCHDOG
	120	#define CONFIG_WATCHDOG_TIMEOUT_MSECS 60000
	121
	122	/* allow to overwrite serial and ethaddr */
	123	#define CONFIG_ENV_OVERWRITE
	124
0a333602 MV	125	#define CONFIG_LOADADDR 0x12000000
	126	#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
	127
	128	#ifndef CONFIG_SPL_BUILD
	129	#define CONFIG_EXTRA_ENV_SETTINGS \
	130	"console=ttymxc0,115200\0" \
	131	"fdt_addr=0x18000000\0" \
	132	"fdt_high=0xffffffff\0" \
	133	"initrd_high=0xffffffff\0" \
	134	"kernel_addr_r=0x10008000\0" \
	135	"fdt_addr_r=0x13000000\0" \
	136	"ramdisk_addr_r=0x18000000\0" \
	137	"scriptaddr=0x14000000\0" \
	138	"fdtfile=imx6q-dhcom-pdk2.dtb\0"\
	139	BOOTENV
	140
	141	#define CONFIG_BOOTCOMMAND "run distro_bootcmd"
	142
	143	#define BOOT_TARGET_DEVICES(func) \
	144	func(MMC, mmc, 0) \
	145	func(MMC, mmc, 2) \
	146	func(USB, usb, 1) \
	147	func(SATA, sata, 0) \
	148	func(DHCP, dhcp, na)
	149
	150	#include <config_distro_bootcmd.h>
	151	#endif
	152
	153	/* Physical Memory Map */
	154	#define CONFIG_NR_DRAM_BANKS 1
	155	#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
	156
	157	#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
	158	#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
	159	#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
	160
	161	#define CONFIG_SYS_INIT_SP_OFFSET \
	162	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
	163
	164	#define CONFIG_SYS_INIT_SP_ADDR \
	165	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
	166
	167	#define CONFIG_SYS_MEMTEST_START 0x10000000
	168	#define CONFIG_SYS_MEMTEST_END 0x20000000
	169	#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
	170
	171	/* Environment */
	172	#define CONFIG_ENV_SIZE (16 * 1024)
	173	#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
	174
	175	#if defined(CONFIG_ENV_IS_IN_SPI_FLASH)
	176	#define CONFIG_ENV_OFFSET (1024 * 1024)
	177	#define CONFIG_ENV_SECT_SIZE (64 * 1024)
	178	#define CONFIG_ENV_OFFSET_REDUND \
	179	(CONFIG_ENV_OFFSET + CONFIG_ENV_SECT_SIZE)
	180	#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
	181	#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
	182	#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
	183	#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
	184	#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
	185	#endif
	186
	187	#endif /* __DH_IMX6_CONFIG_H */