projects / people / ms / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 3ef5ebeb LV |
1 | /* |
| 2 | * (C) Copyright 2013 | |
| 3 | * Texas Instruments Incorporated. | |
| 4 | * Lokesh Vutla <lokeshvutla@ti.com> | |
| 5 | * | |
| 6 | * Configuration settings for the TI DRA7XX board. | |
| 7 | * See omap5_common.h for omap5 common settings. | |
| 8 | * | |
| 3765b3e7 | 9 | * SPDX-License-Identifier: GPL-2.0+ |
| 3ef5ebeb LV |
10 | */ |
| 11 | ||
| 12 | #ifndef __CONFIG_DRA7XX_EVM_H | |
| 13 | #define __CONFIG_DRA7XX_EVM_H | |
| 14 | ||
| a8017574 | 15 | #define CONFIG_DRA7XX |
| 3ef5ebeb | 16 | |
| d3d33daf LV |
17 | /* MMC ENV related defines */ |
| 18 | #define CONFIG_ENV_IS_IN_MMC | |
| 19 | #define CONFIG_SYS_MMC_ENV_DEV 1 /* SLOT2: eMMC(1) */ | |
| 20 | #define CONFIG_ENV_OFFSET 0xE0000 | |
| 21 | #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) | |
| 22 | #define CONFIG_SYS_REDUNDAND_ENVIRONMENT | |
| 23 | #define CONFIG_CMD_SAVEENV | |
| 3ef5ebeb | 24 | |
| a8017574 | 25 | #define CONSOLEDEV "ttyO0" |
| 378bd1fb S |
26 | #define CONFIG_CONS_INDEX 1 |
| 27 | #define CONFIG_SYS_NS16550_COM1 UART1_BASE | |
| 28 | #define CONFIG_BAUDRATE 115200 | |
| 97405d84 LV |
29 | |
| 30 | #define CONFIG_SYS_OMAP_ABE_SYSCK | |
| 45dbbf29 | 31 | |
| a8017574 | 32 | #include <configs/omap5_common.h> |
| 45dbbf29 | 33 | |
| c9be62ca | 34 | /* CPSW Ethernet */ |
| 457bb505 | 35 | #define CONFIG_CMD_NET /* 'bootp' and 'tftp' */ |
| c9be62ca | 36 | #define CONFIG_CMD_DHCP |
| 457bb505 | 37 | #define CONFIG_BOOTP_DNS /* Configurable parts of CMD_DHCP */ |
| c9be62ca M |
38 | #define CONFIG_BOOTP_DNS2 |
| 39 | #define CONFIG_BOOTP_SEND_HOSTNAME | |
| 40 | #define CONFIG_BOOTP_GATEWAY | |
| 41 | #define CONFIG_BOOTP_SUBNETMASK | |
| 457bb505 TR |
42 | #define CONFIG_NET_RETRY_COUNT 10 |
| 43 | #define CONFIG_CMD_PING | |
| 44 | #define CONFIG_CMD_MII | |
| 45 | #define CONFIG_DRIVER_TI_CPSW /* Driver for IP block */ | |
| 46 | #define CONFIG_MII /* Required in net/eth.c */ | |
| 47 | #define CONFIG_PHY_GIGE /* per-board part of CPSW */ | |
| c9be62ca M |
48 | #define CONFIG_PHYLIB |
| 49 | #define CONFIG_PHY_ADDR 2 | |
| 50 | ||
| 247cdf04 MP |
51 | /* SPI */ |
| 52 | #undef CONFIG_OMAP3_SPI | |
| 53 | #define CONFIG_TI_QSPI | |
| 54 | #define CONFIG_SPI_FLASH | |
| 55 | #define CONFIG_SPI_FLASH_SPANSION | |
| 56 | #define CONFIG_CMD_SF | |
| 57 | #define CONFIG_CMD_SPI | |
| 58 | #define CONFIG_TI_SPI_MMAP | |
| 59 | #define CONFIG_SF_DEFAULT_SPEED 48000000 | |
| 60 | #define CONFIG_DEFAULT_SPI_MODE SPI_MODE_3 | |
| 61 | ||
| 62 | /* SPI SPL */ | |
| 63 | #define CONFIG_SPL_SPI_SUPPORT | |
| 64 | #define CONFIG_SPL_SPI_LOAD | |
| 65 | #define CONFIG_SPL_SPI_FLASH_SUPPORT | |
| 66 | #define CONFIG_SPL_SPI_BUS 0 | |
| 67 | #define CONFIG_SPL_SPI_CS 0 | |
| 68 | #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 | |
| 69 | ||
| 3ef5ebeb | 70 | #endif /* __CONFIG_DRA7XX_EVM_H */ |