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Commit | Line | Data |
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7237d22b | 1 | /* |
a187559e | 2 | * U-Boot - Configuration file for Cirrus Logic EDB93xx boards |
7237d22b SK |
3 | */ |
4 | ||
5 | #ifndef __CONFIG_H | |
6 | #define __CONFIG_H | |
7 | ||
8 | #ifdef CONFIG_MK_edb9301 | |
9 | #define CONFIG_EDB9301 | |
10 | #elif defined(CONFIG_MK_edb9302) | |
11 | #define CONFIG_EDB9302 | |
12 | #elif defined(CONFIG_MK_edb9302a) | |
13 | #define CONFIG_EDB9302A | |
14 | #elif defined(CONFIG_MK_edb9307) | |
15 | #define CONFIG_EDB9307 | |
16 | #elif defined(CONFIG_MK_edb9307a) | |
17 | #define CONFIG_EDB9307A | |
18 | #elif defined(CONFIG_MK_edb9312) | |
19 | #define CONFIG_EDB9312 | |
20 | #elif defined(CONFIG_MK_edb9315) | |
21 | #define CONFIG_EDB9315 | |
22 | #elif defined(CONFIG_MK_edb9315a) | |
23 | #define CONFIG_EDB9315A | |
24 | #else | |
25 | #error "no board defined" | |
26 | #endif | |
27 | ||
28 | /* Initial environment and monitor configuration options. */ | |
7237d22b SK |
29 | #define CONFIG_CMDLINE_TAG 1 |
30 | #define CONFIG_INITRD_TAG 1 | |
31 | #define CONFIG_SETUP_MEMORY_TAGS 1 | |
32 | #define CONFIG_BOOTARGS "root=/dev/nfs console=ttyAM0,115200 ip=dhcp" | |
33 | #define CONFIG_BOOTFILE "edb93xx.img" | |
34 | ||
7237d22b SK |
35 | #define CONFIG_SYS_LDSCRIPT "board/cirrus/edb93xx/u-boot.lds" |
36 | ||
7237d22b SK |
37 | #ifdef CONFIG_EDB9301 |
38 | #define CONFIG_EP9301 | |
39 | #define CONFIG_MACH_TYPE MACH_TYPE_EDB9301 | |
7237d22b SK |
40 | #define CONFIG_ENV_SECT_SIZE 0x00020000 |
41 | #elif defined(CONFIG_EDB9302) | |
42 | #define CONFIG_EP9302 | |
43 | #define CONFIG_MACH_TYPE MACH_TYPE_EDB9302 | |
7237d22b SK |
44 | #define CONFIG_ENV_SECT_SIZE 0x00020000 |
45 | #elif defined(CONFIG_EDB9302A) | |
46 | #define CONFIG_EP9302 | |
47 | #define CONFIG_MACH_TYPE MACH_TYPE_EDB9302A | |
7237d22b SK |
48 | #define CONFIG_ENV_SECT_SIZE 0x00020000 |
49 | #elif defined(CONFIG_EDB9307) | |
50 | #define CONFIG_EP9307 | |
51 | #define CONFIG_MACH_TYPE MACH_TYPE_EDB9307 | |
7237d22b SK |
52 | #define CONFIG_ENV_SECT_SIZE 0x00040000 |
53 | #elif defined(CONFIG_EDB9307A) | |
54 | #define CONFIG_EP9307 | |
55 | #define CONFIG_MACH_TYPE MACH_TYPE_EDB9307A | |
7237d22b SK |
56 | #define CONFIG_ENV_SECT_SIZE 0x00020000 |
57 | #elif defined(CONFIG_EDB9312) | |
58 | #define CONFIG_EP9312 | |
59 | #define CONFIG_MACH_TYPE MACH_TYPE_EDB9312 | |
7237d22b SK |
60 | #define CONFIG_ENV_SECT_SIZE 0x00040000 |
61 | #elif defined(CONFIG_EDB9315) | |
62 | #define CONFIG_EP9315 | |
63 | #define CONFIG_MACH_TYPE MACH_TYPE_EDB9315 | |
7237d22b SK |
64 | #define CONFIG_ENV_SECT_SIZE 0x00040000 |
65 | #elif defined(CONFIG_EDB9315A) | |
66 | #define CONFIG_EP9315 | |
67 | #define CONFIG_MACH_TYPE MACH_TYPE_EDB9315A | |
7237d22b SK |
68 | #define CONFIG_ENV_SECT_SIZE 0x00020000 |
69 | #else | |
70 | #error "no board defined" | |
71 | #endif | |
72 | ||
73 | /* High-level configuration options */ | |
f2168440 | 74 | #define CONFIG_EP93XX 1 /* This is a Cirrus Logic 93xx SoC */ |
7237d22b SK |
75 | |
76 | #define CONFIG_SYS_CLK_FREQ 14745600 /* EP93xx has a 14.7456 clock */ | |
7237d22b SK |
77 | |
78 | /* Monitor configuration */ | |
7237d22b SK |
79 | |
80 | #define CONFIG_SYS_LONGHELP /* Enable "long" help in mon */ | |
81 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ | |
82 | /* Print buffer size */ | |
83 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) | |
84 | /* Boot argument buffer size */ | |
85 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE | |
86 | #define CONFIG_SYS_MAXARGS 16 /* Max number of command args */ | |
87 | ||
88 | /* Serial port hardware configuration */ | |
89 | #define CONFIG_PL010_SERIAL | |
90 | #define CONFIG_CONS_INDEX 0 | |
7237d22b SK |
91 | #define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, \ |
92 | 115200, 230400} | |
93 | #define CONFIG_SYS_SERIAL0 0x808C0000 | |
94 | #define CONFIG_SYS_SERIAL1 0x808D0000 | |
95 | /*#define CONFIG_PL01x_PORTS {(void *)CONFIG_SYS_SERIAL0, \ | |
96 | (void *)CONFIG_SYS_SERIAL1} */ | |
97 | ||
98 | #define CONFIG_PL01x_PORTS {(void *)CONFIG_SYS_SERIAL0} | |
99 | ||
100 | /* Status LED */ | |
7237d22b | 101 | /* Optional value */ |
7237d22b SK |
102 | |
103 | /* Network hardware configuration */ | |
104 | #define CONFIG_DRIVER_EP93XX_MAC | |
105 | #define CONFIG_MII_SUPPRESS_PREAMBLE | |
106 | #define CONFIG_MII | |
107 | #define CONFIG_PHY_ADDR 1 | |
7237d22b SK |
108 | #undef CONFIG_NETCONSOLE |
109 | ||
110 | /* SDRAM configuration */ | |
111 | #if defined(CONFIG_EDB9301) || defined(CONFIG_EDB9302) || \ | |
112 | defined(CONFIG_EDB9307) || defined CONFIG_EDB9312 || \ | |
113 | defined(CONFIG_EDB9315) | |
114 | /* | |
115 | * EDB9301/2 has 4 banks of SDRAM consisting of 1x Samsung K4S561632E-TC75 | |
116 | * 256 Mbit SDRAM on a 16-bit data bus, for a total of 32MB of SDRAM. We set | |
117 | * the SROMLL bit on the processor, resulting in this non-contiguous memory map. | |
118 | * | |
119 | * The EDB9307, EDB9312, and EDB9315 have 2 banks of SDRAM consisting of | |
120 | * 2x Samsung K4S561632E-TC75 256 Mbit on a 32-bit data bus, for a total of | |
121 | * 64 MB of SDRAM. | |
122 | */ | |
123 | ||
124 | #define CONFIG_EDB93XX_SDCS3 | |
125 | ||
126 | #elif defined(CONFIG_EDB9302A) || \ | |
127 | defined(CONFIG_EDB9307A) || defined(CONFIG_EDB9315A) | |
128 | /* | |
129 | * EDB9302a has 4 banks of SDRAM consisting of 1x Samsung K4S561632E-TC75 | |
130 | * 256 Mbit SDRAM on a 16-bit data bus, for a total of 32MB of SDRAM. We set | |
131 | * the SROMLL bit on the processor, resulting in this non-contiguous memory map. | |
132 | * | |
133 | * The EDB9307A and EDB9315A have 2 banks of SDRAM consisting of 2x Samsung | |
134 | * K4S561632E-TC75 256 Mbit on a 32-bit data bus, for a total of 64 MB of SDRAM. | |
135 | */ | |
136 | #define CONFIG_EDB93XX_SDCS0 | |
137 | ||
138 | #else | |
139 | #error "no SDCS configuration for this board" | |
140 | #endif | |
141 | ||
7237d22b SK |
142 | #if defined(CONFIG_EDB93XX_SDCS3) |
143 | #define CONFIG_SYS_LOAD_ADDR 0x01000000 /* Default load address */ | |
144 | #define PHYS_SDRAM_1 0x00000000 | |
145 | #elif defined(CONFIG_EDB93XX_SDCS0) | |
146 | #define CONFIG_SYS_LOAD_ADDR 0xc1000000 /* Default load address */ | |
147 | #define PHYS_SDRAM_1 0xc0000000 | |
148 | #endif | |
149 | ||
150 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 | |
151 | #define CONFIG_NR_DRAM_BANKS 8 | |
152 | ||
153 | #define CONFIG_SYS_INIT_SP_ADDR \ | |
154 | (CONFIG_SYS_SDRAM_BASE + 32*1024 - GENERATED_GBL_DATA_SIZE) | |
155 | ||
7237d22b SK |
156 | /* Must match kernel config */ |
157 | #define LINUX_BOOT_PARAM_ADDR (PHYS_SDRAM_1 + 0x100) | |
158 | ||
159 | /* Run-time memory allocatons */ | |
160 | #define CONFIG_SYS_GBL_DATA_SIZE 128 | |
7237d22b SK |
161 | |
162 | #define CONFIG_SYS_MALLOC_LEN (512 * 1024) | |
163 | ||
164 | /* ----------------------------------------------------------------------------- | |
165 | * FLASH and environment organization | |
166 | * | |
167 | * The EDB9301, EDB9302(a), EDB9307a, EDB9315a have 1 bank of flash memory at | |
168 | * 0x60000000 consisting of 1x Intel TE28F128J3C-150 128 Mbit flash on a 16-bit | |
169 | * data bus, for a total of 16 MB of CFI-compatible flash. | |
170 | * | |
171 | * The EDB9307, EDB9312, and EDB9315 have 1 bank of flash memory at | |
172 | * 0x60000000 consisting of 2x Micron MT28F128J3-12 128 Mbit flash on a 32-bit | |
173 | * data bus, for a total of 32 MB of CFI-compatible flash. | |
174 | * | |
175 | * | |
176 | * EDB9301/02(a)7a/15a EDB9307/12/15 | |
177 | * 0x60000000 - 0x0003FFFF u-boot u-boot | |
178 | * 0x60040000 - 0x0005FFFF environment #1 environment #1 | |
179 | * 0x60060000 - 0x0007FFFF environment #2 environment #1 (continued) | |
180 | * 0x60080000 - 0x0009FFFF unused environment #2 | |
181 | * 0x600A0000 - 0x000BFFFF unused environment #2 (continued) | |
182 | * 0x600C0000 - 0x00FFFFFF unused unused | |
183 | * 0x61000000 - 0x01FFFFFF not present unused | |
184 | */ | |
185 | #define CONFIG_SYS_FLASH_CFI | |
186 | #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE | |
187 | ||
7237d22b SK |
188 | #define CONFIG_SYS_FLASH_PROTECTION |
189 | #define CONFIG_FLASH_CFI_DRIVER | |
190 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 | |
191 | #define CONFIG_SYS_MAX_FLASH_SECT (256+8) | |
192 | ||
193 | #define CONFIG_SYS_TEXT_BASE 0x60000000 | |
194 | #define PHYS_FLASH_1 CONFIG_SYS_TEXT_BASE | |
195 | #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_TEXT_BASE | |
196 | ||
197 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE | |
198 | #define CONFIG_SYS_MONITOR_LEN (256 * 1024) | |
199 | ||
200 | #define CONFIG_ENV_OVERWRITE /* Vendor params unprotected */ | |
201 | #define CONFIG_ENV_IS_IN_FLASH | |
202 | ||
203 | #define CONFIG_ENV_ADDR 0x60040000 | |
204 | #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE) | |
205 | ||
206 | #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE | |
207 | #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE | |
208 | ||
7237d22b SK |
209 | #define CONFIG_USB_OHCI_NEW |
210 | #define CONFIG_USB_OHCI_EP93XX | |
211 | #define CONFIG_SYS_USB_OHCI_CPU_INIT | |
212 | #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 3 | |
213 | #define CONFIG_SYS_USB_OHCI_SLOT_NAME "ep93xx-ohci" | |
214 | #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x80020000 | |
215 | ||
7237d22b SK |
216 | /* Define to disable flash configuration*/ |
217 | /* #define CONFIG_EP93XX_NO_FLASH_CFG */ | |
218 | ||
219 | /* Define this for indusrial rated chips */ | |
220 | /* #define CONFIG_EDB93XX_INDUSTRIAL */ | |
221 | ||
222 | #endif /* !defined (__CONFIG_H) */ |