[people/ms/u-boot.git] / include / configs / el6x_common.h

/*
 * Copyright (C) Stefano Babic <sbabic@denx.de>
 *
 * Configuration settings for the E+L i.MX6Q DO82 board.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __EL6Q_COMMON_CONFIG_H
#define __EL6Q_COMMON_CONFIG_H

#define CONFIG_BOARD_NAME		EL6Q

#include "mx6_common.h"

#define CONFIG_IMX_THERMAL

/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN		(10 * SZ_1M)

#define CONFIG_MXC_UART

#ifdef CONFIG_SPL
#define CONFIG_SYS_SPI_U_BOOT_OFFS	(64 * 1024)
#define CONFIG_SPL_SPI_LOAD
#include "imx6_spl.h"
#endif

/* MMC Configs */
#define CONFIG_SYS_FSL_ESDHC_ADDR	0
#define CONFIG_SYS_FSL_USDHC_NUM	2

/* I2C config */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED			100000

/* PMIC */
#define CONFIG_POWER
#define CONFIG_POWER_I2C
#define CONFIG_POWER_PFUZE100
#define CONFIG_POWER_PFUZE100_I2C_ADDR	0x08

/* Commands */
#define CONFIG_SF_DEFAULT_BUS		3
#define CONFIG_SF_DEFAULT_CS		0
#define CONFIG_SF_DEFAULT_SPEED		20000000
#define CONFIG_SF_DEFAULT_MODE		SPI_MODE_0

/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_MXC_UART_BASE	UART2_BASE

#define CONFIG_BOARD_NAME	EL6Q

#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
#define CONFIG_EXTRA_ENV_SETTINGS                                               \
	"board="__stringify(CONFIG_BOARD_NAME)"\0"                              \
	"cma_size="__stringify(EL6Q_CMA_SIZE)"\0"                               \
	"chp_size="__stringify(EL6Q_COHERENT_POOL_SIZE)"\0"                     \
	"console=" CONSOLE_DEV "\0"					\
	"fdtfile=undefined\0" \
	"fdt_high=0xffffffff\0" \
	"fdt_addr_r=0x18000000\0" \
	"fdt_addr=0x18000000\0" \
	"findfdt=setenv fdtfile " CONFIG_DEFAULT_FDT_FILE "\0"                  \
	"kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
	"scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
	"pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
	BOOTENV

#define BOOT_TARGET_DEVICES(func) \
	func(MMC, mmc, 0) \
	func(MMC, mmc, 1) \
	func(PXE, PXE, na) \
	func(DHCP, dhcp, na)

#include <config_distro_bootcmd.h>

#define CONFIG_ARP_TIMEOUT     200UL

#define CONFIG_CMD_MEMTEST

#define CONFIG_SYS_MEMTEST_START       0x10000000
#define CONFIG_SYS_MEMTEST_END         0x10800000
#define CONFIG_SYS_MEMTEST_SCRATCH     0x10800000

/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS           1
#define PHYS_SDRAM                     MMDC0_ARB_BASE_ADDR

#define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM
#define CONFIG_SYS_INIT_RAM_ADDR       IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE

#define CONFIG_SYS_INIT_SP_OFFSET \
	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)

/* environment organization */

#define CONFIG_ENV_SIZE			(8 * 1024)

#if defined(CONFIG_ENV_IS_IN_MMC)
#define CONFIG_SYS_MMC_ENV_DEV		1
#define CONFIG_SYS_MMC_ENV_PART		2
#define CONFIG_ENV_OFFSET		0x0
#endif

#endif                         /* __EL6Q_COMMON_CONFIG_H */
Commit	Line	Data
8be4f40e SB	1	/*
	2	* Copyright (C) Stefano Babic <sbabic@denx.de>
	3	*
	4	* Configuration settings for the E+L i.MX6Q DO82 board.
	5	*
	6	* SPDX-License-Identifier: GPL-2.0+
	7	*/
	8
	9	#ifndef __EL6Q_COMMON_CONFIG_H
	10	#define __EL6Q_COMMON_CONFIG_H
	11
	12	#define CONFIG_BOARD_NAME EL6Q
	13
8be4f40e SB	14	#include "mx6_common.h"
	15
	16	#define CONFIG_IMX_THERMAL
	17
	18	/* Size of malloc() pool */
	19	#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
	20
8be4f40e SB	21	#define CONFIG_MXC_UART
	22
	23	#ifdef CONFIG_SPL
8be4f40e SB	24	#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
	25	#define CONFIG_SPL_SPI_LOAD
	26	#include "imx6_spl.h"
	27	#endif
	28
	29	/* MMC Configs */
	30	#define CONFIG_SYS_FSL_ESDHC_ADDR 0
	31	#define CONFIG_SYS_FSL_USDHC_NUM 2
	32
	33	/* I2C config */
	34	#define CONFIG_SYS_I2C
	35	#define CONFIG_SYS_I2C_MXC
	36	#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
	37	#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
	38	#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
	39	#define CONFIG_SYS_I2C_SPEED 100000
	40
	41	/* PMIC */
	42	#define CONFIG_POWER
	43	#define CONFIG_POWER_I2C
	44	#define CONFIG_POWER_PFUZE100
	45	#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
	46
	47	/* Commands */
8be4f40e SB	48	#define CONFIG_SF_DEFAULT_BUS 3
	49	#define CONFIG_SF_DEFAULT_CS 0
	50	#define CONFIG_SF_DEFAULT_SPEED 20000000
	51	#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
	52
	53	/* allow to overwrite serial and ethaddr */
	54	#define CONFIG_ENV_OVERWRITE
	55	#define CONFIG_MXC_UART_BASE UART2_BASE
8be4f40e	56
8be4f40e SB	57	#define CONFIG_BOARD_NAME EL6Q
	58
	59	#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
	60	#define CONFIG_EXTRA_ENV_SETTINGS \
	61	"board="__stringify(CONFIG_BOARD_NAME)"\0" \
	62	"cma_size="__stringify(EL6Q_CMA_SIZE)"\0" \
	63	"chp_size="__stringify(EL6Q_COHERENT_POOL_SIZE)"\0" \
12ca05a3	64	"console=" CONSOLE_DEV "\0" \
8be4f40e SB	65	"fdtfile=undefined\0" \
	66	"fdt_high=0xffffffff\0" \
	67	"fdt_addr_r=0x18000000\0" \
	68	"fdt_addr=0x18000000\0" \
	69	"findfdt=setenv fdtfile " CONFIG_DEFAULT_FDT_FILE "\0" \
	70	"kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
	71	"scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
	72	"pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
	73	BOOTENV
	74
	75	#define BOOT_TARGET_DEVICES(func) \
	76	func(MMC, mmc, 0) \
	77	func(MMC, mmc, 1) \
	78	func(PXE, PXE, na) \
	79	func(DHCP, dhcp, na)
	80
8be4f40e SB	81	#include <config_distro_bootcmd.h>
	82
	83	#define CONFIG_ARP_TIMEOUT 200UL
	84
	85	#define CONFIG_CMD_MEMTEST
	86
	87	#define CONFIG_SYS_MEMTEST_START 0x10000000
	88	#define CONFIG_SYS_MEMTEST_END 0x10800000
	89	#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
	90
8be4f40e SB	91	/* Physical Memory Map */
	92	#define CONFIG_NR_DRAM_BANKS 1
	93	#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
	94
	95	#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
	96	#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
	97	#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
	98
	99	#define CONFIG_SYS_INIT_SP_OFFSET \
	100	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
	101	#define CONFIG_SYS_INIT_SP_ADDR \
	102	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
	103
e856bdcf	104	/* environment organization */
8be4f40e SB	105
	106	#define CONFIG_ENV_SIZE (8 * 1024)
	107
8be4f40e SB	108	#if defined(CONFIG_ENV_IS_IN_MMC)
	109	#define CONFIG_SYS_MMC_ENV_DEV 1
	110	#define CONFIG_SYS_MMC_ENV_PART 2
	111	#define CONFIG_ENV_OFFSET 0x0
	112	#endif
	113
	114	#endif /* __EL6Q_COMMON_CONFIG_H */