[people/ms/u-boot.git] / include / configs / el6x_common.h

/*
 * Copyright (C) Stefano Babic <sbabic@denx.de>
 *
 * Configuration settings for the E+L i.MX6Q DO82 board.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __EL6Q_COMMON_CONFIG_H
#define __EL6Q_COMMON_CONFIG_H

#define CONFIG_BOARD_NAME		EL6Q

#include <config_distro_defaults.h>
#include "mx6_common.h"

#define CONFIG_IMX_THERMAL

/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN		(10 * SZ_1M)

#define CONFIG_MXC_UART

#ifdef CONFIG_SPL
#define CONFIG_SYS_SPI_U_BOOT_OFFS	(64 * 1024)
#define CONFIG_SPL_SPI_LOAD
#include "imx6_spl.h"
#endif

/* MMC Configs */
#define CONFIG_SYS_FSL_ESDHC_ADDR	0
#define CONFIG_SYS_FSL_USDHC_NUM	2

/* I2C config */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED			100000

/* PMIC */
#define CONFIG_POWER
#define CONFIG_POWER_I2C
#define CONFIG_POWER_PFUZE100
#define CONFIG_POWER_PFUZE100_I2C_ADDR	0x08

/* Commands */
#define CONFIG_MXC_SPI
#define CONFIG_SF_DEFAULT_BUS		3
#define CONFIG_SF_DEFAULT_CS		0
#define CONFIG_SF_DEFAULT_SPEED		20000000
#define CONFIG_SF_DEFAULT_MODE		SPI_MODE_0

/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_MXC_UART_BASE	UART2_BASE

#define CONFIG_BOARD_NAME	EL6Q

#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
#define CONFIG_EXTRA_ENV_SETTINGS                                               \
	"board="__stringify(CONFIG_BOARD_NAME)"\0"                              \
	"cma_size="__stringify(EL6Q_CMA_SIZE)"\0"                               \
	"chp_size="__stringify(EL6Q_COHERENT_POOL_SIZE)"\0"                     \
	"console=" CONSOLE_DEV "\0"					\
	"fdtfile=undefined\0" \
	"fdt_high=0xffffffff\0" \
	"fdt_addr_r=0x18000000\0" \
	"fdt_addr=0x18000000\0" \
	"findfdt=setenv fdtfile " CONFIG_DEFAULT_FDT_FILE "\0"                  \
	"kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
	"scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
	"pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
	BOOTENV

#define BOOT_TARGET_DEVICES(func) \
	func(MMC, mmc, 0) \
	func(MMC, mmc, 1) \
	func(PXE, PXE, na) \
	func(DHCP, dhcp, na)

#include <config_distro_bootcmd.h>

#define CONFIG_ARP_TIMEOUT     200UL

#define CONFIG_CMD_MEMTEST

#define CONFIG_SYS_MEMTEST_START       0x10000000
#define CONFIG_SYS_MEMTEST_END         0x10800000
#define CONFIG_SYS_MEMTEST_SCRATCH     0x10800000

/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS           1
#define PHYS_SDRAM                     MMDC0_ARB_BASE_ADDR

#define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM
#define CONFIG_SYS_INIT_RAM_ADDR       IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE

#define CONFIG_SYS_INIT_SP_OFFSET \
	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)

/* environment organization */

#define CONFIG_ENV_SIZE			(8 * 1024)

#if defined(CONFIG_ENV_IS_IN_MMC)
#define CONFIG_SYS_MMC_ENV_DEV		1
#define CONFIG_SYS_MMC_ENV_PART		2
#define CONFIG_ENV_OFFSET		0x0
#endif

#endif                         /* __EL6Q_COMMON_CONFIG_H */
Commit	Line	Data
8be4f40e SB	1	/*
	2	* Copyright (C) Stefano Babic <sbabic@denx.de>
	3	*
	4	* Configuration settings for the E+L i.MX6Q DO82 board.
	5	*
	6	* SPDX-License-Identifier: GPL-2.0+
	7	*/
	8
	9	#ifndef __EL6Q_COMMON_CONFIG_H
	10	#define __EL6Q_COMMON_CONFIG_H
	11
	12	#define CONFIG_BOARD_NAME EL6Q
	13
	14	#include <config_distro_defaults.h>
	15	#include "mx6_common.h"
	16
	17	#define CONFIG_IMX_THERMAL
	18
	19	/* Size of malloc() pool */
	20	#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
	21
8be4f40e SB	22	#define CONFIG_MXC_UART
	23
	24	#ifdef CONFIG_SPL
8be4f40e SB	25	#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
	26	#define CONFIG_SPL_SPI_LOAD
	27	#include "imx6_spl.h"
	28	#endif
	29
	30	/* MMC Configs */
	31	#define CONFIG_SYS_FSL_ESDHC_ADDR 0
	32	#define CONFIG_SYS_FSL_USDHC_NUM 2
	33
	34	/* I2C config */
	35	#define CONFIG_SYS_I2C
	36	#define CONFIG_SYS_I2C_MXC
	37	#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
	38	#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
	39	#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
	40	#define CONFIG_SYS_I2C_SPEED 100000
	41
	42	/* PMIC */
	43	#define CONFIG_POWER
	44	#define CONFIG_POWER_I2C
	45	#define CONFIG_POWER_PFUZE100
	46	#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
	47
	48	/* Commands */
	49	#define CONFIG_MXC_SPI
	50	#define CONFIG_SF_DEFAULT_BUS 3
	51	#define CONFIG_SF_DEFAULT_CS 0
	52	#define CONFIG_SF_DEFAULT_SPEED 20000000
	53	#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
	54
	55	/* allow to overwrite serial and ethaddr */
	56	#define CONFIG_ENV_OVERWRITE
	57	#define CONFIG_MXC_UART_BASE UART2_BASE
8be4f40e	58
8be4f40e SB	59	#define CONFIG_BOARD_NAME EL6Q
	60
	61	#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
	62	#define CONFIG_EXTRA_ENV_SETTINGS \
	63	"board="__stringify(CONFIG_BOARD_NAME)"\0" \
	64	"cma_size="__stringify(EL6Q_CMA_SIZE)"\0" \
	65	"chp_size="__stringify(EL6Q_COHERENT_POOL_SIZE)"\0" \
12ca05a3	66	"console=" CONSOLE_DEV "\0" \
8be4f40e SB	67	"fdtfile=undefined\0" \
	68	"fdt_high=0xffffffff\0" \
	69	"fdt_addr_r=0x18000000\0" \
	70	"fdt_addr=0x18000000\0" \
	71	"findfdt=setenv fdtfile " CONFIG_DEFAULT_FDT_FILE "\0" \
	72	"kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
	73	"scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
	74	"pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
	75	BOOTENV
	76
	77	#define BOOT_TARGET_DEVICES(func) \
	78	func(MMC, mmc, 0) \
	79	func(MMC, mmc, 1) \
	80	func(PXE, PXE, na) \
	81	func(DHCP, dhcp, na)
	82
8be4f40e SB	83	#include <config_distro_bootcmd.h>
	84
	85	#define CONFIG_ARP_TIMEOUT 200UL
	86
	87	#define CONFIG_CMD_MEMTEST
	88
	89	#define CONFIG_SYS_MEMTEST_START 0x10000000
	90	#define CONFIG_SYS_MEMTEST_END 0x10800000
	91	#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
	92
8be4f40e SB	93	/* Physical Memory Map */
	94	#define CONFIG_NR_DRAM_BANKS 1
	95	#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
	96
	97	#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
	98	#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
	99	#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
	100
	101	#define CONFIG_SYS_INIT_SP_OFFSET \
	102	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
	103	#define CONFIG_SYS_INIT_SP_ADDR \
	104	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
	105
e856bdcf	106	/* environment organization */
8be4f40e SB	107
	108	#define CONFIG_ENV_SIZE (8 * 1024)
	109
8be4f40e SB	110	#if defined(CONFIG_ENV_IS_IN_MMC)
	111	#define CONFIG_SYS_MMC_ENV_DEV 1
	112	#define CONFIG_SYS_MMC_ENV_PART 2
	113	#define CONFIG_ENV_OFFSET 0x0
	114	#endif
	115
	116	#endif /* __EL6Q_COMMON_CONFIG_H */