[people/ms/u-boot.git] / include / configs / embestmx6boards.h

/*
 * Copyright (C) 2014 Eukréa Electromatique
 * Author: Eric Bénard <eric@eukrea.com>
 *
 * Configuration settings for the Embest RIoTboard
 *
 * based on mx6*sabre*.h which are :
 * Copyright (C) 2012 Freescale Semiconductor, Inc.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __RIOTBOARD_CONFIG_H
#define __RIOTBOARD_CONFIG_H

#define CONFIG_MXC_UART_BASE		UART2_BASE
#define CONSOLE_DEV		"ttymxc1"

#define PHYS_SDRAM_SIZE		(1u * 1024 * 1024 * 1024)

#define CONFIG_IMX_THERMAL

/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN		(10 * SZ_1M)

#define CONFIG_MXC_UART

/* I2C Configs */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED		100000

/* USB Configs */
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_ASIX
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET	/* For OTG port */
#define CONFIG_MXC_USB_PORTSC	(PORT_PTS_UTMI | PORT_PTS_PTW)
#define CONFIG_MXC_USB_FLAGS	0

/* MMC Configs */
#define CONFIG_SYS_FSL_ESDHC_ADDR      0

#define CONFIG_FEC_MXC
#define CONFIG_MII
#define IMX_FEC_BASE			ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE		RGMII
#define CONFIG_ETHPRIME			"FEC"
#define CONFIG_FEC_MXC_PHYADDR		4

#define CONFIG_PHYLIB
#define CONFIG_PHY_ATHEROS

#ifdef CONFIG_CMD_SF
#define CONFIG_MXC_SPI
#define CONFIG_SF_DEFAULT_BUS		0
#define CONFIG_SF_DEFAULT_CS		0
#define CONFIG_SF_DEFAULT_SPEED		20000000
#define CONFIG_SF_DEFAULT_MODE		SPI_MODE_0
#endif

#define CONFIG_ARP_TIMEOUT     200UL

/* Print Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)

#define CONFIG_SYS_MEMTEST_START       0x10000000
#define CONFIG_SYS_MEMTEST_END         0x10010000
#define CONFIG_SYS_MEMTEST_SCRATCH     0x10800000

/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS           1
#define PHYS_SDRAM                     MMDC0_ARB_BASE_ADDR

#define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM
#define CONFIG_SYS_INIT_RAM_ADDR       IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE

#define CONFIG_SYS_INIT_SP_OFFSET \
	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)

/* Environment organization */
#define CONFIG_ENV_SIZE			(8 * 1024)

#if defined(CONFIG_ENV_IS_IN_MMC)
/* RiOTboard */
#define CONFIG_FDTFILE	"imx6dl-riotboard.dtb"
#define CONFIG_SYS_FSL_USDHC_NUM	3
#define CONFIG_SYS_MMC_ENV_DEV		2	/* SDHC4 */
#define CONFIG_ENV_OFFSET		(6 * 64 * 1024)
#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
/* MarSBoard */
#define CONFIG_FDTFILE	"imx6q-marsboard.dtb"
#define CONFIG_SYS_FSL_USDHC_NUM	2
#define CONFIG_ENV_OFFSET		(768 * 1024)
#define CONFIG_ENV_SECT_SIZE		(8 * 1024)
#define CONFIG_ENV_SPI_BUS		CONFIG_SF_DEFAULT_BUS
#define CONFIG_ENV_SPI_CS		CONFIG_SF_DEFAULT_CS
#define CONFIG_ENV_SPI_MODE		CONFIG_SF_DEFAULT_MODE
#define CONFIG_ENV_SPI_MAX_HZ		CONFIG_SF_DEFAULT_SPEED
#endif

/* Framebuffer */
#define CONFIG_VIDEO_IPUV3
#define CONFIG_VIDEO_BMP_RLE8
#define CONFIG_SPLASH_SCREEN
#define CONFIG_SPLASH_SCREEN_ALIGN
#define CONFIG_BMP_16BPP
#define CONFIG_VIDEO_LOGO
#define CONFIG_VIDEO_BMP_LOGO
#define CONFIG_IPUV3_CLK 260000000
#define CONFIG_IMX_HDMI
#define CONFIG_IMX_VIDEO_SKIP

#include <config_distro_defaults.h>
#include "mx6_common.h"

/* 256M RAM (minimum), 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
 * 1M script, 1M pxe and the ramdisk at the end */
#define MEM_LAYOUT_ENV_SETTINGS \
	"bootm_size=0x10000000\0" \
	"kernel_addr_r=0x12000000\0" \
	"fdt_addr_r=0x13000000\0" \
	"scriptaddr=0x13100000\0" \
	"pxefile_addr_r=0x13200000\0" \
	"ramdisk_addr_r=0x13300000\0"

#define BOOT_TARGET_DEVICES(func) \
	func(MMC, mmc, 0) \
	func(MMC, mmc, 1) \
	func(MMC, mmc, 2) \
	func(USB, usb, 0) \
	func(PXE, pxe, na) \
	func(DHCP, dhcp, na)

#define CONFIG_BOOTCOMMAND \
	"run finduuid; " \
	"run distro_bootcmd"

#include <config_distro_bootcmd.h>

#define CONSOLE_STDIN_SETTINGS \
	"stdin=serial\0"

#define CONSOLE_STDOUT_SETTINGS \
	"stdout=serial\0" \
	"stderr=serial\0"

#define CONSOLE_ENV_SETTINGS \
	CONSOLE_STDIN_SETTINGS \
	CONSOLE_STDOUT_SETTINGS

#define CONFIG_EXTRA_ENV_SETTINGS \
	CONSOLE_ENV_SETTINGS \
	MEM_LAYOUT_ENV_SETTINGS \
	"fdtfile=" CONFIG_FDTFILE "\0" \
	"finduuid=part uuid mmc 0:1 uuid\0" \
	BOOTENV

#endif                         /* __RIOTBOARD_CONFIG_H */
Commit	Line	Data
3cbeb0f0 EB	1	/*
	2	* Copyright (C) 2014 Eukréa Electromatique
	3	* Author: Eric Bénard <eric@eukrea.com>
	4	*
	5	* Configuration settings for the Embest RIoTboard
	6	*
	7	* based on mx6sabre.h which are :
	8	* Copyright (C) 2012 Freescale Semiconductor, Inc.
	9	*
	10	* SPDX-License-Identifier: GPL-2.0+
	11	*/
	12
	13	#ifndef __RIOTBOARD_CONFIG_H
	14	#define __RIOTBOARD_CONFIG_H
	15
3cbeb0f0	16	#define CONFIG_MXC_UART_BASE UART2_BASE
12ca05a3	17	#define CONSOLE_DEV "ttymxc1"
3cbeb0f0 EB	18
	19	#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
	20
1368f993	21	#define CONFIG_IMX_THERMAL
3cbeb0f0 EB	22
	23	/* Size of malloc() pool */
	24	#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
	25
3cbeb0f0 EB	26	#define CONFIG_MXC_UART
3cbeb0f0 EB	27
3cbeb0f0	28	/* I2C Configs */
3cbeb0f0 EB	29	#define CONFIG_SYS_I2C
3cbeb0f0 EB	30	#define CONFIG_SYS_I2C_MXC
03544c66 AA	31	#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
03544c66 AA	32	#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
f8cb101e	33	#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
3cbeb0f0 EB	34	#define CONFIG_SYS_I2C_SPEED 100000
	35
	36	/* USB Configs */
3cbeb0f0 EB	37	#define CONFIG_USB_HOST_ETHER
	38	#define CONFIG_USB_ETHER_ASIX
	39	#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
	40	#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
	41	#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI \| PORT_PTS_PTW)
	42	#define CONFIG_MXC_USB_FLAGS 0
	43
	44	/* MMC Configs */
3cbeb0f0 EB	45	#define CONFIG_SYS_FSL_ESDHC_ADDR 0
3cbeb0f0 EB	46
3cbeb0f0 EB	47	#define CONFIG_FEC_MXC
	48	#define CONFIG_MII
	49	#define IMX_FEC_BASE ENET_BASE_ADDR
	50	#define CONFIG_FEC_XCV_TYPE RGMII
	51	#define CONFIG_ETHPRIME "FEC"
	52	#define CONFIG_FEC_MXC_PHYADDR 4
	53
	54	#define CONFIG_PHYLIB
	55	#define CONFIG_PHY_ATHEROS
	56
3cbeb0f0	57	#ifdef CONFIG_CMD_SF
3cbeb0f0 EB	58	#define CONFIG_MXC_SPI
3cbeb0f0 EB	59	#define CONFIG_SF_DEFAULT_BUS 0
155fa9af	60	#define CONFIG_SF_DEFAULT_CS 0
3cbeb0f0 EB	61	#define CONFIG_SF_DEFAULT_SPEED 20000000
	62	#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
	63	#endif
	64
3cbeb0f0 EB	65	#define CONFIG_ARP_TIMEOUT 200UL
3cbeb0f0 EB	66
3cbeb0f0 EB	67	/* Print Buffer Size */
3cbeb0f0 EB	68	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
3cbeb0f0 EB	69
	70	#define CONFIG_SYS_MEMTEST_START 0x10000000
	71	#define CONFIG_SYS_MEMTEST_END 0x10010000
	72	#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
	73
3cbeb0f0 EB	74	/* Physical Memory Map */
	75	#define CONFIG_NR_DRAM_BANKS 1
	76	#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
	77
	78	#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
	79	#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
	80	#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
	81
	82	#define CONFIG_SYS_INIT_SP_OFFSET \
	83	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
	84	#define CONFIG_SYS_INIT_SP_ADDR \
	85	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
	86
056845c2	87	/* Environment organization */
3cbeb0f0 EB	88	#define CONFIG_ENV_SIZE (8 * 1024)
	89
	90	#if defined(CONFIG_ENV_IS_IN_MMC)
	91	/* RiOTboard */
c86efd85	92	#define CONFIG_FDTFILE "imx6dl-riotboard.dtb"
3cbeb0f0 EB	93	#define CONFIG_SYS_FSL_USDHC_NUM 3
	94	#define CONFIG_SYS_MMC_ENV_DEV 2 /* SDHC4 */
	95	#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
	96	#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
	97	#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
	98	/* MarSBoard */
c86efd85	99	#define CONFIG_FDTFILE "imx6q-marsboard.dtb"
3cbeb0f0 EB	100	#define CONFIG_SYS_FSL_USDHC_NUM 2
	101	#define CONFIG_ENV_OFFSET (768 * 1024)
	102	#define CONFIG_ENV_SECT_SIZE (8 * 1024)
	103	#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
	104	#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
	105	#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
	106	#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
	107	#endif
	108
3cbeb0f0	109	/* Framebuffer */
3cbeb0f0	110	#define CONFIG_VIDEO_IPUV3
3cbeb0f0 EB	111	#define CONFIG_VIDEO_BMP_RLE8
	112	#define CONFIG_SPLASH_SCREEN
	113	#define CONFIG_SPLASH_SCREEN_ALIGN
	114	#define CONFIG_BMP_16BPP
	115	#define CONFIG_VIDEO_LOGO
	116	#define CONFIG_VIDEO_BMP_LOGO
	117	#define CONFIG_IPUV3_CLK 260000000
	118	#define CONFIG_IMX_HDMI
	119	#define CONFIG_IMX_VIDEO_SKIP
	120
729d2a34	121	#include <config_distro_defaults.h>
e51c1e8e	122	#include "mx6_common.h"
729d2a34	123
c86efd85 IP	124	/* 256M RAM (minimum), 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
	125	* 1M script, 1M pxe and the ramdisk at the end */
	126	#define MEM_LAYOUT_ENV_SETTINGS \
	127	"bootm_size=0x10000000\0" \
	128	"kernel_addr_r=0x12000000\0" \
	129	"fdt_addr_r=0x13000000\0" \
	130	"scriptaddr=0x13100000\0" \
	131	"pxefile_addr_r=0x13200000\0" \
	132	"ramdisk_addr_r=0x13300000\0"
	133
	134	#define BOOT_TARGET_DEVICES(func) \
	135	func(MMC, mmc, 0) \
	136	func(MMC, mmc, 1) \
	137	func(MMC, mmc, 2) \
	138	func(USB, usb, 0) \
	139	func(PXE, pxe, na) \
	140	func(DHCP, dhcp, na)
	141
0f29a61c FB	142	#define CONFIG_BOOTCOMMAND \
	143	"run finduuid; " \
	144	"run distro_bootcmd"
	145
c86efd85 IP	146	#include <config_distro_bootcmd.h>
	147
	148	#define CONSOLE_STDIN_SETTINGS \
	149	"stdin=serial\0"
	150
	151	#define CONSOLE_STDOUT_SETTINGS \
	152	"stdout=serial\0" \
	153	"stderr=serial\0"
	154
	155	#define CONSOLE_ENV_SETTINGS \
	156	CONSOLE_STDIN_SETTINGS \
	157	CONSOLE_STDOUT_SETTINGS
	158
	159	#define CONFIG_EXTRA_ENV_SETTINGS \
	160	CONSOLE_ENV_SETTINGS \
	161	MEM_LAYOUT_ENV_SETTINGS \
	162	"fdtfile=" CONFIG_FDTFILE "\0" \
0f29a61c	163	"finduuid=part uuid mmc 0:1 uuid\0" \
c86efd85 IP	164	BOOTENV
c86efd85 IP	165
3cbeb0f0	166	#endif /* __RIOTBOARD_CONFIG_H */