]> git.ipfire.org Git - people/ms/u-boot.git/blame - include/configs/embestmx6boards.h
configs: Migrate CONFIG_USB_STORAGE
[people/ms/u-boot.git] / include / configs / embestmx6boards.h
CommitLineData
3cbeb0f0
EB
1/*
2 * Copyright (C) 2014 Eukréa Electromatique
3 * Author: Eric Bénard <eric@eukrea.com>
4 *
5 * Configuration settings for the Embest RIoTboard
6 *
7 * based on mx6*sabre*.h which are :
8 * Copyright (C) 2012 Freescale Semiconductor, Inc.
9 *
10 * SPDX-License-Identifier: GPL-2.0+
11 */
12
13#ifndef __RIOTBOARD_CONFIG_H
14#define __RIOTBOARD_CONFIG_H
15
3cbeb0f0 16#define CONFIG_MXC_UART_BASE UART2_BASE
fa4a7a43 17#define CONFIG_CONSOLE_DEV "ttymxc1"
3cbeb0f0
EB
18#define CONFIG_MMCROOT "/dev/mmcblk1p2"
19
20#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
21
1368f993 22#define CONFIG_IMX_THERMAL
3cbeb0f0
EB
23
24/* Size of malloc() pool */
25#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
26
27#define CONFIG_BOARD_EARLY_INIT_F
28#define CONFIG_BOARD_LATE_INIT
3cbeb0f0
EB
29
30#define CONFIG_MXC_UART
31
3cbeb0f0 32/* I2C Configs */
3cbeb0f0
EB
33#define CONFIG_SYS_I2C
34#define CONFIG_SYS_I2C_MXC
03544c66
AA
35#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
36#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
f8cb101e 37#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
3cbeb0f0
EB
38#define CONFIG_SYS_I2C_SPEED 100000
39
40/* USB Configs */
3cbeb0f0
EB
41#define CONFIG_USB_EHCI
42#define CONFIG_USB_EHCI_MX6
3cbeb0f0
EB
43#define CONFIG_USB_HOST_ETHER
44#define CONFIG_USB_ETHER_ASIX
45#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
46#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
47#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
48#define CONFIG_MXC_USB_FLAGS 0
49
50/* MMC Configs */
3cbeb0f0
EB
51#define CONFIG_SYS_FSL_ESDHC_ADDR 0
52
3cbeb0f0
EB
53#define CONFIG_FEC_MXC
54#define CONFIG_MII
55#define IMX_FEC_BASE ENET_BASE_ADDR
56#define CONFIG_FEC_XCV_TYPE RGMII
57#define CONFIG_ETHPRIME "FEC"
58#define CONFIG_FEC_MXC_PHYADDR 4
59
60#define CONFIG_PHYLIB
61#define CONFIG_PHY_ATHEROS
62
3cbeb0f0 63#ifdef CONFIG_CMD_SF
3cbeb0f0
EB
64#define CONFIG_MXC_SPI
65#define CONFIG_SF_DEFAULT_BUS 0
155fa9af 66#define CONFIG_SF_DEFAULT_CS 0
3cbeb0f0
EB
67#define CONFIG_SF_DEFAULT_SPEED 20000000
68#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
69#endif
70
3cbeb0f0 71#define CONFIG_CMD_BMODE
3cbeb0f0 72
3cbeb0f0
EB
73#define CONFIG_ARP_TIMEOUT 200UL
74
3cbeb0f0
EB
75/* Print Buffer Size */
76#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
3cbeb0f0
EB
77
78#define CONFIG_SYS_MEMTEST_START 0x10000000
79#define CONFIG_SYS_MEMTEST_END 0x10010000
80#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
81
3cbeb0f0
EB
82#define CONFIG_STACKSIZE (128 * 1024)
83
84/* Physical Memory Map */
85#define CONFIG_NR_DRAM_BANKS 1
86#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
87
88#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
89#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
90#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
91
92#define CONFIG_SYS_INIT_SP_OFFSET \
93 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
94#define CONFIG_SYS_INIT_SP_ADDR \
95 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
96
056845c2 97/* Environment organization */
3cbeb0f0
EB
98#define CONFIG_ENV_SIZE (8 * 1024)
99
100#if defined(CONFIG_ENV_IS_IN_MMC)
101/* RiOTboard */
c86efd85 102#define CONFIG_FDTFILE "imx6dl-riotboard.dtb"
3cbeb0f0
EB
103#define CONFIG_SYS_FSL_USDHC_NUM 3
104#define CONFIG_SYS_MMC_ENV_DEV 2 /* SDHC4 */
105#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
106#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
107#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
108/* MarSBoard */
c86efd85 109#define CONFIG_FDTFILE "imx6q-marsboard.dtb"
3cbeb0f0
EB
110#define CONFIG_SYS_FSL_USDHC_NUM 2
111#define CONFIG_ENV_OFFSET (768 * 1024)
112#define CONFIG_ENV_SECT_SIZE (8 * 1024)
113#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
114#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
115#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
116#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
117#endif
118
3cbeb0f0
EB
119/* Framebuffer */
120#define CONFIG_VIDEO
121#define CONFIG_VIDEO_IPUV3
122#define CONFIG_CFB_CONSOLE
123#define CONFIG_VGA_AS_SINGLE_DEVICE
124#define CONFIG_SYS_CONSOLE_IS_IN_ENV
125#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
126#define CONFIG_VIDEO_BMP_RLE8
127#define CONFIG_SPLASH_SCREEN
128#define CONFIG_SPLASH_SCREEN_ALIGN
129#define CONFIG_BMP_16BPP
130#define CONFIG_VIDEO_LOGO
131#define CONFIG_VIDEO_BMP_LOGO
132#define CONFIG_IPUV3_CLK 260000000
133#define CONFIG_IMX_HDMI
134#define CONFIG_IMX_VIDEO_SKIP
135
729d2a34 136#include <config_distro_defaults.h>
e51c1e8e 137#include "mx6_common.h"
729d2a34 138
c86efd85
IP
139/* 256M RAM (minimum), 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
140 * 1M script, 1M pxe and the ramdisk at the end */
141#define MEM_LAYOUT_ENV_SETTINGS \
142 "bootm_size=0x10000000\0" \
143 "kernel_addr_r=0x12000000\0" \
144 "fdt_addr_r=0x13000000\0" \
145 "scriptaddr=0x13100000\0" \
146 "pxefile_addr_r=0x13200000\0" \
147 "ramdisk_addr_r=0x13300000\0"
148
149#define BOOT_TARGET_DEVICES(func) \
150 func(MMC, mmc, 0) \
151 func(MMC, mmc, 1) \
152 func(MMC, mmc, 2) \
153 func(USB, usb, 0) \
154 func(PXE, pxe, na) \
155 func(DHCP, dhcp, na)
156
157#include <config_distro_bootcmd.h>
158
159#define CONSOLE_STDIN_SETTINGS \
160 "stdin=serial\0"
161
162#define CONSOLE_STDOUT_SETTINGS \
163 "stdout=serial\0" \
164 "stderr=serial\0"
165
166#define CONSOLE_ENV_SETTINGS \
167 CONSOLE_STDIN_SETTINGS \
168 CONSOLE_STDOUT_SETTINGS
169
170#define CONFIG_EXTRA_ENV_SETTINGS \
171 CONSOLE_ENV_SETTINGS \
172 MEM_LAYOUT_ENV_SETTINGS \
173 "fdtfile=" CONFIG_FDTFILE "\0" \
174 BOOTENV
175
3cbeb0f0 176#endif /* __RIOTBOARD_CONFIG_H */