]> git.ipfire.org Git - people/ms/u-boot.git/blame - include/configs/embestmx6boards.h
Move setexpr to Kconfig
[people/ms/u-boot.git] / include / configs / embestmx6boards.h
CommitLineData
3cbeb0f0
EB
1/*
2 * Copyright (C) 2014 Eukréa Electromatique
3 * Author: Eric Bénard <eric@eukrea.com>
4 *
5 * Configuration settings for the Embest RIoTboard
6 *
7 * based on mx6*sabre*.h which are :
8 * Copyright (C) 2012 Freescale Semiconductor, Inc.
9 *
10 * SPDX-License-Identifier: GPL-2.0+
11 */
12
13#ifndef __RIOTBOARD_CONFIG_H
14#define __RIOTBOARD_CONFIG_H
15
3cbeb0f0 16#define CONFIG_MXC_UART_BASE UART2_BASE
fa4a7a43 17#define CONFIG_CONSOLE_DEV "ttymxc1"
3cbeb0f0
EB
18#define CONFIG_MMCROOT "/dev/mmcblk1p2"
19
20#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
21
223d91cc 22#define CONFIG_IMX6_THERMAL
3cbeb0f0
EB
23
24/* Size of malloc() pool */
25#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
26
27#define CONFIG_BOARD_EARLY_INIT_F
28#define CONFIG_BOARD_LATE_INIT
3cbeb0f0
EB
29
30#define CONFIG_MXC_UART
31
32#define CONFIG_CMD_FUSE
33#ifdef CONFIG_CMD_FUSE
34#define CONFIG_MXC_OCOTP
35#endif
36
37/* I2C Configs */
38#define CONFIG_CMD_I2C
39#define CONFIG_SYS_I2C
40#define CONFIG_SYS_I2C_MXC
f8cb101e 41#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
3cbeb0f0
EB
42#define CONFIG_SYS_I2C_SPEED 100000
43
44/* USB Configs */
45#define CONFIG_CMD_USB
46#define CONFIG_USB_EHCI
47#define CONFIG_USB_EHCI_MX6
48#define CONFIG_USB_STORAGE
49#define CONFIG_USB_HOST_ETHER
50#define CONFIG_USB_ETHER_ASIX
51#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
52#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
53#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
54#define CONFIG_MXC_USB_FLAGS 0
55
56/* MMC Configs */
3cbeb0f0
EB
57#define CONFIG_SYS_FSL_ESDHC_ADDR 0
58
3cbeb0f0
EB
59#define CONFIG_FEC_MXC
60#define CONFIG_MII
61#define IMX_FEC_BASE ENET_BASE_ADDR
62#define CONFIG_FEC_XCV_TYPE RGMII
63#define CONFIG_ETHPRIME "FEC"
64#define CONFIG_FEC_MXC_PHYADDR 4
65
66#define CONFIG_PHYLIB
67#define CONFIG_PHY_ATHEROS
68
69#define CONFIG_CMD_SF
70#ifdef CONFIG_CMD_SF
71#define CONFIG_SPI_FLASH
72#define CONFIG_SPI_FLASH_SST
73#define CONFIG_MXC_SPI
74#define CONFIG_SF_DEFAULT_BUS 0
155fa9af 75#define CONFIG_SF_DEFAULT_CS 0
3cbeb0f0
EB
76#define CONFIG_SF_DEFAULT_SPEED 20000000
77#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
78#endif
79
3cbeb0f0 80/* Command definition */
729d2a34 81#undef CONFIG_CMD_FPGA
3cbeb0f0
EB
82
83#define CONFIG_CMD_BMODE
3cbeb0f0 84
3cbeb0f0
EB
85#define CONFIG_ARP_TIMEOUT 200UL
86
3cbeb0f0
EB
87/* Print Buffer Size */
88#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
3cbeb0f0
EB
89
90#define CONFIG_SYS_MEMTEST_START 0x10000000
91#define CONFIG_SYS_MEMTEST_END 0x10010000
92#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
93
3cbeb0f0
EB
94#define CONFIG_STACKSIZE (128 * 1024)
95
96/* Physical Memory Map */
97#define CONFIG_NR_DRAM_BANKS 1
98#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
99
100#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
101#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
102#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
103
104#define CONFIG_SYS_INIT_SP_OFFSET \
105 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
106#define CONFIG_SYS_INIT_SP_ADDR \
107 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
108
056845c2 109/* Environment organization */
3cbeb0f0
EB
110#define CONFIG_ENV_SIZE (8 * 1024)
111
112#if defined(CONFIG_ENV_IS_IN_MMC)
113/* RiOTboard */
c86efd85 114#define CONFIG_FDTFILE "imx6dl-riotboard.dtb"
3cbeb0f0
EB
115#define CONFIG_SYS_FSL_USDHC_NUM 3
116#define CONFIG_SYS_MMC_ENV_DEV 2 /* SDHC4 */
117#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
118#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
119#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
120/* MarSBoard */
c86efd85 121#define CONFIG_FDTFILE "imx6q-marsboard.dtb"
3cbeb0f0
EB
122#define CONFIG_SYS_FSL_USDHC_NUM 2
123#define CONFIG_ENV_OFFSET (768 * 1024)
124#define CONFIG_ENV_SECT_SIZE (8 * 1024)
125#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
126#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
127#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
128#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
129#endif
130
3cbeb0f0
EB
131/* Framebuffer */
132#define CONFIG_VIDEO
133#define CONFIG_VIDEO_IPUV3
134#define CONFIG_CFB_CONSOLE
135#define CONFIG_VGA_AS_SINGLE_DEVICE
136#define CONFIG_SYS_CONSOLE_IS_IN_ENV
137#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
138#define CONFIG_VIDEO_BMP_RLE8
139#define CONFIG_SPLASH_SCREEN
140#define CONFIG_SPLASH_SCREEN_ALIGN
141#define CONFIG_BMP_16BPP
142#define CONFIG_VIDEO_LOGO
143#define CONFIG_VIDEO_BMP_LOGO
144#define CONFIG_IPUV3_CLK 260000000
145#define CONFIG_IMX_HDMI
146#define CONFIG_IMX_VIDEO_SKIP
147
729d2a34 148#include <config_distro_defaults.h>
e51c1e8e 149#include "mx6_common.h"
729d2a34 150
c86efd85
IP
151/* 256M RAM (minimum), 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
152 * 1M script, 1M pxe and the ramdisk at the end */
153#define MEM_LAYOUT_ENV_SETTINGS \
154 "bootm_size=0x10000000\0" \
155 "kernel_addr_r=0x12000000\0" \
156 "fdt_addr_r=0x13000000\0" \
157 "scriptaddr=0x13100000\0" \
158 "pxefile_addr_r=0x13200000\0" \
159 "ramdisk_addr_r=0x13300000\0"
160
161#define BOOT_TARGET_DEVICES(func) \
162 func(MMC, mmc, 0) \
163 func(MMC, mmc, 1) \
164 func(MMC, mmc, 2) \
165 func(USB, usb, 0) \
166 func(PXE, pxe, na) \
167 func(DHCP, dhcp, na)
168
169#include <config_distro_bootcmd.h>
170
171#define CONSOLE_STDIN_SETTINGS \
172 "stdin=serial\0"
173
174#define CONSOLE_STDOUT_SETTINGS \
175 "stdout=serial\0" \
176 "stderr=serial\0"
177
178#define CONSOLE_ENV_SETTINGS \
179 CONSOLE_STDIN_SETTINGS \
180 CONSOLE_STDOUT_SETTINGS
181
182#define CONFIG_EXTRA_ENV_SETTINGS \
183 CONSOLE_ENV_SETTINGS \
184 MEM_LAYOUT_ENV_SETTINGS \
185 "fdtfile=" CONFIG_FDTFILE "\0" \
186 BOOTENV
187
3cbeb0f0 188#endif /* __RIOTBOARD_CONFIG_H */