[people/ms/u-boot.git] / include / configs / ep7312.h

/*
 * (C) Copyright 2000
 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
 * Marius Groeger <mgroeger@sysgo.de>
 *
 * Configuation settings for the EP7312 board.
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/*
 * High Level Configuration Options
 * (easy to change)
 */
#define CONFIG_ARM7		1	/* This is a ARM7 CPU	*/
#define CONFIG_EP7312		1	/* on an EP7312 Board      */
#define CONFIG_ARM_THUMB	1	/* this is an ARM720TDMI */
#undef  CONFIG_ARM7_REVD		/* disable ARM720 REV.D Workarounds */

#undef CONFIG_USE_IRQ			/* don't need them anymore */

/*
 * Size of malloc() pool
 */
#define CFG_MALLOC_LEN		(CFG_ENV_SIZE + 128*1024)
#define CFG_GBL_DATA_SIZE	128	/* size in bytes reserved for initial data */

/*
 * Hardware drivers
 */
#define CONFIG_DRIVER_CS8900	1	/* we have a CS8900 on-board */
#define CS8900_BASE		0x20000000
#define CS8900_BUS16		1
#undef  CS8900_BUS32

/*
 * select serial console configuration
 */
#define CONFIG_SERIAL1		1	/* we use Serial line 1 */

/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE

#define CONFIG_BAUDRATE		9600

/*
 * BOOTP options
 */
#define CONFIG_BOOTP_SUBNETMASK
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_BOOTFILESIZE


/*
 * Command line configuration.
 */
#include <config_cmd_default.h>

#define CONFIG_CMD_JFFS2


#define CONFIG_BOOTDELAY	3
#define CONFIG_BOOTARGS		"devfs=mount root=ramfs console=ttyS0,9600"
#define CONFIG_ETHADDR		08:00:3e:21:c7:f7
/*#define CONFIG_NETMASK        255.255.0.0	*/
/*#define CONFIG_IPADDR		172.22.2.128	*/
/*#define CONFIG_SERVERIP	172.22.2.126	*/
/*#define CONFIG_BOOTFILE	"impa7"	*/
#define CONFIG_BOOTCOMMAND	"bootp;bootm"

#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE	230400		/* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX	2		/* which serial port to use */
#endif

/*
 * Miscellaneous configurable options
 */
#define	CFG_LONGHELP				/* undef to save memory		*/
#define	CFG_PROMPT		"EP7312 # "	/* Monitor Command Prompt	*/
#define	CFG_CBSIZE		256		/* Console I/O Buffer Size	*/
#define	CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
#define	CFG_MAXARGS		16		/* max number of command args	*/
#define CFG_BARGSIZE		CFG_CBSIZE	/* Boot Argument Buffer Size	*/

#define CFG_MEMTEST_START	0xc0400000	/* memtest works on	*/
#define CFG_MEMTEST_END		0xc0800000	/* 4 ... 8 MB in DRAM	*/

#undef  CFG_CLKS_IN_HZ		/* everything, incl board info, in Hz */

#define	CFG_LOAD_ADDR		0xc0500000	/* default load address	*/

#define	CFG_HZ			2000		/* decrementer freq: 2 kHz */

						/* valid baudrates */
#define CFG_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }

/*-----------------------------------------------------------------------
 * Stack sizes
 *
 * The stack sizes are set up in start.S using the settings below
 */
#define CONFIG_STACKSIZE	(128*1024)	/* regular stack */
#ifdef CONFIG_USE_IRQ
#define CONFIG_STACKSIZE_IRQ	(4*1024)	/* IRQ stack */
#define CONFIG_STACKSIZE_FIQ	(4*1024)	/* FIQ stack */
#endif

/*-----------------------------------------------------------------------
 * Physical Memory Map
 */
#define CONFIG_NR_DRAM_BANKS	1	   /* we have 2 banks of DRAM */
#define PHYS_SDRAM_1		0xc0000000 /* SDRAM Bank #1 */
#define PHYS_SDRAM_1_SIZE	0x01000000 /* 16 MB */

#define PHYS_FLASH_1		0x00000000 /* Flash Bank #1 */
#define PHYS_FLASH_SIZE		0x01000000 /* 16 MB */

#define CFG_FLASH_BASE		PHYS_FLASH_1

/*-----------------------------------------------------------------------
 * FLASH and environment organization
 */
#define CFG_MAX_FLASH_BANKS	1	/* max number of memory banks		*/
#define CFG_MAX_FLASH_SECT	128	/* max number of sectors on one chip	*/

/* timeout values are in ticks */
#define CFG_FLASH_ERASE_TOUT	(2*CFG_HZ) /* Timeout for Flash Erase */
#define CFG_FLASH_WRITE_TOUT	(2*CFG_HZ) /* Timeout for Flash Write */

#define	CONFIG_ENV_IS_IN_FLASH	1
#define CFG_ENV_ADDR		(PHYS_FLASH_1 + 0x20000)	/* Addr of Environment Sector	*/
#define CFG_ENV_SIZE		0x20000	/* Total Size of Environment Sector	*/

/*
 * JFFS2 partitions
 *
 */
/* No command line, one static partition, whole device */
#undef CONFIG_JFFS2_CMDLINE
#define CONFIG_JFFS2_DEV		"nor0"
#define CONFIG_JFFS2_PART_SIZE		0xFFFFFFFF
#define CONFIG_JFFS2_PART_OFFSET	0x00000000

/* mtdparts command line support */
/* Note: fake mtd_id used, no linux mtd map file */
/*
#define CONFIG_JFFS2_CMDLINE
#define MTDIDS_DEFAULT		"nor0=ep7312-0"
#define MTDPARTS_DEFAULT	"mtdparts=ep7312-0:-(jffs2)"
*/

#endif	/* __CONFIG_H */
Commit	Line	Data
da27dcf0 WD	1	/*
	2	* (C) Copyright 2000
	3	* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
	4	* Marius Groeger <mgroeger@sysgo.de>
	5	*
	6	* Configuation settings for the EP7312 board.
	7	*
	8	* See file CREDITS for list of people who contributed to this
	9	* project.
	10	*
	11	* This program is free software; you can redistribute it and/or
	12	* modify it under the terms of the GNU General Public License as
	13	* published by the Free Software Foundation; either version 2 of
	14	* the License, or (at your option) any later version.
	15	*
	16	* This program is distributed in the hope that it will be useful,
	17	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	18	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	19	* GNU General Public License for more details.
	20	*
	21	* You should have received a copy of the GNU General Public License
	22	* along with this program; if not, write to the Free Software
	23	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	24	* MA 02111-1307 USA
	25	*/
	26
	27	#ifndef __CONFIG_H
	28	#define __CONFIG_H
	29
da27dcf0 WD	30	/*
	31	* High Level Configuration Options
	32	* (easy to change)
	33	*/
	34	#define CONFIG_ARM7 1 /* This is a ARM7 CPU */
	35	#define CONFIG_EP7312 1 /* on an EP7312 Board */
	36	#define CONFIG_ARM_THUMB 1 /* this is an ARM720TDMI */
53677ef1	37	#undef CONFIG_ARM7_REVD /* disable ARM720 REV.D Workarounds */
da27dcf0 WD	38
	39	#undef CONFIG_USE_IRQ /* don't need them anymore */
	40
	41	/*
	42	* Size of malloc() pool
	43	*/
699b13a6	44	#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
a8c7c708	45	#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
da27dcf0 WD	46
	47	/*
	48	* Hardware drivers
	49	*/
	50	#define CONFIG_DRIVER_CS8900 1 /* we have a CS8900 on-board */
	51	#define CS8900_BASE 0x20000000
	52	#define CS8900_BUS16 1
	53	#undef CS8900_BUS32
	54
	55	/*
	56	* select serial console configuration
	57	*/
	58	#define CONFIG_SERIAL1 1 /* we use Serial line 1 */
	59
	60	/* allow to overwrite serial and ethaddr */
	61	#define CONFIG_ENV_OVERWRITE
	62
	63	#define CONFIG_BAUDRATE 9600
	64
2fd90ce5 JL	65	/*
	66	* BOOTP options
	67	*/
	68	#define CONFIG_BOOTP_SUBNETMASK
	69	#define CONFIG_BOOTP_GATEWAY
	70	#define CONFIG_BOOTP_HOSTNAME
	71	#define CONFIG_BOOTP_BOOTPATH
	72	#define CONFIG_BOOTP_BOOTFILESIZE
da27dcf0	73
da27dcf0	74
1bec3d30 JL	75	/*
	76	* Command line configuration.
	77	*/
	78	#include <config_cmd_default.h>
	79
	80	#define CONFIG_CMD_JFFS2
	81
da27dcf0 WD	82
da27dcf0 WD	83	#define CONFIG_BOOTDELAY 3
53677ef1 WD	84	#define CONFIG_BOOTARGS "devfs=mount root=ramfs console=ttyS0,9600"
53677ef1 WD	85	#define CONFIG_ETHADDR 08:00:3e:21:c7:f7
da27dcf0 WD	86	/#define CONFIG_NETMASK 255.255.0.0 /
	87	/#define CONFIG_IPADDR 172.22.2.128 /
	88	/#define CONFIG_SERVERIP 172.22.2.126 /
	89	/#define CONFIG_BOOTFILE "impa7" /
	90	#define CONFIG_BOOTCOMMAND "bootp;bootm"
	91
1bec3d30	92	#if defined(CONFIG_CMD_KGDB)
da27dcf0 WD	93	#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
	94	#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
	95	#endif
	96
	97	/*
	98	* Miscellaneous configurable options
	99	*/
	100	#define CFG_LONGHELP /* undef to save memory */
	101	#define CFG_PROMPT "EP7312 # " /* Monitor Command Prompt */
	102	#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
	103	#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
	104	#define CFG_MAXARGS 16 /* max number of command args */
	105	#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
	106
	107	#define CFG_MEMTEST_START 0xc0400000 /* memtest works on */
	108	#define CFG_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */
	109
	110	#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
	111
	112	#define CFG_LOAD_ADDR 0xc0500000 /* default load address */
	113
	114	#define CFG_HZ 2000 /* decrementer freq: 2 kHz */
	115
	116	/* valid baudrates */
	117	#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
	118
	119	/*-----------------------------------------------------------------------
	120	* Stack sizes
	121	*
	122	* The stack sizes are set up in start.S using the settings below
	123	*/
	124	#define CONFIG_STACKSIZE (1281024) / regular stack */
	125	#ifdef CONFIG_USE_IRQ
	126	#define CONFIG_STACKSIZE_IRQ (41024) / IRQ stack */
	127	#define CONFIG_STACKSIZE_FIQ (41024) / FIQ stack */
	128	#endif
	129
	130	/*-----------------------------------------------------------------------
	131	* Physical Memory Map
	132	*/
	133	#define CONFIG_NR_DRAM_BANKS 1 /* we have 2 banks of DRAM */
	134	#define PHYS_SDRAM_1 0xc0000000 /* SDRAM Bank #1 */
	135	#define PHYS_SDRAM_1_SIZE 0x01000000 /* 16 MB */
	136
	137	#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
	138	#define PHYS_FLASH_SIZE 0x01000000 /* 16 MB */
	139
	140	#define CFG_FLASH_BASE PHYS_FLASH_1
	141
	142	/*-----------------------------------------------------------------------
	143	* FLASH and environment organization
	144	*/
	145	#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
	146	#define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
	147
	148	/* timeout values are in ticks */
	149	#define CFG_FLASH_ERASE_TOUT (2CFG_HZ) / Timeout for Flash Erase */
	150	#define CFG_FLASH_WRITE_TOUT (2CFG_HZ) / Timeout for Flash Write */
	151
5a1aceb0	152	#define CONFIG_ENV_IS_IN_FLASH 1
da27dcf0 WD	153	#define CFG_ENV_ADDR (PHYS_FLASH_1 + 0x20000) /* Addr of Environment Sector */
	154	#define CFG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */
	155
700a0c64 WD	156	/*
	157	* JFFS2 partitions
	158	*
	159	*/
	160	/* No command line, one static partition, whole device */
	161	#undef CONFIG_JFFS2_CMDLINE
	162	#define CONFIG_JFFS2_DEV "nor0"
	163	#define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF
	164	#define CONFIG_JFFS2_PART_OFFSET 0x00000000
	165
	166	/* mtdparts command line support */
	167	/* Note: fake mtd_id used, no linux mtd map file */
	168	/*
	169	#define CONFIG_JFFS2_CMDLINE
	170	#define MTDIDS_DEFAULT "nor0=ep7312-0"
	171	#define MTDPARTS_DEFAULT "mtdparts=ep7312-0:-(jffs2)"
	172	*/
da27dcf0 WD	173
da27dcf0 WD	174	#endif /* __CONFIG_H */