[people/ms/u-boot.git] / include / configs / flea3.h

/*
 * (C) Copyright 2011, Stefano Babic <sbabic@denx.de>
 *
 * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
 *
 * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
 *
 * Configuration for the flea3 board.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#ifndef __CONFIG_H
#define __CONFIG_H

#include <asm/arch/imx-regs.h>

 /* High Level Configuration Options */
#define CONFIG_ARM1136	/* This is an arm1136 CPU core */
#define CONFIG_MX35
#define CONFIG_MX35_HCLK_FREQ	24000000

#define CONFIG_SYS_DCACHE_OFF

#define CONFIG_DISPLAY_CPUINFO

/* Only in case the value is not present in mach-types.h */
#ifndef MACH_TYPE_FLEA3
#define MACH_TYPE_FLEA3                3668
#endif

#define CONFIG_MACH_TYPE		MACH_TYPE_FLEA3

/* Set TEXT at the beginning of the NOR flash */
#define CONFIG_SYS_TEXT_BASE	0xA0000000

#define CONFIG_SYS_64BIT_VSPRINTF

/* This is required to setup the ESDC controller */
#define CONFIG_BOARD_EARLY_INIT_F

#define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
#define CONFIG_REVISION_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG

/*
 * Size of malloc() pool
 */
#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 1024 * 1024)

/*
 * Hardware drivers
 */
#define CONFIG_HARD_I2C
#define CONFIG_I2C_MXC
#define CONFIG_SYS_I2C_MX35_PORT3
#define CONFIG_SYS_I2C_SPEED		100000
#define CONFIG_SYS_I2C_SLAVE		0xfe
#define CONFIG_MXC_SPI
#define CONFIG_MXC_GPIO

/*
 * UART (console)
 */
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE	UART3_BASE

/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_CONS_INDEX	1
#define CONFIG_BAUDRATE		115200
#define CONFIG_SYS_BAUDRATE_TABLE	{9600, 19200, 38400, 57600, 115200}

/*
 * Command definition
 */

#include <config_cmd_default.h>

#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_BOOTP_SUBNETMASK
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_DNS

#define CONFIG_CMD_NAND

#define CONFIG_CMD_I2C
#define CONFIG_CMD_SPI
#define CONFIG_CMD_MII
#define CONFIG_CMD_NET
#define CONFIG_NET_RETRY_COUNT	100

#define CONFIG_BOOTDELAY	3

#define CONFIG_LOADADDR		0x90800000	/* loadaddr env var */


/*
 * Ethernet on SOC (FEC)
 */
#define CONFIG_NET_MULTI
#define CONFIG_FEC_MXC
#define IMX_FEC_BASE	FEC_BASE_ADDR
#define CONFIG_PHYLIB
#define CONFIG_PHY_MICREL
#define CONFIG_FEC_MXC_PHYADDR	0x1

#define CONFIG_MII
#define CONFIG_DISCOVER_PHY

#define CONFIG_ARP_TIMEOUT	200UL

/*
 * Miscellaneous configurable options
 */
#define CONFIG_SYS_LONGHELP	/* undef to save memory */
#define CONFIG_SYS_PROMPT	"flea3 U-Boot > "
#define CONFIG_CMDLINE_EDITING
#define CONFIG_SYS_HUSH_PARSER	/* Use the HUSH parser */
#define	CONFIG_SYS_PROMPT_HUSH_PS2	"> "

#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_CBSIZE	256	/* Console I/O Buffer Size */
/* Print Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_MAXARGS	16	/* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */

#define CONFIG_SYS_MEMTEST_START	0	/* memtest works on */
#define CONFIG_SYS_MEMTEST_END		0x10000

#undef	CONFIG_SYS_CLKS_IN_HZ	/* everything, incl board info, in Hz */

#define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR

#define CONFIG_SYS_HZ				1000


/*
 * Stack sizes
 *
 * The stack sizes are set up in start.S using the settings below
 */
#define CONFIG_STACKSIZE	(128 * 1024)	/* regular stack */

/*
 * Physical Memory Map
 */
#define CONFIG_NR_DRAM_BANKS	1
#define PHYS_SDRAM_1		CSD1_BASE_ADDR
#define PHYS_SDRAM_1_SIZE	(128 * 1024 * 1024)

#define CONFIG_SYS_SDRAM_BASE		CSD1_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_ADDR	(IRAM_BASE_ADDR + 0x10000)
#define CONFIG_SYS_INIT_RAM_SIZE		(IRAM_SIZE / 2)
#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - \
					GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
					CONFIG_SYS_GBL_DATA_OFFSET)

/*
 * MTD Command for mtdparts
 */
#define CONFIG_CMD_MTDPARTS
#define CONFIG_MTD_DEVICE
#define CONFIG_FLASH_CFI_MTD
#define CONFIG_MTD_PARTITIONS
#define MTDIDS_DEFAULT		"nand0=mxc_nand,nor0=physmap-flash.0"
#define MTDPARTS_DEFAULT	"mtdparts=mxc_nand:196m(root1)," \
				"196m(root2),-(user);"	\
				"physmap-flash.0:512k(u-boot),64k(env1)," \
				"64k(env2),3776k(kernel1),3776k(kernel2)"
/*
 * FLASH and environment organization
 */
#define CONFIG_SYS_FLASH_BASE		CS0_BASE_ADDR
#define CONFIG_SYS_MAX_FLASH_BANKS 1	/* max number of memory banks */
#define CONFIG_SYS_MAX_FLASH_SECT 512	/* max number of sectors on one chip */
/* Monitor at beginning of flash */
#define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_MONITOR_LEN		(512 * 1024)

#define CONFIG_ENV_SECT_SIZE	(64 * 1024)
#define CONFIG_ENV_SIZE		CONFIG_ENV_SECT_SIZE

/* Address and size of Redundant Environment Sector	*/
#define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
#define CONFIG_ENV_SIZE_REDUND	CONFIG_ENV_SIZE

#define CONFIG_ENV_ADDR		(CONFIG_SYS_MONITOR_BASE + \
				CONFIG_SYS_MONITOR_LEN)

#define CONFIG_ENV_IS_IN_FLASH

/*
 * CFI FLASH driver setup
 */
#define CONFIG_SYS_FLASH_CFI		/* Flash memory is CFI compliant */
#define CONFIG_FLASH_CFI_DRIVER

/* A non-standard buffered write algorithm */
#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	/* faster */
#define CONFIG_SYS_FLASH_PROTECTION	/* Use hardware sector protection */

/*
 * NAND FLASH driver setup
 */
#define CONFIG_NAND_MXC
#define CONFIG_NAND_MXC_V1_1
#define CONFIG_MXC_NAND_REGS_BASE	(NFC_BASE_ADDR)
#define CONFIG_SYS_MAX_NAND_DEVICE	1
#define CONFIG_SYS_NAND_BASE		(NFC_BASE_ADDR)
#define CONFIG_MXC_NAND_HWECC
#define CONFIG_SYS_NAND_LARGEPAGE

/*
 * Default environment and default scripts
 * to update uboot and load kernel
 */
#define xstr(s)	str(s)
#define str(s)	#s

#define CONFIG_HOSTNAME flea3
#define	CONFIG_EXTRA_ENV_SETTINGS					\
	"netdev=eth0\0"							\
	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
		"nfsroot=${serverip}:${rootpath}\0"			\
	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
	"addip_sta=setenv bootargs ${bootargs} "			\
		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
		":${hostname}:${netdev}:off panic=1\0"			\
	"addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0"		\
	"addip=if test -n ${ipdyn};then run addip_dyn;"			\
		"else run addip_sta;fi\0"	\
	"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"		\
	"addtty=setenv bootargs ${bootargs}"				\
		" console=ttymxc0,${baudrate}\0"			\
	"addmisc=setenv bootargs ${bootargs} ${misc}\0"			\
	"loadaddr=90800000\0"						\
	"kernel_addr_r=90800000\0"					\
	"hostname=" xstr(CONFIG_HOSTNAME) "\0"				\
	"bootfile=" xstr(CONFIG_HOSTNAME) "/uImage\0"			\
	"ramdisk_file=" xstr(CONFIG_HOSTNAME) "/uRamdisk\0"		\
	"flash_self=run ramargs addip addtty addmtd addmisc;"		\
		"bootm ${kernel_addr} ${ramdisk_addr}\0"		\
	"flash_nfs=run nfsargs addip addtty addmtd addmisc;"		\
		"bootm ${kernel_addr}\0"				\
	"net_nfs=tftp ${kernel_addr_r} ${bootfile}; "			\
		"run nfsargs addip addtty addmtd addmisc;"		\
		"bootm ${kernel_addr_r}\0"				\
	"net_self_load=tftp ${kernel_addr_r} ${bootfile};"		\
		"tftp ${ramdisk_addr_r} ${ramdisk_file};\0"		\
	"net_self=if run net_self_load;then "				\
		"run ramargs addip addtty addmtd addmisc;"		\
		"bootm ${kernel_addr_r} ${ramdisk_addr_r};"		\
		"else echo Images not loades;fi\0"			\
	"u-boot=" xstr(CONFIG_HOSTNAME) "/u-boot.bin\0"			\
	"load=tftp ${loadaddr} ${u-boot}\0"				\
	"uboot_addr=" xstr(CONFIG_SYS_MONITOR_BASE) "\0"		\
	"update=protect off ${uboot_addr} +40000;"			\
		"erase ${uboot_addr} +40000;"				\
		"cp.b ${loadaddr} ${uboot_addr} ${filesize}\0"		\
	"upd=if run load;then echo Updating u-boot;if run update;"	\
		"then echo U-Boot updated;"				\
			"else echo Error updating u-boot !;"		\
			"echo Board without bootloader !!;"		\
		"fi;"							\
		"else echo U-Boot not downloaded..exiting;fi\0"		\
	"bootcmd=run net_nfs\0"

#endif				/* __CONFIG_H */
Commit	Line	Data
deb53483 SB	1	/*
	2	* (C) Copyright 2011, Stefano Babic <sbabic@denx.de>
	3	*
	4	* (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
	5	*
	6	* Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
	7	*
	8	* Configuration for the flea3 board.
	9	*
	10	* This program is free software; you can redistribute it and/or
	11	* modify it under the terms of the GNU General Public License as
	12	* published by the Free Software Foundation; either version 2 of
	13	* the License, or (at your option) any later version.
	14	*
	15	* This program is distributed in the hope that it will be useful,
	16	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	17	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	18	* GNU General Public License for more details.
	19	*
	20	* You should have received a copy of the GNU General Public License
	21	* along with this program; if not, write to the Free Software
	22	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	23	* MA 02111-1307 USA
	24	*/
	25
	26	#ifndef __CONFIG_H
	27	#define __CONFIG_H
	28
	29	#include <asm/arch/imx-regs.h>
	30
	31	/* High Level Configuration Options */
	32	#define CONFIG_ARM1136 /* This is an arm1136 CPU core */
	33	#define CONFIG_MX35
	34	#define CONFIG_MX35_HCLK_FREQ 24000000
	35
	36	#define CONFIG_SYS_DCACHE_OFF
	37
	38	#define CONFIG_DISPLAY_CPUINFO
	39
	40	/* Only in case the value is not present in mach-types.h */
	41	#ifndef MACH_TYPE_FLEA3
	42	#define MACH_TYPE_FLEA3 3668
	43	#endif
	44
	45	#define CONFIG_MACH_TYPE MACH_TYPE_FLEA3
	46
	47	/* Set TEXT at the beginning of the NOR flash */
	48	#define CONFIG_SYS_TEXT_BASE 0xA0000000
	49
	50	#define CONFIG_SYS_64BIT_VSPRINTF
	51
	52	/* This is required to setup the ESDC controller */
	53	#define CONFIG_BOARD_EARLY_INIT_F
	54
	55	#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
	56	#define CONFIG_REVISION_TAG
	57	#define CONFIG_SETUP_MEMORY_TAGS
	58	#define CONFIG_INITRD_TAG
	59
	60	/*
	61	* Size of malloc() pool
	62	*/
	63	#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024)
	64
65	/*
66	* Hardware drivers
67	*/
68	#define CONFIG_HARD_I2C
69	#define CONFIG_I2C_MXC
70	#define CONFIG_SYS_I2C_MX35_PORT3
71	#define CONFIG_SYS_I2C_SPEED 100000
72	#define CONFIG_SYS_I2C_SLAVE 0xfe
73	#define CONFIG_MXC_SPI
74	#define CONFIG_MXC_GPIO
75
76	/*
77	* UART (console)
78	*/
79	#define CONFIG_MXC_UART
40f6fffe	80	#define CONFIG_MXC_UART_BASE UART3_BASE
deb53483 SB	81
	82	/* allow to overwrite serial and ethaddr */
	83	#define CONFIG_ENV_OVERWRITE
	84	#define CONFIG_CONS_INDEX 1
	85	#define CONFIG_BAUDRATE 115200
	86	#define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
	87
	88	/*
	89	* Command definition
	90	*/
	91
	92	#include <config_cmd_default.h>
	93
	94	#define CONFIG_CMD_PING
	95	#define CONFIG_CMD_DHCP
	96	#define CONFIG_BOOTP_SUBNETMASK
	97	#define CONFIG_BOOTP_GATEWAY
	98	#define CONFIG_BOOTP_DNS
	99
	100	#define CONFIG_CMD_NAND
	101
	102	#define CONFIG_CMD_I2C
	103	#define CONFIG_CMD_SPI
	104	#define CONFIG_CMD_MII
	105	#define CONFIG_CMD_NET
	106	#define CONFIG_NET_RETRY_COUNT 100
	107
	108	#define CONFIG_BOOTDELAY 3
	109
	110	#define CONFIG_LOADADDR 0x90800000 /* loadaddr env var */
	111
	112
	113	/*
	114	* Ethernet on SOC (FEC)
	115	*/
	116	#define CONFIG_NET_MULTI
	117	#define CONFIG_FEC_MXC
	118	#define IMX_FEC_BASE FEC_BASE_ADDR
	119	#define CONFIG_PHYLIB
	120	#define CONFIG_PHY_MICREL
	121	#define CONFIG_FEC_MXC_PHYADDR 0x1
	122
	123	#define CONFIG_MII
	124	#define CONFIG_DISCOVER_PHY
	125
	126	#define CONFIG_ARP_TIMEOUT 200UL
	127
	128	/*
	129	* Miscellaneous configurable options
	130	*/
	131	#define CONFIG_SYS_LONGHELP /* undef to save memory */
	132	#define CONFIG_SYS_PROMPT "flea3 U-Boot > "
	133	#define CONFIG_CMDLINE_EDITING
	134	#define CONFIG_SYS_HUSH_PARSER /* Use the HUSH parser */
	135	#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
	136
	137	#define CONFIG_AUTO_COMPLETE
	138	#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
	139	/* Print Buffer Size */
	140	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
	141	#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
	142	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
	143
	144	#define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */
145	#define CONFIG_SYS_MEMTEST_END 0x10000
146
147	#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
148
149	#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
150
151	#define CONFIG_SYS_HZ 1000
152
153
154	/*
155	* Stack sizes
156	*
157	* The stack sizes are set up in start.S using the settings below
158	*/
159	#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
160
161	/*
162	* Physical Memory Map
163	*/
164	#define CONFIG_NR_DRAM_BANKS 1
165	#define PHYS_SDRAM_1 CSD1_BASE_ADDR
166	#define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024)
167
168	#define CONFIG_SYS_SDRAM_BASE CSD1_BASE_ADDR
169	#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR + 0x10000)
170	#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE / 2)
171	#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
172	GENERATED_GBL_DATA_SIZE)
173	#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
174	CONFIG_SYS_GBL_DATA_OFFSET)
175
176	/*
177	* MTD Command for mtdparts
178	*/
179	#define CONFIG_CMD_MTDPARTS
180	#define CONFIG_MTD_DEVICE
181	#define CONFIG_FLASH_CFI_MTD
182	#define CONFIG_MTD_PARTITIONS
183	#define MTDIDS_DEFAULT "nand0=mxc_nand,nor0=physmap-flash.0"
184	#define MTDPARTS_DEFAULT "mtdparts=mxc_nand:196m(root1)," \
185	"196m(root2),-(user);" \
186	"physmap-flash.0:512k(u-boot),64k(env1)," \
187	"64k(env2),3776k(kernel1),3776k(kernel2)"
188	/*
189	* FLASH and environment organization
190	*/
191	#define CONFIG_SYS_FLASH_BASE CS0_BASE_ADDR
192	#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
193	#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
194	/* Monitor at beginning of flash */
195	#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
196	#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
197
198	#define CONFIG_ENV_SECT_SIZE (64 * 1024)
199	#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
200
201	/* Address and size of Redundant Environment Sector */
202	#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
203	#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
204
205	#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \
206	CONFIG_SYS_MONITOR_LEN)
207
208	#define CONFIG_ENV_IS_IN_FLASH
209
210	/*
211	* CFI FLASH driver setup
212	*/
213	#define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */
214	#define CONFIG_FLASH_CFI_DRIVER
215
216	/* A non-standard buffered write algorithm */
217	#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* faster */
218	#define CONFIG_SYS_FLASH_PROTECTION /* Use hardware sector protection */
219
220	/*
221	* NAND FLASH driver setup
222	*/
223	#define CONFIG_NAND_MXC
224	#define CONFIG_NAND_MXC_V1_1
225	#define CONFIG_MXC_NAND_REGS_BASE (NFC_BASE_ADDR)
226	#define CONFIG_SYS_MAX_NAND_DEVICE 1
227	#define CONFIG_SYS_NAND_BASE (NFC_BASE_ADDR)
228	#define CONFIG_MXC_NAND_HWECC
229	#define CONFIG_SYS_NAND_LARGEPAGE
230
231	/*
232	* Default environment and default scripts
233	* to update uboot and load kernel
234	*/
235	#define xstr(s) str(s)
236	#define str(s) #s
237
238	#define CONFIG_HOSTNAME flea3
239	#define CONFIG_EXTRA_ENV_SETTINGS \
240	"netdev=eth0\0" \
241	"nfsargs=setenv bootargs root=/dev/nfs rw " \
242	"nfsroot=${serverip}:${rootpath}\0" \
243	"ramargs=setenv bootargs root=/dev/ram rw\0" \
244	"addip_sta=setenv bootargs ${bootargs} " \
245	"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
246	":${hostname}:${netdev}:off panic=1\0" \
247	"addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \
248	"addip=if test -n ${ipdyn};then run addip_dyn;" \
249	"else run addip_sta;fi\0" \
250	"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
251	"addtty=setenv bootargs ${bootargs}" \
252	" console=ttymxc0,${baudrate}\0" \
253	"addmisc=setenv bootargs ${bootargs} ${misc}\0" \
254	"loadaddr=90800000\0" \
255	"kernel_addr_r=90800000\0" \
256	"hostname=" xstr(CONFIG_HOSTNAME) "\0" \
257	"bootfile=" xstr(CONFIG_HOSTNAME) "/uImage\0" \
258	"ramdisk_file=" xstr(CONFIG_HOSTNAME) "/uRamdisk\0" \
259	"flash_self=run ramargs addip addtty addmtd addmisc;" \
260	"bootm ${kernel_addr} ${ramdisk_addr}\0" \
261	"flash_nfs=run nfsargs addip addtty addmtd addmisc;" \
262	"bootm ${kernel_addr}\0" \
263	"net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
264	"run nfsargs addip addtty addmtd addmisc;" \
265	"bootm ${kernel_addr_r}\0" \
266	"net_self_load=tftp ${kernel_addr_r} ${bootfile};" \
267	"tftp ${ramdisk_addr_r} ${ramdisk_file};\0" \
268	"net_self=if run net_self_load;then " \
269	"run ramargs addip addtty addmtd addmisc;" \
270	"bootm ${kernel_addr_r} ${ramdisk_addr_r};" \
271	"else echo Images not loades;fi\0" \
272	"u-boot=" xstr(CONFIG_HOSTNAME) "/u-boot.bin\0" \
273	"load=tftp ${loadaddr} ${u-boot}\0" \
274	"uboot_addr=" xstr(CONFIG_SYS_MONITOR_BASE) "\0" \
275	"update=protect off ${uboot_addr} +40000;" \
276	"erase ${uboot_addr} +40000;" \
277	"cp.b ${loadaddr} ${uboot_addr} ${filesize}\0" \
278	"upd=if run load;then echo Updating u-boot;if run update;" \
279	"then echo U-Boot updated;" \
280	"else echo Error updating u-boot !;" \
281	"echo Board without bootloader !!;" \
282	"fi;" \
283	"else echo U-Boot not downloaded..exiting;fi\0" \
284	"bootcmd=run net_nfs\0"
285
286	#endif /* __CONFIG_H */