[people/ms/u-boot.git] / include / configs / gcplus.h

/*
 * (C) Copyright 2002
 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
 * Marius Groeger <mgroeger@sysgo.de>
 *
 * 2003-2004 (c) MontaVista Software, Inc.
 *
 * Configuation settings for the ADS GraphicsClient+ board.
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/*
 * The ADS GCPlus Linux boot ROM loads U-Boot into RAM at 0xc0200000.
 * We don't actually init RAM in this case since we're using U-Boot as
 * an secondary boot loader during Linux kernel development and testing,
 * e.g. bootp/tftp download of the kernel is a far more convenient
 * when testing new kernels on this target. However the ADS GCPlus Linux
 * boot ROM leaves the MMU enabled when it passes control to U-Boot. So
 * we use lowlevel_init (CONFIG_INIT_CRITICAL) to remedy that problem.
 */
#undef  CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SKIP_RELOCATE_UBOOT	1

/*
 * High Level Configuration Options
 * (easy to change)
 */
#define CONFIG_SA1110		1	/* This is an SA1100 CPU	*/
#define CONFIG_GCPLUS		1	/* on an ADS GCPlus Board      */

#undef CONFIG_USE_IRQ			/* we don't need IRQ/FIQ stuff */

#define CONFIG_CMDLINE_TAG	 1	/* enable passing of ATAGs	*/
#define CONFIG_SETUP_MEMORY_TAGS 1
#define CONFIG_INITRD_TAG	 1

/*
 * Size of malloc() pool
 */
#define CONFIG_SYS_MALLOC_LEN          (CONFIG_ENV_SIZE + 128*1024)
#define CONFIG_SYS_GBL_DATA_SIZE       128     /* size rsrvd for initial data */


/*
 * Hardware drivers
 */
#define CONFIG_DRIVER_LAN91C96	/* we have an SMC9194 on-board */
#define CONFIG_LAN91C96_BASE	0x100e0000

/*
 * select serial console configuration
 */
#define CONFIG_SERIAL3          1	/* we use SERIAL 3 on ADS GCPlus */

/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE

#define CONFIG_BAUDRATE		38400


/*
 * Command line configuration.
 */
#include <config_cmd_default.h>

#define CONFIG_CMD_DHCP


/*
 * BOOTP options
 */
#define CONFIG_BOOTP_SUBNETMASK
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
#define CONFIG_BOOTP_BOOTPATH


#define CONFIG_BOOTDELAY	3
#define CONFIG_BOOTARGS		"console=ttySA0,38400n8 mtdparts=sa1100-flash:1m@0(zImage),3m@1m(ramdisk.gz),12m@4m(userfs) root=/dev/nfs ip=bootp"
#define CONFIG_BOOTCOMMAND	"bootp;tftp;bootm"
#define CONFIG_SYS_AUTOLOAD            "n"             /* No autoload */

#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE	38400		/* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX	2		/* which serial port to use */
#endif

/*
 * Miscellaneous configurable options
 */
#define	CONFIG_SYS_LONGHELP				/* undef to save memory		*/
#define	CONFIG_SYS_PROMPT		"ADS GCPlus # "	/* Monitor Command Prompt	*/
#define	CONFIG_SYS_CBSIZE		256		/* Console I/O Buffer Size	*/
#define	CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
#define	CONFIG_SYS_MAXARGS		16		/* max number of command args	*/
#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size	*/

#define CONFIG_SYS_MEMTEST_START	0xc0400000	/* memtest works on	*/
#define CONFIG_SYS_MEMTEST_END		0xc0800000	/* 4 ... 8 MB in DRAM	*/

#undef  CONFIG_SYS_CLKS_IN_HZ		/* everything, incl board info, in Hz */

#define	CONFIG_SYS_LOAD_ADDR		0xc0000000	/* default load address	*/

#define	CONFIG_SYS_HZ			3686400		/* incrementer freq: 3.6864 MHz */
#define CONFIG_SYS_CPUSPEED		0x0a		/* set core clock to 206MHz */

						/* valid baudrates */
#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }

/*-----------------------------------------------------------------------
 * Stack sizes
 *
 * The stack sizes are set up in start.S using the settings below
 */
#define CONFIG_STACKSIZE	(128*1024)	/* regular stack */
#ifdef CONFIG_USE_IRQ
#define CONFIG_STACKSIZE_IRQ	(4*1024)	/* IRQ stack */
#define CONFIG_STACKSIZE_FIQ	(4*1024)	/* FIQ stack */
#endif

/*-----------------------------------------------------------------------
 * Physical Memory Map
 */
#define CONFIG_NR_DRAM_BANKS	2	   /* we have 2 banks of DRAM */
#define PHYS_SDRAM_1		0xc0000000 /* SDRAM Bank #1 */
#define PHYS_SDRAM_1_SIZE	0x01000000 /* 16 MB */
#define PHYS_SDRAM_2		0xc8000000 /* SDRAM Bank #2 */
#define PHYS_SDRAM_2_SIZE	0x01000000 /* 16 MB */


#define PHYS_FLASH_1		0x08000000 /* Flash Bank #1 */
#define PHYS_FLASH_SIZE		0x00800000 /* 8 MB */
#define PHYS_FLASH_BANK_SIZE    0x01000000 /* 16 MB Banks */
#define PHYS_FLASH_SECT_SIZE    0x00040000 /* 256 KB sectors (x2) */

#define CONFIG_SYS_FLASH_BASE		PHYS_FLASH_1

/*-----------------------------------------------------------------------
 * FLASH and environment organization
 */
#if	1
#define CONFIG_SYS_MAX_FLASH_BANKS	1	/* max number of memory banks */
#define CONFIG_SYS_MAX_FLASH_SECT	128	/* max number of sectors on one chip */

/* timeout values are in ticks */
#define CONFIG_SYS_FLASH_ERASE_TOUT	(2*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
#define CONFIG_SYS_FLASH_WRITE_TOUT	(2*CONFIG_SYS_HZ) /* Timeout for Flash Write */
#else
/* REVISIT: This doesn't work on ADS GCPlus just yet: */
#define CONFIG_SYS_FLASH_CFI           1       /* flash is CFI conformant      */
#define CONFIG_FLASH_CFI_DRIVER    1       /* use common cfi driver        */
#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1    /* use buffered writes (20x faster) */
#define CONFIG_SYS_MAX_FLASH_BANKS     1       /* max # of memory banks        */
#define CONFIG_SYS_FLASH_INCREMENT     0       /* there is only one bank       */
#define CONFIG_SYS_MAX_FLASH_SECT      128     /* max # of sectors on one chip */
/*#define CONFIG_SYS_FLASH_PROTECTION    1       /--* hardware flash protection    */
#define CONFIG_SYS_FLASH_BANKS_LIST    { CONFIG_SYS_FLASH_BASE }
#endif

#define	CONFIG_ENV_IS_IN_FLASH	1
#define CONFIG_ENV_ADDR		(PHYS_FLASH_1 + PHYS_FLASH_SECT_SIZE)	/* Addr of Environment Sector	*/
#define CONFIG_ENV_SIZE		PHYS_FLASH_SECT_SIZE

#endif	/* __CONFIG_H */
Commit	Line	Data
855a496f WD	1	/*
	2	* (C) Copyright 2002
	3	* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
	4	* Marius Groeger <mgroeger@sysgo.de>
	5	*
	6	* 2003-2004 (c) MontaVista Software, Inc.
	7	*
	8	* Configuation settings for the ADS GraphicsClient+ board.
	9	*
	10	* See file CREDITS for list of people who contributed to this
	11	* project.
	12	*
	13	* This program is free software; you can redistribute it and/or
	14	* modify it under the terms of the GNU General Public License as
	15	* published by the Free Software Foundation; either version 2 of
	16	* the License, or (at your option) any later version.
	17	*
	18	* This program is distributed in the hope that it will be useful,
	19	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	20	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	21	* GNU General Public License for more details.
	22	*
	23	* You should have received a copy of the GNU General Public License
	24	* along with this program; if not, write to the Free Software
	25	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	26	* MA 02111-1307 USA
	27	*/
	28
	29	#ifndef __CONFIG_H
	30	#define __CONFIG_H
	31
855a496f WD	32	/*
	33	* The ADS GCPlus Linux boot ROM loads U-Boot into RAM at 0xc0200000.
	34	* We don't actually init RAM in this case since we're using U-Boot as
	35	* an secondary boot loader during Linux kernel development and testing,
	36	* e.g. bootp/tftp download of the kernel is a far more convenient
	37	* when testing new kernels on this target. However the ADS GCPlus Linux
	38	* boot ROM leaves the MMU enabled when it passes control to U-Boot. So
400558b5	39	* we use lowlevel_init (CONFIG_INIT_CRITICAL) to remedy that problem.
855a496f	40	*/
8aa1a2d1 WD	41	#undef CONFIG_SKIP_LOWLEVEL_INIT
8aa1a2d1 WD	42	#define CONFIG_SKIP_RELOCATE_UBOOT 1
855a496f WD	43
	44	/*
	45	* High Level Configuration Options
	46	* (easy to change)
	47	*/
	48	#define CONFIG_SA1110 1 /* This is an SA1100 CPU */
	49	#define CONFIG_GCPLUS 1 /* on an ADS GCPlus Board */
	50
	51	#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
	52
	53	#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
	54	#define CONFIG_SETUP_MEMORY_TAGS 1
	55	#define CONFIG_INITRD_TAG 1
	56
	57	/*
	58	* Size of malloc() pool
	59	*/
6d0f6bcf JCPV	60	#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
6d0f6bcf JCPV	61	#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size rsrvd for initial data */
855a496f WD	62
	63
	64	/*
	65	* Hardware drivers
	66	*/
	67	#define CONFIG_DRIVER_LAN91C96 /* we have an SMC9194 on-board */
	68	#define CONFIG_LAN91C96_BASE 0x100e0000
	69
	70	/*
	71	* select serial console configuration
	72	*/
	73	#define CONFIG_SERIAL3 1 /* we use SERIAL 3 on ADS GCPlus */
	74
	75	/* allow to overwrite serial and ethaddr */
	76	#define CONFIG_ENV_OVERWRITE
	77
	78	#define CONFIG_BAUDRATE 38400
	79
855a496f	80
72eb0efa JL	81	/*
	82	* Command line configuration.
	83	*/
	84	#include <config_cmd_default.h>
	85
	86	#define CONFIG_CMD_DHCP
	87
	88
2fd90ce5 JL	89	/*
	90	* BOOTP options
	91	*/
	92	#define CONFIG_BOOTP_SUBNETMASK
	93	#define CONFIG_BOOTP_GATEWAY
	94	#define CONFIG_BOOTP_HOSTNAME
	95	#define CONFIG_BOOTP_BOOTPATH
	96
855a496f WD	97
	98	#define CONFIG_BOOTDELAY 3
	99	#define CONFIG_BOOTARGS "console=ttySA0,38400n8 mtdparts=sa1100-flash:1m@0(zImage),3m@1m(ramdisk.gz),12m@4m(userfs) root=/dev/nfs ip=bootp"
	100	#define CONFIG_BOOTCOMMAND "bootp;tftp;bootm"
6d0f6bcf	101	#define CONFIG_SYS_AUTOLOAD "n" /* No autoload */
855a496f	102
72eb0efa	103	#if defined(CONFIG_CMD_KGDB)
855a496f WD	104	#define CONFIG_KGDB_BAUDRATE 38400 /* speed to run kgdb serial port */
	105	#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
	106	#endif
	107
	108	/*
	109	* Miscellaneous configurable options
	110	*/
6d0f6bcf JCPV	111	#define CONFIG_SYS_LONGHELP /* undef to save memory */
	112	#define CONFIG_SYS_PROMPT "ADS GCPlus # " /* Monitor Command Prompt */
	113	#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
	114	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
	115	#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
	116	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
855a496f	117
6d0f6bcf JCPV	118	#define CONFIG_SYS_MEMTEST_START 0xc0400000 /* memtest works on */
6d0f6bcf JCPV	119	#define CONFIG_SYS_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */
855a496f	120
6d0f6bcf	121	#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
855a496f	122
6d0f6bcf	123	#define CONFIG_SYS_LOAD_ADDR 0xc0000000 /* default load address */
855a496f	124
6d0f6bcf JCPV	125	#define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */
6d0f6bcf JCPV	126	#define CONFIG_SYS_CPUSPEED 0x0a /* set core clock to 206MHz */
855a496f WD	127
855a496f WD	128	/* valid baudrates */
6d0f6bcf	129	#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
855a496f WD	130
	131	/*-----------------------------------------------------------------------
	132	* Stack sizes
	133	*
	134	* The stack sizes are set up in start.S using the settings below
	135	*/
	136	#define CONFIG_STACKSIZE (1281024) / regular stack */
	137	#ifdef CONFIG_USE_IRQ
	138	#define CONFIG_STACKSIZE_IRQ (41024) / IRQ stack */
	139	#define CONFIG_STACKSIZE_FIQ (41024) / FIQ stack */
	140	#endif
	141
	142	/*-----------------------------------------------------------------------
	143	* Physical Memory Map
	144	*/
	145	#define CONFIG_NR_DRAM_BANKS 2 /* we have 2 banks of DRAM */
	146	#define PHYS_SDRAM_1 0xc0000000 /* SDRAM Bank #1 */
	147	#define PHYS_SDRAM_1_SIZE 0x01000000 /* 16 MB */
	148	#define PHYS_SDRAM_2 0xc8000000 /* SDRAM Bank #2 */
	149	#define PHYS_SDRAM_2_SIZE 0x01000000 /* 16 MB */
	150
	151
	152	#define PHYS_FLASH_1 0x08000000 /* Flash Bank #1 */
	153	#define PHYS_FLASH_SIZE 0x00800000 /* 8 MB */
	154	#define PHYS_FLASH_BANK_SIZE 0x01000000 /* 16 MB Banks */
	155	#define PHYS_FLASH_SECT_SIZE 0x00040000 /* 256 KB sectors (x2) */
	156
6d0f6bcf	157	#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
855a496f WD	158
	159	/*-----------------------------------------------------------------------
	160	* FLASH and environment organization
	161	*/
	162	#if 1
6d0f6bcf JCPV	163	#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
6d0f6bcf JCPV	164	#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
855a496f WD	165
855a496f WD	166	/* timeout values are in ticks */
6d0f6bcf JCPV	167	#define CONFIG_SYS_FLASH_ERASE_TOUT (2CONFIG_SYS_HZ) / Timeout for Flash Erase */
6d0f6bcf JCPV	168	#define CONFIG_SYS_FLASH_WRITE_TOUT (2CONFIG_SYS_HZ) / Timeout for Flash Write */
855a496f	169	#else
42dfe7a1	170	/* REVISIT: This doesn't work on ADS GCPlus just yet: */
6d0f6bcf	171	#define CONFIG_SYS_FLASH_CFI 1 /* flash is CFI conformant */
00b1883a	172	#define CONFIG_FLASH_CFI_DRIVER 1 /* use common cfi driver */
6d0f6bcf JCPV	173	#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */
	174	#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max # of memory banks */
	175	#define CONFIG_SYS_FLASH_INCREMENT 0 /* there is only one bank */
	176	#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max # of sectors on one chip */
	177	/#define CONFIG_SYS_FLASH_PROTECTION 1 /-- hardware flash protection */
	178	#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
855a496f WD	179	#endif
855a496f WD	180
5a1aceb0	181	#define CONFIG_ENV_IS_IN_FLASH 1
0e8d1586 JCPV	182	#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + PHYS_FLASH_SECT_SIZE) /* Addr of Environment Sector */
0e8d1586 JCPV	183	#define CONFIG_ENV_SIZE PHYS_FLASH_SECT_SIZE
855a496f WD	184
855a496f WD	185	#endif /* __CONFIG_H */