[people/ms/u-boot.git] / include / configs / ge_bx50v3.h

/*
 * Copyright (C) 2015 Timesys Corporation
 * Copyright (C) 2015 General Electric Company
 * Copyright (C) 2014 Advantech
 * Copyright (C) 2012 Freescale Semiconductor, Inc.
 *
 * Configuration settings for the GE MX6Q Bx50v3 boards.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __GE_BX50V3_CONFIG_H
#define __GE_BX50V3_CONFIG_H

#include <asm/arch/imx-regs.h>
#include <asm/mach-imx/gpio.h>

#define BX50V3_BOOTARGS_EXTRA
#if defined(CONFIG_TARGET_GE_B450V3)
#define CONFIG_BOARD_NAME	"General Electric B450v3"
#elif defined(CONFIG_TARGET_GE_B650V3)
#define CONFIG_BOARD_NAME	"General Electric B650v3"
#elif defined(CONFIG_TARGET_GE_B850V3)
#define CONFIG_BOARD_NAME	"General Electric B850v3"
#undef BX50V3_BOOTARGS_EXTRA
#define BX50V3_BOOTARGS_EXTRA	"video=DP-1:1024x768@60 " \
				"video=HDMI-A-1:1024x768@60 "
#else
#define CONFIG_BOARD_NAME	"General Electric BA16 Generic"
#endif

#define CONFIG_MXC_UART_BASE	UART3_BASE
#define CONSOLE_DEV	"ttymxc2"

#define CONFIG_SUPPORT_EMMC_BOOT


#include "mx6_common.h"
#include <linux/sizes.h>

#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_REVISION_TAG
#define CONFIG_SYS_MALLOC_LEN		(10 * SZ_1M)

#define CONFIG_MXC_GPIO
#define CONFIG_MXC_UART

#define CONFIG_MXC_OCOTP

/* SATA Configs */
#ifdef CONFIG_CMD_SATA
#define CONFIG_SYS_SATA_MAX_DEVICE	1
#define CONFIG_DWC_AHSATA_PORT_ID	0
#define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_ARB_BASE_ADDR
#define CONFIG_LBA48
#endif

/* MMC Configs */
#define CONFIG_FSL_ESDHC
#define CONFIG_FSL_USDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR      0
#define CONFIG_BOUNCE_BUFFER

/* USB Configs */
#ifdef CONFIG_USB
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_MXC_USB_PORTSC	(PORT_PTS_UTMI | PORT_PTS_PTW)
#define CONFIG_MXC_USB_FLAGS	0

#define CONFIG_USBD_HS
#define CONFIG_USB_GADGET_MASS_STORAGE
#endif

/* Networking Configs */
#ifdef CONFIG_NET
#define CONFIG_FEC_MXC
#define CONFIG_MII
#define IMX_FEC_BASE			ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE		RGMII
#define CONFIG_ETHPRIME		"FEC"
#define CONFIG_FEC_MXC_PHYADDR		4
#define CONFIG_PHY_ATHEROS
#endif

/* Serial Flash */
#ifdef CONFIG_CMD_SF
#define CONFIG_MXC_SPI
#define CONFIG_SF_DEFAULT_BUS		0
#define CONFIG_SF_DEFAULT_CS		0
#define CONFIG_SF_DEFAULT_SPEED	20000000
#define CONFIG_SF_DEFAULT_MODE		SPI_MODE_0
#endif

/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_CONS_INDEX	1

#define CONFIG_LOADADDR	0x12000000
#define CONFIG_SYS_TEXT_BASE	0x17800000

#define CONFIG_EXTRA_ENV_SETTINGS \
	"script=boot.scr\0" \
	"image=/boot/uImage\0" \
	"uboot=u-boot.imx\0" \
	"fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
	"fdt_addr=0x18000000\0" \
	"boot_fdt=yes\0" \
	"ip_dyn=yes\0" \
	"console=" CONSOLE_DEV "\0" \
	"fdt_high=0xffffffff\0"	  \
	"initrd_high=0xffffffff\0" \
	"sddev=0\0" \
	"emmcdev=1\0" \
	"partnum=1\0" \
	"update_sd_firmware=" \
		"if test ${ip_dyn} = yes; then " \
			"setenv get_cmd dhcp; " \
		"else " \
			"setenv get_cmd tftp; " \
		"fi; " \
		"if mmc dev ${mmcdev}; then "	\
			"if ${get_cmd} ${update_sd_firmware_filename}; then " \
				"setexpr fw_sz ${filesize} / 0x200; " \
				"setexpr fw_sz ${fw_sz} + 1; "	\
				"mmc write ${loadaddr} 0x2 ${fw_sz}; " \
			"fi; "	\
		"fi\0" \
	"update_sf_uboot=" \
		"if tftp $loadaddr $uboot; then " \
			"sf probe; " \
			"sf erase 0 0xC0000; " \
			"sf write $loadaddr 0x400 $filesize; " \
			"echo 'U-Boot upgraded. Please reset'; " \
		"fi\0" \
	"setargs=setenv bootargs console=${console},${baudrate} " \
		"root=/dev/${rootdev} rw rootwait cma=128M " \
		BX50V3_BOOTARGS_EXTRA "\0" \
	"loadbootscript=" \
		"ext2load ${dev} ${devnum}:${partnum} ${loadaddr} ${script};\0" \
	"bootscript=echo Running bootscript from ${dev}:${devnum}:${partnum};" \
		" source\0" \
	"loadimage=" \
		"ext2load ${dev} ${devnum}:${partnum} ${loadaddr} ${image}\0" \
	"loadfdt=ext2load ${dev} ${devnum}:${partnum} ${fdt_addr} ${fdt_file}\0" \
	"tryboot=" \
		"if run loadbootscript; then " \
			"run bootscript; " \
		"else " \
			"if run loadimage; then " \
				"run doboot; " \
			"fi; " \
		"fi;\0" \
	"doboot=echo Booting from ${dev}:${devnum}:${partnum} ...; " \
		"run setargs; " \
		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
			"if run loadfdt; then " \
				"bootm ${loadaddr} - ${fdt_addr}; " \
			"else " \
				"if test ${boot_fdt} = try; then " \
					"bootm; " \
				"else " \
					"echo WARN: Cannot load the DT; " \
				"fi; " \
			"fi; " \
		"else " \
			"bootm; " \
		"fi;\0" \
	"netargs=setenv bootargs console=${console},${baudrate} " \
		"root=/dev/nfs " \
		"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
	"netboot=echo Booting from net ...; " \
		"run netargs; " \
		"if test ${ip_dyn} = yes; then " \
			"setenv get_cmd dhcp; " \
		"else " \
			"setenv get_cmd tftp; " \
		"fi; " \
		"${get_cmd} ${image}; " \
		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
			"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
				"bootm ${loadaddr} - ${fdt_addr}; " \
			"else " \
				"if test ${boot_fdt} = try; then " \
					"bootm; " \
				"else " \
					"echo WARN: Cannot load the DT; " \
				"fi; " \
			"fi; " \
		"else " \
			"bootm; " \
		"fi;\0" \

#define CONFIG_MMCBOOTCOMMAND \
	"setenv dev mmc; " \
	"setenv rootdev mmcblk0p${partnum}; " \
	\
	"setenv devnum ${sddev}; " \
	"if mmc dev ${devnum}; then " \
		"run tryboot; " \
		"setenv rootdev mmcblk1p${partnum}; " \
	"fi; " \
	\
	"setenv devnum ${emmcdev}; " \
	"if mmc dev ${devnum}; then " \
		"run tryboot; " \
	"fi; " \

#define CONFIG_USBBOOTCOMMAND \
	"usb start; " \
	"setenv dev usb; " \
	"setenv devnum 0; " \
	"setenv rootdev sda${partnum}; " \
	"run tryboot; " \
	\
	CONFIG_MMCBOOTCOMMAND \
	"bmode usb; " \

#ifdef CONFIG_CMD_USB
#define CONFIG_BOOTCOMMAND CONFIG_USBBOOTCOMMAND
#else
#define CONFIG_BOOTCOMMAND CONFIG_MMCBOOTCOMMAND
#endif

#define CONFIG_ARP_TIMEOUT     200UL

/* Miscellaneous configurable options */
#define CONFIG_SYS_LONGHELP
#define CONFIG_AUTO_COMPLETE

#define CONFIG_SYS_MEMTEST_START       0x10000000
#define CONFIG_SYS_MEMTEST_END         0x10010000
#define CONFIG_SYS_MEMTEST_SCRATCH     0x10800000

#define CONFIG_SYS_LOAD_ADDR           CONFIG_LOADADDR

#define CONFIG_CMDLINE_EDITING

/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS           1
#define PHYS_SDRAM                     MMDC0_ARB_BASE_ADDR

#define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM
#define CONFIG_SYS_INIT_RAM_ADDR       IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE

#define CONFIG_SYS_INIT_SP_OFFSET \
	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)

/* environment organization */
#define CONFIG_ENV_SIZE		(8 * 1024)
#define CONFIG_ENV_OFFSET		(768 * 1024)
#define CONFIG_ENV_SECT_SIZE		(64 * 1024)
#define CONFIG_ENV_SPI_BUS		CONFIG_SF_DEFAULT_BUS
#define CONFIG_ENV_SPI_CS		CONFIG_SF_DEFAULT_CS
#define CONFIG_ENV_SPI_MODE		CONFIG_SF_DEFAULT_MODE
#define CONFIG_ENV_SPI_MAX_HZ		CONFIG_SF_DEFAULT_SPEED

#ifndef CONFIG_SYS_DCACHE_OFF
#endif

#define CONFIG_SYS_FSL_USDHC_NUM	3

/* Framebuffer */
#ifdef CONFIG_VIDEO
#define CONFIG_VIDEO_IPUV3
#define CONFIG_VIDEO_BMP_RLE8
#define CONFIG_SPLASH_SCREEN
#define CONFIG_SPLASH_SCREEN_ALIGN
#define CONFIG_BMP_16BPP
#define CONFIG_VIDEO_LOGO
#define CONFIG_VIDEO_BMP_LOGO
#define CONFIG_IMX_HDMI
#define CONFIG_IMX_VIDEO_SKIP
#endif

#define CONFIG_PWM_IMX
#define CONFIG_IMX6_PWM_PER_CLK	66000000

#ifdef CONFIG_CMD_PCI
#define CONFIG_PCI_SCAN_SHOW
#define CONFIG_PCIE_IMX
#define CONFIG_PCIE_IMX_PERST_GPIO	IMX_GPIO_NR(7, 12)
#define CONFIG_PCIE_IMX_POWER_GPIO	IMX_GPIO_NR(1, 5)
#endif

/* I2C Configs */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_SPEED		  100000
#define CONFIG_SYS_I2C_MXC_I2C1
#define CONFIG_SYS_I2C_MXC_I2C2
#define CONFIG_SYS_I2C_MXC_I2C3

#define CONFIG_SYS_NUM_I2C_BUSES        9
#define CONFIG_SYS_I2C_MAX_HOPS         1
#define CONFIG_SYS_I2C_BUSES	{	{0, {I2C_NULL_HOP} }, \
					{0, {{I2C_MUX_PCA9547, 0x70, 0} } }, \
					{0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \
					{0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \
					{0, {{I2C_MUX_PCA9547, 0x70, 3} } }, \
					{0, {{I2C_MUX_PCA9547, 0x70, 4} } }, \
					{0, {{I2C_MUX_PCA9547, 0x70, 5} } }, \
					{0, {{I2C_MUX_PCA9547, 0x70, 6} } }, \
					{0, {{I2C_MUX_PCA9547, 0x70, 7} } }, \
				}

#define CONFIG_BCH

#endif	/* __GE_BX50V3_CONFIG_H */
Commit	Line	Data
f9162b15 AB	1	/*
	2	* Copyright (C) 2015 Timesys Corporation
	3	* Copyright (C) 2015 General Electric Company
	4	* Copyright (C) 2014 Advantech
	5	* Copyright (C) 2012 Freescale Semiconductor, Inc.
	6	*
	7	* Configuration settings for the GE MX6Q Bx50v3 boards.
	8	*
	9	* SPDX-License-Identifier: GPL-2.0+
	10	*/
	11
	12	#ifndef __GE_BX50V3_CONFIG_H
	13	#define __GE_BX50V3_CONFIG_H
	14
	15	#include <asm/arch/imx-regs.h>
552a848e	16	#include <asm/mach-imx/gpio.h>
f9162b15	17
3dddc793	18	#define BX50V3_BOOTARGS_EXTRA
f9162b15 AB	19	#if defined(CONFIG_TARGET_GE_B450V3)
f9162b15 AB	20	#define CONFIG_BOARD_NAME "General Electric B450v3"
f9162b15 AB	21	#elif defined(CONFIG_TARGET_GE_B650V3)
f9162b15 AB	22	#define CONFIG_BOARD_NAME "General Electric B650v3"
f9162b15 AB	23	#elif defined(CONFIG_TARGET_GE_B850V3)
f9162b15 AB	24	#define CONFIG_BOARD_NAME "General Electric B850v3"
3dddc793 KL	25	#undef BX50V3_BOOTARGS_EXTRA
	26	#define BX50V3_BOOTARGS_EXTRA "video=DP-1:1024x768@60 " \
	27	"video=HDMI-A-1:1024x768@60 "
f9162b15 AB	28	#else
f9162b15 AB	29	#define CONFIG_BOARD_NAME "General Electric BA16 Generic"
f9162b15 AB	30	#endif
	31
	32	#define CONFIG_MXC_UART_BASE UART3_BASE
12ca05a3	33	#define CONSOLE_DEV "ttymxc2"
f9162b15	34
f9162b15 AB	35	#define CONFIG_SUPPORT_EMMC_BOOT
f9162b15 AB	36
f9162b15 AB	37
	38	#include "mx6_common.h"
	39	#include <linux/sizes.h>
	40
f9162b15 AB	41	#define CONFIG_CMDLINE_TAG
	42	#define CONFIG_SETUP_MEMORY_TAGS
	43	#define CONFIG_INITRD_TAG
	44	#define CONFIG_REVISION_TAG
	45	#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
	46
f9162b15 AB	47	#define CONFIG_MXC_GPIO
	48	#define CONFIG_MXC_UART
	49
f9162b15 AB	50	#define CONFIG_MXC_OCOTP
	51
	52	/* SATA Configs */
aacc10c5	53	#ifdef CONFIG_CMD_SATA
f9162b15 AB	54	#define CONFIG_SYS_SATA_MAX_DEVICE 1
	55	#define CONFIG_DWC_AHSATA_PORT_ID 0
	56	#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
	57	#define CONFIG_LBA48
aacc10c5	58	#endif
f9162b15 AB	59
	60	/* MMC Configs */
	61	#define CONFIG_FSL_ESDHC
	62	#define CONFIG_FSL_USDHC
	63	#define CONFIG_SYS_FSL_ESDHC_ADDR 0
f9162b15	64	#define CONFIG_BOUNCE_BUFFER
f9162b15 AB	65
f9162b15 AB	66	/* USB Configs */
fc44902a	67	#ifdef CONFIG_USB
f9162b15 AB	68	#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
	69	#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
	70	#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI \| PORT_PTS_PTW)
	71	#define CONFIG_MXC_USB_FLAGS 0
f9162b15	72
f9162b15	73	#define CONFIG_USBD_HS
f9162b15	74	#define CONFIG_USB_GADGET_MASS_STORAGE
fc44902a	75	#endif
f9162b15 AB	76
f9162b15 AB	77	/* Networking Configs */
c26ffd9b	78	#ifdef CONFIG_NET
f9162b15 AB	79	#define CONFIG_FEC_MXC
	80	#define CONFIG_MII
	81	#define IMX_FEC_BASE ENET_BASE_ADDR
	82	#define CONFIG_FEC_XCV_TYPE RGMII
	83	#define CONFIG_ETHPRIME "FEC"
	84	#define CONFIG_FEC_MXC_PHYADDR 4
f9162b15	85	#define CONFIG_PHY_ATHEROS
c26ffd9b	86	#endif
f9162b15 AB	87
f9162b15 AB	88	/* Serial Flash */
f9162b15 AB	89	#ifdef CONFIG_CMD_SF
	90	#define CONFIG_MXC_SPI
	91	#define CONFIG_SF_DEFAULT_BUS 0
	92	#define CONFIG_SF_DEFAULT_CS 0
	93	#define CONFIG_SF_DEFAULT_SPEED 20000000
	94	#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
	95	#endif
	96
	97	/* allow to overwrite serial and ethaddr */
	98	#define CONFIG_ENV_OVERWRITE
	99	#define CONFIG_CONS_INDEX 1
f9162b15	100
f9162b15 AB	101	#define CONFIG_LOADADDR 0x12000000
	102	#define CONFIG_SYS_TEXT_BASE 0x17800000
	103
	104	#define CONFIG_EXTRA_ENV_SETTINGS \
	105	"script=boot.scr\0" \
	106	"image=/boot/uImage\0" \
	107	"uboot=u-boot.imx\0" \
	108	"fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
	109	"fdt_addr=0x18000000\0" \
	110	"boot_fdt=yes\0" \
	111	"ip_dyn=yes\0" \
12ca05a3	112	"console=" CONSOLE_DEV "\0" \
f9162b15 AB	113	"fdt_high=0xffffffff\0" \
	114	"initrd_high=0xffffffff\0" \
	115	"sddev=0\0" \
	116	"emmcdev=1\0" \
	117	"partnum=1\0" \
	118	"update_sd_firmware=" \
	119	"if test ${ip_dyn} = yes; then " \
	120	"setenv get_cmd dhcp; " \
	121	"else " \
	122	"setenv get_cmd tftp; " \
	123	"fi; " \
	124	"if mmc dev ${mmcdev}; then " \
	125	"if ${get_cmd} ${update_sd_firmware_filename}; then " \
	126	"setexpr fw_sz ${filesize} / 0x200; " \
	127	"setexpr fw_sz ${fw_sz} + 1; " \
	128	"mmc write ${loadaddr} 0x2 ${fw_sz}; " \
	129	"fi; " \
	130	"fi\0" \
	131	"update_sf_uboot=" \
	132	"if tftp $loadaddr $uboot; then " \
	133	"sf probe; " \
	134	"sf erase 0 0xC0000; " \
	135	"sf write $loadaddr 0x400 $filesize; " \
	136	"echo 'U-Boot upgraded. Please reset'; " \
	137	"fi\0" \
	138	"setargs=setenv bootargs console=${console},${baudrate} " \
3dddc793 KL	139	"root=/dev/${rootdev} rw rootwait cma=128M " \
3dddc793 KL	140	BX50V3_BOOTARGS_EXTRA "\0" \
f9162b15 AB	141	"loadbootscript=" \
	142	"ext2load ${dev} ${devnum}:${partnum} ${loadaddr} ${script};\0" \
	143	"bootscript=echo Running bootscript from ${dev}:${devnum}:${partnum};" \
	144	" source\0" \
	145	"loadimage=" \
	146	"ext2load ${dev} ${devnum}:${partnum} ${loadaddr} ${image}\0" \
	147	"loadfdt=ext2load ${dev} ${devnum}:${partnum} ${fdt_addr} ${fdt_file}\0" \
	148	"tryboot=" \
	149	"if run loadbootscript; then " \
	150	"run bootscript; " \
	151	"else " \
	152	"if run loadimage; then " \
	153	"run doboot; " \
	154	"fi; " \
	155	"fi;\0" \
	156	"doboot=echo Booting from ${dev}:${devnum}:${partnum} ...; " \
	157	"run setargs; " \
	158	"if test ${boot_fdt} = yes \|\| test ${boot_fdt} = try; then " \
	159	"if run loadfdt; then " \
	160	"bootm ${loadaddr} - ${fdt_addr}; " \
	161	"else " \
	162	"if test ${boot_fdt} = try; then " \
	163	"bootm; " \
	164	"else " \
	165	"echo WARN: Cannot load the DT; " \
	166	"fi; " \
	167	"fi; " \
	168	"else " \
	169	"bootm; " \
	170	"fi;\0" \
	171	"netargs=setenv bootargs console=${console},${baudrate} " \
	172	"root=/dev/nfs " \
	173	"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
	174	"netboot=echo Booting from net ...; " \
	175	"run netargs; " \
	176	"if test ${ip_dyn} = yes; then " \
	177	"setenv get_cmd dhcp; " \
	178	"else " \
	179	"setenv get_cmd tftp; " \
	180	"fi; " \
	181	"${get_cmd} ${image}; " \
	182	"if test ${boot_fdt} = yes \|\| test ${boot_fdt} = try; then " \
	183	"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
	184	"bootm ${loadaddr} - ${fdt_addr}; " \
	185	"else " \
	186	"if test ${boot_fdt} = try; then " \
	187	"bootm; " \
	188	"else " \
	189	"echo WARN: Cannot load the DT; " \
	190	"fi; " \
	191	"fi; " \
	192	"else " \
	193	"bootm; " \
	194	"fi;\0" \
	195
fc44902a	196	#define CONFIG_MMCBOOTCOMMAND \
f9162b15	197	"setenv dev mmc; " \
f6825e4a	198	"setenv rootdev mmcblk0p${partnum}; " \
f9162b15 AB	199	\
	200	"setenv devnum ${sddev}; " \
	201	"if mmc dev ${devnum}; then " \
	202	"run tryboot; " \
f6825e4a	203	"setenv rootdev mmcblk1p${partnum}; " \
f9162b15 AB	204	"fi; " \
	205	\
	206	"setenv devnum ${emmcdev}; " \
	207	"if mmc dev ${devnum}; then " \
	208	"run tryboot; " \
	209	"fi; " \
fc44902a AS	210
	211	#define CONFIG_USBBOOTCOMMAND \
	212	"usb start; " \
	213	"setenv dev usb; " \
	214	"setenv devnum 0; " \
f6825e4a	215	"setenv rootdev sda${partnum}; " \
fc44902a	216	"run tryboot; " \
f9162b15	217	\
fc44902a	218	CONFIG_MMCBOOTCOMMAND \
f9162b15 AB	219	"bmode usb; " \
f9162b15 AB	220
fc44902a AS	221	#ifdef CONFIG_CMD_USB
	222	#define CONFIG_BOOTCOMMAND CONFIG_USBBOOTCOMMAND
	223	#else
	224	#define CONFIG_BOOTCOMMAND CONFIG_MMCBOOTCOMMAND
	225	#endif
	226
f9162b15 AB	227	#define CONFIG_ARP_TIMEOUT 200UL
	228
	229	/* Miscellaneous configurable options */
	230	#define CONFIG_SYS_LONGHELP
f9162b15 AB	231	#define CONFIG_AUTO_COMPLETE
f9162b15 AB	232
f9162b15 AB	233	#define CONFIG_SYS_MEMTEST_START 0x10000000
	234	#define CONFIG_SYS_MEMTEST_END 0x10010000
	235	#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
	236
	237	#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
	238
	239	#define CONFIG_CMDLINE_EDITING
f9162b15 AB	240
	241	/* Physical Memory Map */
	242	#define CONFIG_NR_DRAM_BANKS 1
	243	#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
	244
	245	#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
	246	#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
	247	#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
	248
	249	#define CONFIG_SYS_INIT_SP_OFFSET \
	250	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
	251	#define CONFIG_SYS_INIT_SP_ADDR \
	252	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
	253
e856bdcf	254	/* environment organization */
f9162b15 AB	255	#define CONFIG_ENV_SIZE (8 * 1024)
	256	#define CONFIG_ENV_OFFSET (768 * 1024)
	257	#define CONFIG_ENV_SECT_SIZE (64 * 1024)
	258	#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
	259	#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
	260	#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
	261	#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
	262
f9162b15	263	#ifndef CONFIG_SYS_DCACHE_OFF
f9162b15 AB	264	#endif
	265
	266	#define CONFIG_SYS_FSL_USDHC_NUM 3
	267
	268	/* Framebuffer */
07aa030a	269	#ifdef CONFIG_VIDEO
f9162b15	270	#define CONFIG_VIDEO_IPUV3
f9162b15 AB	271	#define CONFIG_VIDEO_BMP_RLE8
	272	#define CONFIG_SPLASH_SCREEN
	273	#define CONFIG_SPLASH_SCREEN_ALIGN
	274	#define CONFIG_BMP_16BPP
	275	#define CONFIG_VIDEO_LOGO
	276	#define CONFIG_VIDEO_BMP_LOGO
f9162b15 AB	277	#define CONFIG_IMX_HDMI
f9162b15 AB	278	#define CONFIG_IMX_VIDEO_SKIP
07aa030a	279	#endif
f9162b15	280
54971ac6 AB	281	#define CONFIG_PWM_IMX
	282	#define CONFIG_IMX6_PWM_PER_CLK 66000000
	283
f9162b15	284	#ifdef CONFIG_CMD_PCI
f9162b15 AB	285	#define CONFIG_PCI_SCAN_SHOW
	286	#define CONFIG_PCIE_IMX
	287	#define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12)
	288	#define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(1, 5)
	289	#endif
	290
	291	/* I2C Configs */
f9162b15 AB	292	#define CONFIG_SYS_I2C
	293	#define CONFIG_SYS_I2C_MXC
	294	#define CONFIG_SYS_I2C_SPEED 100000
	295	#define CONFIG_SYS_I2C_MXC_I2C1
	296	#define CONFIG_SYS_I2C_MXC_I2C2
	297	#define CONFIG_SYS_I2C_MXC_I2C3
	298
be2808c3 IR	299	#define CONFIG_SYS_NUM_I2C_BUSES 9
	300	#define CONFIG_SYS_I2C_MAX_HOPS 1
	301	#define CONFIG_SYS_I2C_BUSES { {0, {I2C_NULL_HOP} }, \
	302	{0, {{I2C_MUX_PCA9547, 0x70, 0} } }, \
	303	{0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \
	304	{0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \
	305	{0, {{I2C_MUX_PCA9547, 0x70, 3} } }, \
	306	{0, {{I2C_MUX_PCA9547, 0x70, 4} } }, \
	307	{0, {{I2C_MUX_PCA9547, 0x70, 5} } }, \
	308	{0, {{I2C_MUX_PCA9547, 0x70, 6} } }, \
	309	{0, {{I2C_MUX_PCA9547, 0x70, 7} } }, \
	310	}
	311
	312	#define CONFIG_BCH
	313
f9162b15	314	#endif /* __GE_BX50V3_CONFIG_H */