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6ed8a43a DH |
1 | /* Configuration header file for Gaisler GR-CPCI-AX2000 |
2 | * AX board. Note that since the AX is removable the configuration | |
3 | * for this board must be edited below. | |
4 | * | |
5 | * (C) Copyright 2003-2005 | |
6 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
7 | * | |
8 | * (C) Copyright 2008 | |
9 | * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com. | |
10 | * | |
1a459660 | 11 | * SPDX-License-Identifier: GPL-2.0+ |
6ed8a43a DH |
12 | */ |
13 | ||
14 | #ifndef __CONFIG_H__ | |
15 | #define __CONFIG_H__ | |
16 | ||
17 | /* | |
18 | * High Level Configuration Options | |
19 | * (easy to change) | |
20 | */ | |
21 | ||
22 | #define CONFIG_LEON3 /* This is an LEON3 CPU */ | |
23 | #define CONFIG_LEON 1 /* This is an LEON CPU */ | |
24 | #define CONFIG_CPCI_AX2000 1 /* ... on GR-CPCI-AX2000 board */ | |
25 | ||
26 | #define CONFIG_LEON_RAM_SRAM 1 | |
27 | #define CONFIG_LEON_RAM_SDRAM 2 | |
28 | #define CONFIG_LEON_RAM_SDRAM_NOSRAM 3 | |
29 | ||
30 | /* Select Memory to run from | |
31 | * | |
32 | * SRAM - UBoot is run in SRAM, SRAM-0x40000000, SDRAM-0x60000000 | |
33 | * SDRAM - UBoot is run in SDRAM, SRAM-0x40000000 and SDRAM-0x60000000 | |
34 | * SDRAM_NOSRAM - UBoot is run in SDRAM, SRAM not available, SDRAM at 0x40000000 | |
35 | * | |
36 | * Note, if Linux is to be used, SDRAM or SDRAM_NOSRAM is required since | |
37 | * it doesn't fit into the 4Mb SRAM. | |
38 | * | |
39 | * SRAM is default since it will work for all systems, however will not | |
40 | * be able to boot linux. | |
41 | */ | |
42 | #define CONFIG_LEON_RAM_SELECT CONFIG_LEON_RAM_SRAM | |
43 | ||
44 | /* CPU / AMBA BUS configuration */ | |
53677ef1 | 45 | #define CONFIG_SYS_CLK_FREQ 20000000 /* 20MHz */ |
6ed8a43a DH |
46 | |
47 | /* Number of SPARC register windows */ | |
6d0f6bcf | 48 | #define CONFIG_SYS_SPARC_NWINDOWS 8 |
6ed8a43a DH |
49 | |
50 | /* | |
51 | * Serial console configuration | |
52 | */ | |
53 | #define CONFIG_BAUDRATE 38400 /* ... at 38400 bps */ | |
6d0f6bcf | 54 | #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 } |
6ed8a43a DH |
55 | |
56 | /* Partitions */ | |
57 | #define CONFIG_DOS_PARTITION | |
58 | #define CONFIG_MAC_PARTITION | |
59 | #define CONFIG_ISO_PARTITION | |
60 | ||
61 | /* | |
62 | * Supported commands | |
63 | */ | |
64 | #include <config_cmd_default.h> | |
65 | ||
66 | #define CONFIG_CMD_REGINFO | |
67 | #define CONFIG_CMD_AMBAPP | |
68 | #define CONFIG_CMD_PING | |
69 | #define CONFIG_CMD_DIAG | |
70 | #define CONFIG_CMD_IRQ | |
71 | ||
72 | /* | |
73 | * Autobooting | |
74 | */ | |
75 | #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ | |
76 | ||
77 | #define CONFIG_PREBOOT "echo;" \ | |
78 | "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \ | |
79 | "echo" | |
80 | ||
81 | #undef CONFIG_BOOTARGS | |
82 | ||
83 | #define CONFIG_EXTRA_ENV_SETTINGS_BASE \ | |
84 | "netdev=eth0\0" \ | |
85 | "nfsargs=setenv bootargs console=ttyS0,38400 root=/dev/nfs rw " \ | |
86 | "nfsroot=${serverip}:${rootpath}\0" \ | |
87 | "ramargs=setenv bootargs console=ttyS0,${baudrate} root=/dev/ram rw\0" \ | |
88 | "addip=setenv bootargs ${bootargs} " \ | |
89 | "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ | |
90 | ":${hostname}:${netdev}:off panic=1\0" \ | |
91 | "flash_nfs=run nfsargs addip;" \ | |
92 | "bootm ${kernel_addr}\0" \ | |
93 | "flash_self=run ramargs addip;" \ | |
94 | "bootm ${kernel_addr} ${ramdisk_addr}\0" \ | |
3a2b9f28 | 95 | "getkernel=tftpboot $(scratch) $(bootfile)\0" \ |
6ed8a43a DH |
96 | "bootargs=console=ttyS0,38400 root=/dev/nfs rw nfsroot=192.168.0.20:/export/rootfs ip=192.168.0.206:192.168.0.20:192.168.0.1:255.255.255.0:ax2000:eth0\0" |
97 | ||
98 | #if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SRAM | |
99 | #define CONFIG_EXTRA_ENV_SETTINGS_SELECT \ | |
100 | "net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \ | |
101 | "scratch=40200000\0" \ | |
102 | "" | |
103 | #elif CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SDRAM | |
104 | #define CONFIG_EXTRA_ENV_SETTINGS_SELECT \ | |
105 | "net_nfs=tftp 60000000 ${bootfile};run nfsargs addip;bootm\0" \ | |
106 | "scratch=60800000\0" \ | |
107 | "" | |
108 | #else | |
109 | /* More than 4Mb is assumed when running from SDRAM */ | |
110 | #define CONFIG_EXTRA_ENV_SETTINGS_SELECT \ | |
111 | "net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \ | |
112 | "scratch=40800000\0" \ | |
113 | "" | |
114 | #endif | |
115 | ||
116 | #define CONFIG_EXTRA_ENV_SETTINGS CONFIG_EXTRA_ENV_SETTINGS_BASE CONFIG_EXTRA_ENV_SETTINGS_SELECT | |
117 | ||
118 | #define CONFIG_NETMASK 255.255.255.0 | |
119 | #define CONFIG_GATEWAYIP 192.168.0.1 | |
120 | #define CONFIG_SERVERIP 192.168.0.20 | |
121 | #define CONFIG_IPADDR 192.168.0.206 | |
8b3637c6 | 122 | #define CONFIG_ROOTPATH "/export/rootfs" |
6ed8a43a | 123 | #define CONFIG_HOSTNAME ax2000 |
b3f44c21 | 124 | #define CONFIG_BOOTFILE "/uImage" |
6ed8a43a DH |
125 | |
126 | #define CONFIG_BOOTCOMMAND "run flash_self" | |
127 | ||
128 | /* Memory MAP | |
129 | * | |
130 | * Flash: | |
131 | * |--------------------------------| | |
132 | * | 0x00000000 Text & Data & BSS | * | |
133 | * | for Monitor | * | |
134 | * | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| * | |
135 | * | UNUSED / Growth | * 256kb | |
136 | * |--------------------------------| | |
137 | * | 0x00050000 Base custom area | * | |
138 | * | kernel / FS | * | |
139 | * | | * Rest of Flash | |
140 | * |~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| | |
141 | * | END-0x00008000 Environment | * 32kb | |
142 | * |--------------------------------| | |
143 | * | |
144 | * | |
145 | * | |
146 | * Main Memory (4Mb SRAM or XMb SDRAM): | |
147 | * |--------------------------------| | |
148 | * | UNUSED / scratch area | | |
149 | * | | | |
150 | * | | | |
151 | * | | | |
152 | * | | | |
153 | * |--------------------------------| | |
154 | * | Monitor .Text / .DATA / .BSS | * 256kb | |
155 | * | Relocated! | * | |
156 | * |--------------------------------| | |
157 | * | Monitor Malloc | * 128kb (contains relocated environment) | |
158 | * |--------------------------------| | |
159 | * | Monitor/kernel STACK | * 64kb | |
160 | * |--------------------------------| | |
161 | * | Page Table for MMU systems | * 2k | |
162 | * |--------------------------------| | |
163 | * | PROM Code accessed from Linux | * 6kb-128b | |
164 | * |--------------------------------| | |
165 | * | Global data (avail from kernel)| * 128b | |
166 | * |--------------------------------| | |
167 | * | |
168 | */ | |
169 | ||
170 | /* | |
171 | * Flash configuration (8,16 or 32 MB) | |
172 | * TEXT base always at 0xFFF00000 | |
173 | * ENV_ADDR always at 0xFFF40000 | |
174 | * FLASH_BASE at 0xFC000000 for 64 MB | |
175 | * 0xFE000000 for 32 MB | |
176 | * 0xFF000000 for 16 MB | |
177 | * 0xFF800000 for 8 MB | |
178 | */ | |
6d0f6bcf JCPV |
179 | /*#define CONFIG_SYS_NO_FLASH 1*/ |
180 | #define CONFIG_SYS_FLASH_BASE 0x00000000 | |
181 | #define CONFIG_SYS_FLASH_SIZE 0x00800000 | |
6ed8a43a DH |
182 | |
183 | #define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors */ | |
6d0f6bcf JCPV |
184 | #define CONFIG_SYS_MAX_FLASH_SECT 64 /* max num of sects on one chip */ |
185 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */ | |
6ed8a43a | 186 | |
6d0f6bcf JCPV |
187 | #define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */ |
188 | #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */ | |
189 | #define CONFIG_SYS_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */ | |
190 | #define CONFIG_SYS_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */ | |
191 | #define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ | |
6ed8a43a DH |
192 | |
193 | /*** CFI CONFIG ***/ | |
6d0f6bcf | 194 | #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT |
00b1883a | 195 | #define CONFIG_FLASH_CFI_DRIVER |
6d0f6bcf | 196 | #define CONFIG_SYS_FLASH_CFI |
6ed8a43a | 197 | /* Bypass cache when reading regs from flash memory */ |
6d0f6bcf | 198 | #define CONFIG_SYS_FLASH_CFI_BYPASS_READ |
6ed8a43a | 199 | /* Buffered writes (32byte/go) instead of single accesses */ |
6d0f6bcf | 200 | #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE |
6ed8a43a DH |
201 | |
202 | /* | |
203 | * Environment settings | |
204 | */ | |
93f6d725 | 205 | /*#define CONFIG_ENV_IS_NOWHERE 1*/ |
5a1aceb0 | 206 | #define CONFIG_ENV_IS_IN_FLASH 1 |
0e8d1586 JCPV |
207 | /* CONFIG_ENV_ADDR need to be at sector boundary */ |
208 | #define CONFIG_ENV_SIZE 0x8000 | |
209 | #define CONFIG_ENV_SECT_SIZE 0x20000 | |
6d0f6bcf | 210 | #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE+CONFIG_SYS_FLASH_SIZE-CONFIG_ENV_SECT_SIZE) |
6ed8a43a DH |
211 | #define CONFIG_ENV_OVERWRITE 1 |
212 | ||
213 | /* | |
214 | * Memory map | |
215 | * | |
216 | * Always 4Mb SRAM available | |
217 | * SDRAM module may be available on 0x60000000, SDRAM | |
218 | * is configured as if a 128Mb SDRAM module is available. | |
219 | */ | |
220 | ||
221 | #if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SDRAM_NOSRAM | |
6d0f6bcf | 222 | #define CONFIG_SYS_SDRAM_BASE 0x40000000 |
6ed8a43a | 223 | #else |
6d0f6bcf | 224 | #define CONFIG_SYS_SDRAM_BASE 0x60000000 |
6ed8a43a DH |
225 | #endif |
226 | ||
6d0f6bcf JCPV |
227 | #define CONFIG_SYS_SDRAM_SIZE 0x08000000 |
228 | #define CONFIG_SYS_SDRAM_END (CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_SDRAM_SIZE) | |
6ed8a43a DH |
229 | |
230 | /* 4Mb SRAM available */ | |
231 | #if CONFIG_LEON_RAM_SELECT != CONFIG_LEON_RAM_SDRAM_NOSRAM | |
6d0f6bcf JCPV |
232 | #define CONFIG_SYS_SRAM_BASE 0x40000000 |
233 | #define CONFIG_SYS_SRAM_SIZE 0x400000 | |
234 | #define CONFIG_SYS_SRAM_END (CONFIG_SYS_SRAM_BASE+CONFIG_SYS_SRAM_SIZE) | |
6ed8a43a DH |
235 | #endif |
236 | ||
237 | /* Select RAM used to run U-BOOT from... */ | |
238 | #if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SRAM | |
6d0f6bcf JCPV |
239 | #define CONFIG_SYS_RAM_BASE CONFIG_SYS_SRAM_BASE |
240 | #define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SRAM_SIZE | |
241 | #define CONFIG_SYS_RAM_END CONFIG_SYS_SRAM_END | |
6ed8a43a | 242 | #else |
6d0f6bcf JCPV |
243 | #define CONFIG_SYS_RAM_BASE CONFIG_SYS_SDRAM_BASE |
244 | #define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SDRAM_SIZE | |
245 | #define CONFIG_SYS_RAM_END CONFIG_SYS_SDRAM_END | |
6ed8a43a DH |
246 | #endif |
247 | ||
25ddd1fb | 248 | #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_RAM_END - GENERATED_GBL_DATA_SIZE) |
6ed8a43a | 249 | |
25ddd1fb | 250 | #define CONFIG_SYS_PROM_SIZE (8192-GENERATED_GBL_DATA_SIZE) |
6d0f6bcf | 251 | #define CONFIG_SYS_PROM_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE) |
6ed8a43a | 252 | |
6d0f6bcf JCPV |
253 | #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32) |
254 | #define CONFIG_SYS_STACK_SIZE (0x10000-32) | |
6ed8a43a | 255 | |
14d0a02a | 256 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE |
6d0f6bcf JCPV |
257 | #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) |
258 | # define CONFIG_SYS_RAMBOOT 1 | |
6ed8a43a DH |
259 | #endif |
260 | ||
6d0f6bcf JCPV |
261 | #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ |
262 | #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ | |
263 | #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ | |
6ed8a43a | 264 | |
6d0f6bcf JCPV |
265 | #define CONFIG_SYS_MALLOC_END (CONFIG_SYS_INIT_SP_OFFSET-CONFIG_SYS_STACK_SIZE) |
266 | #define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MALLOC_END-CONFIG_SYS_MALLOC_LEN) | |
6ed8a43a DH |
267 | |
268 | /* relocated monitor area */ | |
6d0f6bcf JCPV |
269 | #define CONFIG_SYS_RELOC_MONITOR_MAX_END CONFIG_SYS_MALLOC_BASE |
270 | #define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN) | |
6ed8a43a DH |
271 | |
272 | /* make un relocated address from relocated address */ | |
14d0a02a | 273 | #define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE)) |
6ed8a43a DH |
274 | |
275 | /* | |
276 | * Ethernet configuration uses on board SMC91C111 | |
277 | */ | |
7194ab80 | 278 | #define CONFIG_SMC91111 1 |
6ed8a43a DH |
279 | #define CONFIG_SMC91111_BASE 0x20000300 /* chip select 3 */ |
280 | #define CONFIG_SMC_USE_32_BIT 1 /* 32 bit bus */ | |
281 | #undef CONFIG_SMC_91111_EXT_PHY /* we use internal phy */ | |
282 | /*#define CONFIG_SHOW_ACTIVITY*/ | |
283 | #define CONFIG_NET_RETRY_COUNT 10 /* # of retries */ | |
284 | ||
285 | #define CONFIG_ETHADDR 00:00:7a:cc:00:13 | |
286 | #define CONFIG_PHY_ADDR 0x00 | |
287 | ||
288 | /* | |
289 | * Miscellaneous configurable options | |
290 | */ | |
6d0f6bcf JCPV |
291 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
292 | #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ | |
6ed8a43a | 293 | #if defined(CONFIG_CMD_KGDB) |
6d0f6bcf | 294 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ |
6ed8a43a | 295 | #else |
6d0f6bcf | 296 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
6ed8a43a | 297 | #endif |
6d0f6bcf JCPV |
298 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ |
299 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ | |
300 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ | |
6ed8a43a | 301 | |
6d0f6bcf JCPV |
302 | #define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */ |
303 | #define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */ | |
6ed8a43a | 304 | |
6d0f6bcf | 305 | #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ |
6ed8a43a | 306 | |
6d0f6bcf | 307 | #define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */ |
6ed8a43a DH |
308 | |
309 | /* | |
310 | * Various low-level settings | |
311 | */ | |
312 | ||
313 | /*----------------------------------------------------------------------- | |
314 | * USB stuff | |
315 | *----------------------------------------------------------------------- | |
316 | */ | |
317 | #define CONFIG_USB_CLOCK 0x0001BBBB | |
318 | #define CONFIG_USB_CONFIG 0x00005000 | |
319 | ||
320 | /***** Gaisler GRLIB IP-Cores Config ********/ | |
321 | ||
322 | /* AMBA Plug & Play info display on startup */ | |
6d0f6bcf | 323 | /*#define CONFIG_SYS_AMBAPP_PRINT_ON_STARTUP*/ |
6ed8a43a | 324 | |
6d0f6bcf | 325 | #define CONFIG_SYS_GRLIB_SDRAM 0 |
6ed8a43a DH |
326 | |
327 | /* See, GRLIB Docs (grip.pdf) on how to set up | |
328 | * These the memory controller registers. | |
329 | */ | |
6d0f6bcf | 330 | #define CONFIG_SYS_GRLIB_MEMCFG1 (0x10f800ff | (1<<11)) |
6ed8a43a | 331 | #if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SDRAM_NOSRAM |
6d0f6bcf | 332 | #define CONFIG_SYS_GRLIB_MEMCFG2 0x82206000 |
6ed8a43a | 333 | #else |
6d0f6bcf | 334 | #define CONFIG_SYS_GRLIB_MEMCFG2 0x82205260 |
6ed8a43a | 335 | #endif |
6d0f6bcf | 336 | #define CONFIG_SYS_GRLIB_MEMCFG3 0x0809a000 |
6ed8a43a | 337 | |
6d0f6bcf | 338 | #define CONFIG_SYS_GRLIB_FT_MEMCFG1 (0x10f800ff | (1<<11)) |
6ed8a43a | 339 | #if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SDRAM_NOSRAM |
6d0f6bcf | 340 | #define CONFIG_SYS_GRLIB_FT_MEMCFG2 0x82206000 |
6ed8a43a | 341 | #else |
6d0f6bcf | 342 | #define CONFIG_SYS_GRLIB_FT_MEMCFG2 0x82205260 |
6ed8a43a | 343 | #endif |
6d0f6bcf | 344 | #define CONFIG_SYS_GRLIB_FT_MEMCFG3 0x0809a000 |
6ed8a43a DH |
345 | |
346 | /* no DDR controller */ | |
6d0f6bcf | 347 | #define CONFIG_SYS_GRLIB_DDR_CFG 0x00000000 |
6ed8a43a DH |
348 | |
349 | /* no DDR2 Controller */ | |
6d0f6bcf JCPV |
350 | #define CONFIG_SYS_GRLIB_DDR2_CFG1 0x00000000 |
351 | #define CONFIG_SYS_GRLIB_DDR2_CFG3 0x00000000 | |
6ed8a43a DH |
352 | |
353 | /* Calculate scaler register value from default baudrate */ | |
6d0f6bcf | 354 | #define CONFIG_SYS_GRLIB_APBUART_SCALER \ |
6ed8a43a DH |
355 | ((((CONFIG_SYS_CLK_FREQ*10)/(CONFIG_BAUDRATE*8))-5)/10) |
356 | ||
357 | /* Identification string */ | |
358 | #define CONFIG_IDENT_STRING "GAISLER LEON3 GR-CPCI-AX2000" | |
359 | ||
360 | /* default kernel command line */ | |
361 | #define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0" | |
362 | ||
363 | #endif /* __CONFIG_H */ |