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6ed8a43a DH |
1 | /* Configuration header file for Gaisler GR-CPCI-AX2000 |
2 | * AX board. Note that since the AX is removable the configuration | |
3 | * for this board must be edited below. | |
4 | * | |
5 | * (C) Copyright 2003-2005 | |
6 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
7 | * | |
8 | * (C) Copyright 2008 | |
9 | * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com. | |
10 | * | |
3765b3e7 | 11 | * SPDX-License-Identifier: GPL-2.0+ |
6ed8a43a DH |
12 | */ |
13 | ||
14 | #ifndef __CONFIG_H__ | |
15 | #define __CONFIG_H__ | |
16 | ||
17 | /* | |
18 | * High Level Configuration Options | |
19 | * (easy to change) | |
20 | */ | |
21 | ||
6ed8a43a DH |
22 | #define CONFIG_CPCI_AX2000 1 /* ... on GR-CPCI-AX2000 board */ |
23 | ||
24 | #define CONFIG_LEON_RAM_SRAM 1 | |
25 | #define CONFIG_LEON_RAM_SDRAM 2 | |
26 | #define CONFIG_LEON_RAM_SDRAM_NOSRAM 3 | |
27 | ||
28 | /* Select Memory to run from | |
29 | * | |
30 | * SRAM - UBoot is run in SRAM, SRAM-0x40000000, SDRAM-0x60000000 | |
31 | * SDRAM - UBoot is run in SDRAM, SRAM-0x40000000 and SDRAM-0x60000000 | |
32 | * SDRAM_NOSRAM - UBoot is run in SDRAM, SRAM not available, SDRAM at 0x40000000 | |
33 | * | |
34 | * Note, if Linux is to be used, SDRAM or SDRAM_NOSRAM is required since | |
35 | * it doesn't fit into the 4Mb SRAM. | |
36 | * | |
37 | * SRAM is default since it will work for all systems, however will not | |
38 | * be able to boot linux. | |
39 | */ | |
40 | #define CONFIG_LEON_RAM_SELECT CONFIG_LEON_RAM_SRAM | |
41 | ||
42 | /* CPU / AMBA BUS configuration */ | |
53677ef1 | 43 | #define CONFIG_SYS_CLK_FREQ 20000000 /* 20MHz */ |
6ed8a43a | 44 | |
6ed8a43a DH |
45 | /* |
46 | * Serial console configuration | |
47 | */ | |
48 | #define CONFIG_BAUDRATE 38400 /* ... at 38400 bps */ | |
6d0f6bcf | 49 | #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 } |
6ed8a43a DH |
50 | |
51 | /* Partitions */ | |
52 | #define CONFIG_DOS_PARTITION | |
53 | #define CONFIG_MAC_PARTITION | |
54 | #define CONFIG_ISO_PARTITION | |
55 | ||
56 | /* | |
57 | * Supported commands | |
58 | */ | |
6ed8a43a | 59 | #define CONFIG_CMD_REGINFO |
6ed8a43a DH |
60 | #define CONFIG_CMD_DIAG |
61 | #define CONFIG_CMD_IRQ | |
62 | ||
63 | /* | |
64 | * Autobooting | |
65 | */ | |
6ed8a43a DH |
66 | |
67 | #define CONFIG_PREBOOT "echo;" \ | |
68 | "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \ | |
69 | "echo" | |
70 | ||
71 | #undef CONFIG_BOOTARGS | |
72 | ||
73 | #define CONFIG_EXTRA_ENV_SETTINGS_BASE \ | |
74 | "netdev=eth0\0" \ | |
75 | "nfsargs=setenv bootargs console=ttyS0,38400 root=/dev/nfs rw " \ | |
76 | "nfsroot=${serverip}:${rootpath}\0" \ | |
77 | "ramargs=setenv bootargs console=ttyS0,${baudrate} root=/dev/ram rw\0" \ | |
78 | "addip=setenv bootargs ${bootargs} " \ | |
79 | "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ | |
80 | ":${hostname}:${netdev}:off panic=1\0" \ | |
81 | "flash_nfs=run nfsargs addip;" \ | |
82 | "bootm ${kernel_addr}\0" \ | |
83 | "flash_self=run ramargs addip;" \ | |
84 | "bootm ${kernel_addr} ${ramdisk_addr}\0" \ | |
3a2b9f28 | 85 | "getkernel=tftpboot $(scratch) $(bootfile)\0" \ |
6ed8a43a DH |
86 | "bootargs=console=ttyS0,38400 root=/dev/nfs rw nfsroot=192.168.0.20:/export/rootfs ip=192.168.0.206:192.168.0.20:192.168.0.1:255.255.255.0:ax2000:eth0\0" |
87 | ||
88 | #if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SRAM | |
89 | #define CONFIG_EXTRA_ENV_SETTINGS_SELECT \ | |
90 | "net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \ | |
91 | "scratch=40200000\0" \ | |
92 | "" | |
93 | #elif CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SDRAM | |
94 | #define CONFIG_EXTRA_ENV_SETTINGS_SELECT \ | |
95 | "net_nfs=tftp 60000000 ${bootfile};run nfsargs addip;bootm\0" \ | |
96 | "scratch=60800000\0" \ | |
97 | "" | |
98 | #else | |
99 | /* More than 4Mb is assumed when running from SDRAM */ | |
100 | #define CONFIG_EXTRA_ENV_SETTINGS_SELECT \ | |
101 | "net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \ | |
102 | "scratch=40800000\0" \ | |
103 | "" | |
104 | #endif | |
105 | ||
106 | #define CONFIG_EXTRA_ENV_SETTINGS CONFIG_EXTRA_ENV_SETTINGS_BASE CONFIG_EXTRA_ENV_SETTINGS_SELECT | |
107 | ||
108 | #define CONFIG_NETMASK 255.255.255.0 | |
109 | #define CONFIG_GATEWAYIP 192.168.0.1 | |
110 | #define CONFIG_SERVERIP 192.168.0.20 | |
111 | #define CONFIG_IPADDR 192.168.0.206 | |
8b3637c6 | 112 | #define CONFIG_ROOTPATH "/export/rootfs" |
6ed8a43a | 113 | #define CONFIG_HOSTNAME ax2000 |
b3f44c21 | 114 | #define CONFIG_BOOTFILE "/uImage" |
6ed8a43a DH |
115 | |
116 | #define CONFIG_BOOTCOMMAND "run flash_self" | |
117 | ||
118 | /* Memory MAP | |
119 | * | |
120 | * Flash: | |
121 | * |--------------------------------| | |
122 | * | 0x00000000 Text & Data & BSS | * | |
123 | * | for Monitor | * | |
124 | * | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| * | |
125 | * | UNUSED / Growth | * 256kb | |
126 | * |--------------------------------| | |
127 | * | 0x00050000 Base custom area | * | |
128 | * | kernel / FS | * | |
129 | * | | * Rest of Flash | |
130 | * |~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| | |
131 | * | END-0x00008000 Environment | * 32kb | |
132 | * |--------------------------------| | |
133 | * | |
134 | * | |
135 | * | |
136 | * Main Memory (4Mb SRAM or XMb SDRAM): | |
137 | * |--------------------------------| | |
138 | * | UNUSED / scratch area | | |
139 | * | | | |
140 | * | | | |
141 | * | | | |
142 | * | | | |
143 | * |--------------------------------| | |
144 | * | Monitor .Text / .DATA / .BSS | * 256kb | |
145 | * | Relocated! | * | |
146 | * |--------------------------------| | |
147 | * | Monitor Malloc | * 128kb (contains relocated environment) | |
148 | * |--------------------------------| | |
149 | * | Monitor/kernel STACK | * 64kb | |
150 | * |--------------------------------| | |
151 | * | Page Table for MMU systems | * 2k | |
152 | * |--------------------------------| | |
153 | * | PROM Code accessed from Linux | * 6kb-128b | |
154 | * |--------------------------------| | |
155 | * | Global data (avail from kernel)| * 128b | |
156 | * |--------------------------------| | |
157 | * | |
158 | */ | |
159 | ||
160 | /* | |
161 | * Flash configuration (8,16 or 32 MB) | |
162 | * TEXT base always at 0xFFF00000 | |
163 | * ENV_ADDR always at 0xFFF40000 | |
164 | * FLASH_BASE at 0xFC000000 for 64 MB | |
165 | * 0xFE000000 for 32 MB | |
166 | * 0xFF000000 for 16 MB | |
167 | * 0xFF800000 for 8 MB | |
168 | */ | |
6d0f6bcf JCPV |
169 | /*#define CONFIG_SYS_NO_FLASH 1*/ |
170 | #define CONFIG_SYS_FLASH_BASE 0x00000000 | |
171 | #define CONFIG_SYS_FLASH_SIZE 0x00800000 | |
6ed8a43a DH |
172 | |
173 | #define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors */ | |
6d0f6bcf JCPV |
174 | #define CONFIG_SYS_MAX_FLASH_SECT 64 /* max num of sects on one chip */ |
175 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */ | |
6ed8a43a | 176 | |
6d0f6bcf JCPV |
177 | #define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */ |
178 | #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */ | |
179 | #define CONFIG_SYS_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */ | |
180 | #define CONFIG_SYS_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */ | |
181 | #define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ | |
6ed8a43a DH |
182 | |
183 | /*** CFI CONFIG ***/ | |
6d0f6bcf | 184 | #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT |
00b1883a | 185 | #define CONFIG_FLASH_CFI_DRIVER |
6d0f6bcf | 186 | #define CONFIG_SYS_FLASH_CFI |
6ed8a43a | 187 | /* Bypass cache when reading regs from flash memory */ |
6d0f6bcf | 188 | #define CONFIG_SYS_FLASH_CFI_BYPASS_READ |
6ed8a43a | 189 | /* Buffered writes (32byte/go) instead of single accesses */ |
6d0f6bcf | 190 | #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE |
6ed8a43a DH |
191 | |
192 | /* | |
193 | * Environment settings | |
194 | */ | |
93f6d725 | 195 | /*#define CONFIG_ENV_IS_NOWHERE 1*/ |
5a1aceb0 | 196 | #define CONFIG_ENV_IS_IN_FLASH 1 |
0e8d1586 JCPV |
197 | /* CONFIG_ENV_ADDR need to be at sector boundary */ |
198 | #define CONFIG_ENV_SIZE 0x8000 | |
199 | #define CONFIG_ENV_SECT_SIZE 0x20000 | |
6d0f6bcf | 200 | #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE+CONFIG_SYS_FLASH_SIZE-CONFIG_ENV_SECT_SIZE) |
6ed8a43a DH |
201 | #define CONFIG_ENV_OVERWRITE 1 |
202 | ||
203 | /* | |
204 | * Memory map | |
205 | * | |
206 | * Always 4Mb SRAM available | |
207 | * SDRAM module may be available on 0x60000000, SDRAM | |
208 | * is configured as if a 128Mb SDRAM module is available. | |
209 | */ | |
210 | ||
211 | #if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SDRAM_NOSRAM | |
6d0f6bcf | 212 | #define CONFIG_SYS_SDRAM_BASE 0x40000000 |
6ed8a43a | 213 | #else |
6d0f6bcf | 214 | #define CONFIG_SYS_SDRAM_BASE 0x60000000 |
6ed8a43a DH |
215 | #endif |
216 | ||
6d0f6bcf JCPV |
217 | #define CONFIG_SYS_SDRAM_SIZE 0x08000000 |
218 | #define CONFIG_SYS_SDRAM_END (CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_SDRAM_SIZE) | |
6ed8a43a DH |
219 | |
220 | /* 4Mb SRAM available */ | |
221 | #if CONFIG_LEON_RAM_SELECT != CONFIG_LEON_RAM_SDRAM_NOSRAM | |
6d0f6bcf JCPV |
222 | #define CONFIG_SYS_SRAM_BASE 0x40000000 |
223 | #define CONFIG_SYS_SRAM_SIZE 0x400000 | |
224 | #define CONFIG_SYS_SRAM_END (CONFIG_SYS_SRAM_BASE+CONFIG_SYS_SRAM_SIZE) | |
6ed8a43a DH |
225 | #endif |
226 | ||
227 | /* Select RAM used to run U-BOOT from... */ | |
228 | #if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SRAM | |
6d0f6bcf JCPV |
229 | #define CONFIG_SYS_RAM_BASE CONFIG_SYS_SRAM_BASE |
230 | #define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SRAM_SIZE | |
231 | #define CONFIG_SYS_RAM_END CONFIG_SYS_SRAM_END | |
6ed8a43a | 232 | #else |
6d0f6bcf JCPV |
233 | #define CONFIG_SYS_RAM_BASE CONFIG_SYS_SDRAM_BASE |
234 | #define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SDRAM_SIZE | |
235 | #define CONFIG_SYS_RAM_END CONFIG_SYS_SDRAM_END | |
6ed8a43a DH |
236 | #endif |
237 | ||
25ddd1fb | 238 | #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_RAM_END - GENERATED_GBL_DATA_SIZE) |
6ed8a43a | 239 | |
25ddd1fb | 240 | #define CONFIG_SYS_PROM_SIZE (8192-GENERATED_GBL_DATA_SIZE) |
6d0f6bcf | 241 | #define CONFIG_SYS_PROM_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE) |
6ed8a43a | 242 | |
6d0f6bcf JCPV |
243 | #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32) |
244 | #define CONFIG_SYS_STACK_SIZE (0x10000-32) | |
6ed8a43a | 245 | |
14d0a02a | 246 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE |
6d0f6bcf JCPV |
247 | #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) |
248 | # define CONFIG_SYS_RAMBOOT 1 | |
6ed8a43a DH |
249 | #endif |
250 | ||
6d0f6bcf JCPV |
251 | #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ |
252 | #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ | |
253 | #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ | |
6ed8a43a | 254 | |
6d0f6bcf JCPV |
255 | #define CONFIG_SYS_MALLOC_END (CONFIG_SYS_INIT_SP_OFFSET-CONFIG_SYS_STACK_SIZE) |
256 | #define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MALLOC_END-CONFIG_SYS_MALLOC_LEN) | |
6ed8a43a DH |
257 | |
258 | /* relocated monitor area */ | |
6d0f6bcf JCPV |
259 | #define CONFIG_SYS_RELOC_MONITOR_MAX_END CONFIG_SYS_MALLOC_BASE |
260 | #define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN) | |
6ed8a43a DH |
261 | |
262 | /* make un relocated address from relocated address */ | |
14d0a02a | 263 | #define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE)) |
6ed8a43a DH |
264 | |
265 | /* | |
266 | * Ethernet configuration uses on board SMC91C111 | |
267 | */ | |
7194ab80 | 268 | #define CONFIG_SMC91111 1 |
6ed8a43a DH |
269 | #define CONFIG_SMC91111_BASE 0x20000300 /* chip select 3 */ |
270 | #define CONFIG_SMC_USE_32_BIT 1 /* 32 bit bus */ | |
271 | #undef CONFIG_SMC_91111_EXT_PHY /* we use internal phy */ | |
272 | /*#define CONFIG_SHOW_ACTIVITY*/ | |
273 | #define CONFIG_NET_RETRY_COUNT 10 /* # of retries */ | |
274 | ||
6ed8a43a DH |
275 | #define CONFIG_PHY_ADDR 0x00 |
276 | ||
277 | /* | |
278 | * Miscellaneous configurable options | |
279 | */ | |
6d0f6bcf | 280 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
6ed8a43a | 281 | #if defined(CONFIG_CMD_KGDB) |
6d0f6bcf | 282 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ |
6ed8a43a | 283 | #else |
6d0f6bcf | 284 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
6ed8a43a | 285 | #endif |
6d0f6bcf JCPV |
286 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ |
287 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ | |
288 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ | |
6ed8a43a | 289 | |
6d0f6bcf JCPV |
290 | #define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */ |
291 | #define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */ | |
6ed8a43a | 292 | |
6d0f6bcf | 293 | #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ |
6ed8a43a | 294 | |
6ed8a43a DH |
295 | /* |
296 | * Various low-level settings | |
297 | */ | |
298 | ||
299 | /*----------------------------------------------------------------------- | |
300 | * USB stuff | |
301 | *----------------------------------------------------------------------- | |
302 | */ | |
303 | #define CONFIG_USB_CLOCK 0x0001BBBB | |
304 | #define CONFIG_USB_CONFIG 0x00005000 | |
305 | ||
306 | /***** Gaisler GRLIB IP-Cores Config ********/ | |
307 | ||
6d0f6bcf | 308 | #define CONFIG_SYS_GRLIB_SDRAM 0 |
6ed8a43a | 309 | |
cff009ed DH |
310 | /* No SDRAM Configuration */ |
311 | #undef CONFIG_SYS_GRLIB_GAISLER_SDCTRL1 | |
312 | ||
6ed8a43a DH |
313 | /* See, GRLIB Docs (grip.pdf) on how to set up |
314 | * These the memory controller registers. | |
315 | */ | |
cff009ed DH |
316 | #define CONFIG_SYS_GRLIB_ESA_MCTRL1 |
317 | #define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG1 (0x10f800ff | (1<<11)) | |
6ed8a43a | 318 | #if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SDRAM_NOSRAM |
cff009ed | 319 | #define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2 0x82206000 |
6ed8a43a | 320 | #else |
cff009ed | 321 | #define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2 0x82205260 |
6ed8a43a | 322 | #endif |
cff009ed | 323 | #define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG3 0x0809a000 |
6ed8a43a | 324 | |
cff009ed DH |
325 | /* GRLIB FT-MCTRL configuration */ |
326 | #define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1 | |
327 | #define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG1 (0x10f800ff | (1<<11)) | |
6ed8a43a | 328 | #if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SDRAM_NOSRAM |
cff009ed | 329 | #define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG2 0x82206000 |
6ed8a43a | 330 | #else |
cff009ed | 331 | #define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG2 0x82205260 |
6ed8a43a | 332 | #endif |
cff009ed | 333 | #define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG3 0x0809a000 |
6ed8a43a DH |
334 | |
335 | /* no DDR controller */ | |
cff009ed | 336 | #undef CONFIG_SYS_GRLIB_GAISLER_DDRSPA1 |
6ed8a43a DH |
337 | |
338 | /* no DDR2 Controller */ | |
cff009ed | 339 | #undef CONFIG_SYS_GRLIB_GAISLER_DDR2SPA1 |
6ed8a43a | 340 | |
6ed8a43a DH |
341 | /* default kernel command line */ |
342 | #define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0" | |
343 | ||
344 | #endif /* __CONFIG_H */ |