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823edd8a DH |
1 | /* Configuration header file for LEON3 GRSIM, trying to be similar |
2 | * to Gaisler's GR-XC3S-1500 board. | |
3 | * | |
4 | * (C) Copyright 2003-2005 | |
5 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
6 | * | |
7 | * (C) Copyright 2007 | |
8 | * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com. | |
9 | * | |
3765b3e7 | 10 | * SPDX-License-Identifier: GPL-2.0+ |
823edd8a DH |
11 | */ |
12 | ||
13 | #ifndef __CONFIG_H__ | |
14 | #define __CONFIG_H__ | |
15 | ||
16 | /* | |
17 | * High Level Configuration Options | |
18 | * (easy to change) | |
19 | * | |
20 | * Select between TSIM or GRSIM by setting CONFIG_GRSIM or CONFIG_TSIM to 1. | |
21 | * | |
b6b280ce FR |
22 | * TSIM command: |
23 | * $ tsim-leon3 -sdram 32768 -ram 4096 -rom 2048 -mmu -cas | |
823edd8a | 24 | * |
b6b280ce FR |
25 | * In the evaluation version of TSIM, the -sdram/-ram/-rom arguments are |
26 | * hard-coded to these values and need not be specified. (see below) | |
27 | * | |
28 | * Get TSIM from http://www.gaisler.com/index.php/downloads/simulators | |
823edd8a DH |
29 | */ |
30 | ||
823edd8a DH |
31 | #define CONFIG_GRSIM 0 /* ... not running on GRSIM */ |
32 | #define CONFIG_TSIM 1 /* ... running on TSIM */ | |
33 | ||
34 | /* CPU / AMBA BUS configuration */ | |
53677ef1 | 35 | #define CONFIG_SYS_CLK_FREQ 40000000 /* 40MHz */ |
823edd8a | 36 | |
823edd8a DH |
37 | /* |
38 | * Serial console configuration | |
39 | */ | |
40 | #define CONFIG_BAUDRATE 38400 /* ... at 38400 bps */ | |
6d0f6bcf | 41 | #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 } |
823edd8a DH |
42 | |
43 | /* Partitions */ | |
823edd8a DH |
44 | |
45 | /* | |
46 | * Supported commands | |
47 | */ | |
823edd8a | 48 | #define CONFIG_CMD_DIAG |
64e809af | 49 | #define CONFIG_CMD_FPGA_LOADMK |
823edd8a | 50 | #define CONFIG_CMD_IRQ |
823edd8a | 51 | #define CONFIG_CMD_REGINFO |
823edd8a DH |
52 | |
53 | /* | |
54 | * Autobooting | |
55 | */ | |
823edd8a DH |
56 | |
57 | #define CONFIG_PREBOOT "echo;" \ | |
58 | "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \ | |
59 | "echo" | |
60 | ||
61 | #undef CONFIG_BOOTARGS | |
823edd8a DH |
62 | |
63 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
64 | "netdev=eth0\0" \ | |
65 | "nfsargs=setenv bootargs root=/dev/nfs rw " \ | |
66 | "nfsroot=${serverip}:${rootpath}\0" \ | |
67 | "ramargs=setenv bootargs root=/dev/ram rw\0" \ | |
68 | "addip=setenv bootargs ${bootargs} " \ | |
69 | "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ | |
70 | ":${hostname}:${netdev}:off panic=1\0" \ | |
71 | "flash_nfs=run nfsargs addip;" \ | |
72 | "bootm ${kernel_addr}\0" \ | |
73 | "flash_self=run ramargs addip;" \ | |
74 | "bootm ${kernel_addr} ${ramdisk_addr}\0" \ | |
75 | "net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \ | |
76 | "rootpath=/export/roofs\0" \ | |
77 | "scratch=40000000\0" \ | |
3a2b9f28 | 78 | "getkernel=tftpboot $(scratch) $(bootfile)\0" \ |
823edd8a DH |
79 | "bootargs=console=ttyS0,38400" \ |
80 | "" | |
81 | #define CONFIG_NETMASK 255.255.255.0 | |
82 | #define CONFIG_GATEWAYIP 192.168.0.1 | |
83 | #define CONFIG_SERVERIP 192.168.0.81 | |
84 | #define CONFIG_IPADDR 192.168.0.80 | |
8b3637c6 | 85 | #define CONFIG_ROOTPATH "/export/rootfs" |
823edd8a | 86 | #define CONFIG_HOSTNAME grxc3s1500 |
b3f44c21 | 87 | #define CONFIG_BOOTFILE "/uImage" |
823edd8a DH |
88 | |
89 | #define CONFIG_BOOTCOMMAND "run flash_self" | |
90 | ||
91 | /* Memory MAP | |
92 | * | |
93 | * Flash: | |
94 | * |--------------------------------| | |
95 | * | 0x00000000 Text & Data & BSS | * | |
96 | * | for Monitor | * | |
97 | * | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| * | |
98 | * | UNUSED / Growth | * 256kb | |
99 | * |--------------------------------| | |
100 | * | 0x00050000 Base custom area | * | |
101 | * | kernel / FS | * | |
102 | * | | * Rest of Flash | |
103 | * |~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| | |
104 | * | END-0x00008000 Environment | * 32kb | |
105 | * |--------------------------------| | |
106 | * | |
107 | * | |
108 | * | |
109 | * Main Memory: | |
110 | * |--------------------------------| | |
111 | * | UNUSED / scratch area | | |
112 | * | | | |
113 | * | | | |
114 | * | | | |
115 | * | | | |
116 | * |--------------------------------| | |
117 | * | Monitor .Text / .DATA / .BSS | * 256kb | |
118 | * | Relocated! | * | |
119 | * |--------------------------------| | |
120 | * | Monitor Malloc | * 128kb (contains relocated environment) | |
121 | * |--------------------------------| | |
122 | * | Monitor/kernel STACK | * 64kb | |
123 | * |--------------------------------| | |
124 | * | Page Table for MMU systems | * 2k | |
125 | * |--------------------------------| | |
126 | * | PROM Code accessed from Linux | * 6kb-128b | |
127 | * |--------------------------------| | |
128 | * | Global data (avail from kernel)| * 128b | |
129 | * |--------------------------------| | |
130 | * | |
131 | */ | |
132 | ||
133 | /* | |
134 | * Flash configuration (8,16 or 32 MB) | |
135 | * TEXT base always at 0xFFF00000 | |
136 | * ENV_ADDR always at 0xFFF40000 | |
137 | * FLASH_BASE at 0xFC000000 for 64 MB | |
138 | * 0xFE000000 for 32 MB | |
139 | * 0xFF000000 for 16 MB | |
140 | * 0xFF800000 for 8 MB | |
141 | */ | |
6d0f6bcf JCPV |
142 | #define CONFIG_SYS_FLASH_BASE 0x00000000 |
143 | #define CONFIG_SYS_FLASH_SIZE 0x00800000 | |
0e8d1586 | 144 | #define CONFIG_ENV_SIZE 0x8000 |
823edd8a | 145 | |
6d0f6bcf | 146 | #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE+CONFIG_SYS_FLASH_SIZE-CONFIG_ENV_SIZE) |
823edd8a DH |
147 | |
148 | #define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors */ | |
6d0f6bcf JCPV |
149 | #define CONFIG_SYS_MAX_FLASH_SECT 64 /* max num of sects on one chip */ |
150 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */ | |
823edd8a | 151 | |
6d0f6bcf JCPV |
152 | #define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */ |
153 | #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */ | |
154 | #define CONFIG_SYS_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */ | |
155 | #define CONFIG_SYS_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */ | |
823edd8a DH |
156 | |
157 | #ifdef ENABLE_FLASH_SUPPORT | |
158 | /* For use with grsim FLASH emulation extension */ | |
6d0f6bcf | 159 | #define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ |
823edd8a DH |
160 | |
161 | #undef CONFIG_FLASH_8BIT /* Flash is 32-bit */ | |
162 | ||
163 | /*** CFI CONFIG ***/ | |
6d0f6bcf | 164 | #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT |
00b1883a | 165 | #define CONFIG_FLASH_CFI_DRIVER |
6d0f6bcf | 166 | #define CONFIG_SYS_FLASH_CFI |
823edd8a DH |
167 | #endif |
168 | ||
169 | /* | |
170 | * Environment settings | |
171 | */ | |
93f6d725 | 172 | #define CONFIG_ENV_IS_NOWHERE 1 |
5a1aceb0 | 173 | /*#define CONFIG_ENV_IS_IN_FLASH*/ |
0e8d1586 JCPV |
174 | /*#define CONFIG_ENV_SIZE 0x8000*/ |
175 | #define CONFIG_ENV_SECT_SIZE 0x40000 | |
823edd8a DH |
176 | #define CONFIG_ENV_OVERWRITE 1 |
177 | ||
178 | /* | |
179 | * Memory map | |
180 | */ | |
b6b280ce FR |
181 | #define CONFIG_SYS_SDRAM_BASE 0x60000000 |
182 | #define CONFIG_SYS_SDRAM_SIZE 0x02000000 /* 32MiB SDRAM */ | |
183 | #define CONFIG_SYS_SDRAM_END (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE) | |
823edd8a | 184 | |
b6b280ce FR |
185 | #define CONFIG_SYS_SRAM_BASE 0x40000000 |
186 | #define CONFIG_SYS_SRAM_SIZE 0x00400000 /* 4MiB SRAM */ | |
187 | #define CONFIG_SYS_SRAM_END (CONFIG_SYS_SRAM_BASE + CONFIG_SYS_SRAM_SIZE) | |
823edd8a DH |
188 | |
189 | /* Always Run U-Boot from SDRAM */ | |
b6b280ce FR |
190 | #define CONFIG_SYS_RAM_BASE CONFIG_SYS_SDRAM_BASE |
191 | #define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SDRAM_SIZE | |
192 | #define CONFIG_SYS_RAM_END CONFIG_SYS_SDRAM_END | |
823edd8a | 193 | |
25ddd1fb | 194 | #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_RAM_END - GENERATED_GBL_DATA_SIZE) |
823edd8a | 195 | |
25ddd1fb | 196 | #define CONFIG_SYS_PROM_SIZE (8192-GENERATED_GBL_DATA_SIZE) |
6d0f6bcf | 197 | #define CONFIG_SYS_PROM_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE) |
823edd8a | 198 | |
6d0f6bcf JCPV |
199 | #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32) |
200 | #define CONFIG_SYS_STACK_SIZE (0x10000-32) | |
823edd8a | 201 | |
14d0a02a | 202 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE |
6d0f6bcf JCPV |
203 | #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) |
204 | # define CONFIG_SYS_RAMBOOT 1 | |
823edd8a DH |
205 | #endif |
206 | ||
6d0f6bcf JCPV |
207 | #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ |
208 | #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ | |
209 | #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ | |
823edd8a | 210 | |
6d0f6bcf JCPV |
211 | #define CONFIG_SYS_MALLOC_END (CONFIG_SYS_INIT_SP_OFFSET-CONFIG_SYS_STACK_SIZE) |
212 | #define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MALLOC_END-CONFIG_SYS_MALLOC_LEN) | |
823edd8a DH |
213 | |
214 | /* relocated monitor area */ | |
6d0f6bcf JCPV |
215 | #define CONFIG_SYS_RELOC_MONITOR_MAX_END CONFIG_SYS_MALLOC_BASE |
216 | #define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN) | |
823edd8a DH |
217 | |
218 | /* make un relocated address from relocated address */ | |
14d0a02a | 219 | #define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE)) |
823edd8a | 220 | |
b6b280ce | 221 | #ifdef CONFIG_CMD_NET |
823edd8a DH |
222 | /* |
223 | * Ethernet configuration | |
224 | */ | |
225 | #define CONFIG_GRETH 1 | |
823edd8a | 226 | |
823edd8a DH |
227 | /* |
228 | * Define CONFIG_GRETH_10MBIT to force GRETH at 10Mb/s | |
229 | */ | |
230 | /* #define CONFIG_GRETH_10MBIT 1 */ | |
231 | #define CONFIG_PHY_ADDR 0x00 | |
232 | ||
b6b280ce FR |
233 | #endif /* CONFIG_CMD_NET */ |
234 | ||
823edd8a DH |
235 | /* |
236 | * Miscellaneous configurable options | |
237 | */ | |
6d0f6bcf | 238 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
823edd8a | 239 | #if defined(CONFIG_CMD_KGDB) |
6d0f6bcf | 240 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ |
823edd8a | 241 | #else |
6d0f6bcf | 242 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
823edd8a | 243 | #endif |
6d0f6bcf JCPV |
244 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ |
245 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ | |
246 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ | |
823edd8a | 247 | |
6d0f6bcf JCPV |
248 | #define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */ |
249 | #define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */ | |
823edd8a | 250 | |
6d0f6bcf | 251 | #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ |
823edd8a | 252 | |
823edd8a DH |
253 | /***** Gaisler GRLIB IP-Cores Config ********/ |
254 | ||
6d0f6bcf | 255 | #define CONFIG_SYS_GRLIB_SDRAM 0 |
b6b280ce | 256 | |
6d0f6bcf | 257 | #define CONFIG_SYS_GRLIB_MEMCFG1 (0x000000ff | (1<<11)) |
cff009ed DH |
258 | |
259 | /* No SDRAM Configuration */ | |
260 | #undef CONFIG_SYS_GRLIB_GAISLER_SDCTRL1 | |
261 | ||
262 | /* LEON2 MCTRL configuration */ | |
263 | #define CONFIG_SYS_GRLIB_ESA_MCTRL1 | |
264 | #define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG1 (0x000000ff | (1<<11)) | |
823edd8a DH |
265 | #if CONFIG_GRSIM |
266 | /* GRSIM configuration */ | |
cff009ed | 267 | #define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2 0x82206000 |
823edd8a DH |
268 | #else |
269 | /* TSIM configuration */ | |
cff009ed | 270 | #define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2 0x81805220 |
823edd8a | 271 | #endif |
cff009ed | 272 | #define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG3 0x00136000 |
823edd8a | 273 | |
cff009ed DH |
274 | /* GRLIB FT-MCTRL configuration */ |
275 | #define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1 | |
276 | #define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG1 (0x000000ff | (1<<11)) | |
277 | #define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG2 0x82206000 | |
278 | #define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG3 0x00136000 | |
823edd8a DH |
279 | |
280 | /* no DDR controller */ | |
cff009ed | 281 | #undef CONFIG_SYS_GRLIB_GAISLER_DDRSPA1 |
823edd8a DH |
282 | |
283 | /* no DDR2 Controller */ | |
cff009ed | 284 | #undef CONFIG_SYS_GRLIB_GAISLER_DDR2SPA1 |
823edd8a | 285 | |
823edd8a DH |
286 | /* default kernel command line */ |
287 | #define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0" | |
288 | ||
b6b280ce FR |
289 | /* TSIM command: |
290 | * $ ./tsim-leon3 -mmu -cas | |
291 | * | |
292 | * This TSIM evaluation version will expire 2015-04-02 | |
293 | * | |
294 | * | |
295 | * TSIM/LEON3 SPARC simulator, version 2.0.35 (evaluation version) | |
296 | * | |
297 | * Copyright (C) 2014, Aeroflex Gaisler - all rights reserved. | |
298 | * This software may only be used with a valid license. | |
299 | * For latest updates, go to http://www.gaisler.com/ | |
300 | * Comments or bug-reports to support@gaisler.com | |
301 | * | |
302 | * serial port A on stdin/stdout | |
303 | * allocated 4096 K SRAM memory, in 1 bank | |
304 | * allocated 32 M SDRAM memory, in 1 bank | |
305 | * allocated 2048 K ROM memory | |
306 | * icache: 1 * 4 kbytes, 16 bytes/line (4 kbytes total) | |
307 | * dcache: 1 * 4 kbytes, 16 bytes/line (4 kbytes total) | |
308 | * tsim> leon | |
309 | * 0x80000000 Memory configuration register 1 0x000002ff | |
310 | * 0x80000004 Memory configuration register 2 0x81805220 | |
311 | * 0x80000008 Memory configuration register 3 0x00000000 | |
312 | */ | |
313 | ||
823edd8a | 314 | #endif /* __CONFIG_H */ |