[people/ms/u-boot.git] / include / configs / grsim_leon2.h

/* Configuration header file for LEON2 GRSIM.
 *
 * (C) Copyright 2003-2005
 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 *
 * (C) Copyright 2007, 2015
 * Daniel Hellstrom, Cobham Gaisler, daniel@gaisler.com.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_H__
#define __CONFIG_H__

/*
 * High Level Configuration Options
 * (easy to change)
 *
 * Select between TSIM or GRSIM by setting CONFIG_GRSIM or CONFIG_TSIM to 1.
 *
 * TSIM command
 *  tsim-leon -sdram 0 -ram 32000 -rom 8192 -mmu
 *
 */

#define CONFIG_GRSIM		0	/* ... not running on GRSIM */
#define CONFIG_TSIM		1	/* ... running on TSIM */

/* CPU / AMBA BUS configuration */
#define CONFIG_SYS_CLK_FREQ	40000000	/* 40MHz */

/*
 * Serial console configuration
 */
#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200, 230400 }

/* Partitions */

/*
 * Supported commands
 */
#define CONFIG_CMD_DIAG
#define CONFIG_CMD_FPGA_LOADMK
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_REGINFO

/*
 * Autobooting
 */

#define CONFIG_PREBOOT	"echo;"	\
	"echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
	"echo"

#undef	CONFIG_BOOTARGS

#define	CONFIG_EXTRA_ENV_SETTINGS					\
	"netdev=eth0\0"							\
	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
		"nfsroot=${serverip}:${rootpath}\0"			\
	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
	"addip=setenv bootargs ${bootargs} "				\
		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
		":${hostname}:${netdev}:off panic=1\0"			\
	"flash_nfs=run nfsargs addip;"					\
		"bootm ${kernel_addr}\0"				\
	"flash_self=run ramargs addip;"					\
		"bootm ${kernel_addr} ${ramdisk_addr}\0"		\
	"net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0"	\
	"rootpath=/export/roofs\0"					\
	"scratch=40000000\0"					\
	"getkernel=tftpboot $(scratch) $(bootfile)\0" \
	"bootargs=console=ttyS0,38400" \
	""
#define CONFIG_NETMASK 255.255.255.0
#define CONFIG_GATEWAYIP 192.168.0.1
#define CONFIG_SERVERIP 192.168.0.81
#define CONFIG_IPADDR 192.168.0.80
#define CONFIG_ROOTPATH "/export/rootfs"
#define CONFIG_HOSTNAME  grxc3s1500
#define CONFIG_BOOTFILE "/uImage"

#define CONFIG_BOOTCOMMAND	"run flash_self"

/* Memory MAP
 *
 *  Flash:
 *  |--------------------------------|
 *  | 0x00000000 Text & Data & BSS   | *
 *  |            for Monitor         | *
 *  | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| *
 *  | UNUSED / Growth                | * 256kb
 *  |--------------------------------|
 *  | 0x00050000 Base custom area    | *
 *  |            kernel / FS         | *
 *  |                                | * Rest of Flash
 *  |~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~|
 *  | END-0x00008000 Environment     | * 32kb
 *  |--------------------------------|
 *
 *
 *
 *  Main Memory:
 *  |--------------------------------|
 *  | UNUSED / scratch area          |
 *  |                                |
 *  |                                |
 *  |                                |
 *  |                                |
 *  |--------------------------------|
 *  | Monitor .Text / .DATA / .BSS   | * 256kb
 *  | Relocated!                     | *
 *  |--------------------------------|
 *  | Monitor Malloc                 | * 128kb (contains relocated environment)
 *  |--------------------------------|
 *  | Monitor/kernel STACK           | * 64kb
 *  |--------------------------------|
 *  | Page Table for MMU systems     | * 2k
 *  |--------------------------------|
 *  | PROM Code accessed from Linux  | * 6kb-128b
 *  |--------------------------------|
 *  | Global data (avail from kernel)| * 128b
 *  |--------------------------------|
 *
 */

/*
 * Flash configuration (8,16 or 32 MB)
 * TEXT base always at 0xFFF00000
 * ENV_ADDR always at  0xFFF40000
 * FLASH_BASE at 0xFC000000 for 64 MB
 *               0xFE000000 for 32 MB
 *               0xFF000000 for 16 MB
 *               0xFF800000 for  8 MB
 */
#define CONFIG_SYS_FLASH_BASE		0x00000000
#define CONFIG_SYS_FLASH_SIZE		0x00800000
#define CONFIG_ENV_SIZE		0x8000

#define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE+CONFIG_SYS_FLASH_SIZE-CONFIG_ENV_SIZE)

#define PHYS_FLASH_SECT_SIZE	0x00020000	/* 128 KB sectors */
#define CONFIG_SYS_MAX_FLASH_SECT	64	/* max num of sects on one chip */
#define CONFIG_SYS_MAX_FLASH_BANKS	1	/* max num of memory banks      */

#define CONFIG_SYS_FLASH_ERASE_TOUT	240000	/* Flash Erase Timeout (in ms)  */
#define CONFIG_SYS_FLASH_WRITE_TOUT	500	/* Flash Write Timeout (in ms)  */
#define CONFIG_SYS_FLASH_LOCK_TOUT	5	/* Timeout for Flash Set Lock Bit (in ms) */
#define CONFIG_SYS_FLASH_UNLOCK_TOUT	10000	/* Timeout for Flash Clear Lock Bits (in ms) */

#ifdef ENABLE_FLASH_SUPPORT
/* For use with grsim FLASH emulation extension */
#define CONFIG_SYS_FLASH_PROTECTION	/* "Real" (hardware) sectors protection */

#undef CONFIG_FLASH_8BIT	/* Flash is 32-bit */

/*** CFI CONFIG ***/
#define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_8BIT
#define CONFIG_FLASH_CFI_DRIVER
#define CONFIG_SYS_FLASH_CFI
#endif

/*
 * Environment settings
 */
#define CONFIG_ENV_IS_NOWHERE 1
/*#define CONFIG_ENV_IS_IN_FLASH*/
/*#define CONFIG_ENV_SIZE		0x8000*/
#define CONFIG_ENV_SECT_SIZE	0x40000
#define CONFIG_ENV_OVERWRITE	1

/*
 * Memory map
 */
#define CONFIG_SYS_SDRAM_BASE		0x40000000
#define CONFIG_SYS_SDRAM_SIZE		0x00800000
#define CONFIG_SYS_SDRAM_END		(CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_SDRAM_SIZE)

/* no SRAM available */
#undef CONFIG_SYS_SRAM_BASE
#undef CONFIG_SYS_SRAM_SIZE

/* Always Run U-Boot from SDRAM */
#define CONFIG_SYS_RAM_BASE CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SDRAM_SIZE
#define CONFIG_SYS_RAM_END CONFIG_SYS_SDRAM_END

#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_RAM_END - GENERATED_GBL_DATA_SIZE)

#define CONFIG_SYS_PROM_SIZE		(8192-GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_PROM_OFFSET		(CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE)

#define CONFIG_SYS_INIT_SP_OFFSET	(CONFIG_SYS_PROM_OFFSET-32)
#define CONFIG_SYS_STACK_SIZE		(0x10000-32)

#define CONFIG_SYS_MONITOR_BASE    CONFIG_SYS_TEXT_BASE
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
#   define CONFIG_SYS_RAMBOOT		1
#endif

#define CONFIG_SYS_MONITOR_LEN		(256 << 10)	/* Reserve 256 kB for Monitor   */
#define CONFIG_SYS_MALLOC_LEN		(128 << 10)	/* Reserve 128 kB for malloc()  */
#define CONFIG_SYS_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux */

#define CONFIG_SYS_MALLOC_END		(CONFIG_SYS_INIT_SP_OFFSET-CONFIG_SYS_STACK_SIZE)
#define CONFIG_SYS_MALLOC_BASE		(CONFIG_SYS_MALLOC_END-CONFIG_SYS_MALLOC_LEN)

/* relocated monitor area */
#define CONFIG_SYS_RELOC_MONITOR_MAX_END   CONFIG_SYS_MALLOC_BASE
#define CONFIG_SYS_RELOC_MONITOR_BASE     (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN)

/* make un relocated address from relocated address */
#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE))

/*
 * Ethernet configuration
 */
/*#define CONFIG_GRETH	1*/

/*
 * Define CONFIG_GRETH_10MBIT to force GRETH at 10Mb/s
 */
/* #define CONFIG_GRETH_10MBIT 1 */
#define CONFIG_PHY_ADDR		0x00

/*
 * Miscellaneous configurable options
 */
#define CONFIG_SYS_LONGHELP		/* undef to save memory     */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE		1024	/* Console I/O Buffer Size  */
#else
#define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size  */
#endif
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)	/* Print Buffer Size */
#define CONFIG_SYS_MAXARGS		16	/* max number of command args   */
#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size    */

#define CONFIG_SYS_MEMTEST_START	0x00100000	/* memtest works on */
#define CONFIG_SYS_MEMTEST_END		0x00f00000	/* 1 ... 15 MB in DRAM  */

#define CONFIG_SYS_LOAD_ADDR		0x100000	/* default load address */

/***** Gaisler GRLIB IP-Cores Config ********/

#define CONFIG_SYS_GRLIB_SDRAM    0
#define CONFIG_SYS_GRLIB_MEMCFG1  (0x000000ff | (1<<11))
#if CONFIG_GRSIM
#define CONFIG_SYS_GRLIB_MEMCFG2  0x82206000
#else
#define CONFIG_SYS_GRLIB_MEMCFG2  0x00001820
#endif
#define CONFIG_SYS_GRLIB_MEMCFG3  0x00136000

/*** LEON2 UART 1 ***/

/* UART1 Define to 1 or 0 */
#define LEON2_UART1_LOOPBACK_ENABLE 0
#define LEON2_UART1_FLOWCTRL_ENABLE 0
#define LEON2_UART1_PARITY_ENABLE 0
#define LEON2_UART1_ODDPAR_ENABLE 0

/*** LEON2 UART 2 ***/

/* UART2 Define to 1 or 0 */
#define LEON2_UART2_LOOPBACK_ENABLE 0
#define LEON2_UART2_FLOWCTRL_ENABLE 0
#define LEON2_UART2_PARITY_ENABLE 0
#define LEON2_UART2_ODDPAR_ENABLE 0

#define LEON_CONSOLE_UART1 1
#define LEON_CONSOLE_UART2 2

/* Use UART2 as console */
#define LEON2_CONSOLE_SELECT LEON_CONSOLE_UART1

/* LEON2 I/O Port */
/*#define LEON2_IO_PORT_DIR 0x0000aa00*/

/* default kernel command line */
#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0"

#endif				/* __CONFIG_H */
Commit	Line	Data
ab68f921 DH	1	/* Configuration header file for LEON2 GRSIM.
	2	*
	3	* (C) Copyright 2003-2005
	4	* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
	5	*
c837901b FR	6	* (C) Copyright 2007, 2015
c837901b FR	7	* Daniel Hellstrom, Cobham Gaisler, daniel@gaisler.com.
ab68f921	8	*
3765b3e7	9	* SPDX-License-Identifier: GPL-2.0+
ab68f921 DH	10	*/
	11
	12	#ifndef __CONFIG_H__
	13	#define __CONFIG_H__
	14
	15	/*
	16	* High Level Configuration Options
	17	* (easy to change)
	18	*
	19	* Select between TSIM or GRSIM by setting CONFIG_GRSIM or CONFIG_TSIM to 1.
	20	*
	21	* TSIM command
	22	* tsim-leon -sdram 0 -ram 32000 -rom 8192 -mmu
	23	*
	24	*/
	25
ab68f921 DH	26	#define CONFIG_GRSIM 0 /* ... not running on GRSIM */
	27	#define CONFIG_TSIM 1 /* ... running on TSIM */
	28
	29	/* CPU / AMBA BUS configuration */
53677ef1	30	#define CONFIG_SYS_CLK_FREQ 40000000 /* 40MHz */
ab68f921	31
ab68f921 DH	32	/*
	33	* Serial console configuration
	34	*/
6d0f6bcf	35	#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
ab68f921 DH	36
ab68f921 DH	37	/* Partitions */
ab68f921 DH	38
	39	/*
	40	* Supported commands
	41	*/
ab68f921	42	#define CONFIG_CMD_DIAG
64e809af	43	#define CONFIG_CMD_FPGA_LOADMK
ab68f921	44	#define CONFIG_CMD_IRQ
ab68f921	45	#define CONFIG_CMD_REGINFO
ab68f921 DH	46
	47	/*
	48	* Autobooting
	49	*/
ab68f921 DH	50
	51	#define CONFIG_PREBOOT "echo;" \
	52	"echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
	53	"echo"
	54
	55	#undef CONFIG_BOOTARGS
ab68f921 DH	56
	57	#define CONFIG_EXTRA_ENV_SETTINGS \
	58	"netdev=eth0\0" \
	59	"nfsargs=setenv bootargs root=/dev/nfs rw " \
	60	"nfsroot=${serverip}:${rootpath}\0" \
	61	"ramargs=setenv bootargs root=/dev/ram rw\0" \
	62	"addip=setenv bootargs ${bootargs} " \
	63	"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
	64	":${hostname}:${netdev}:off panic=1\0" \
	65	"flash_nfs=run nfsargs addip;" \
	66	"bootm ${kernel_addr}\0" \
	67	"flash_self=run ramargs addip;" \
	68	"bootm ${kernel_addr} ${ramdisk_addr}\0" \
	69	"net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \
	70	"rootpath=/export/roofs\0" \
	71	"scratch=40000000\0" \
3a2b9f28	72	"getkernel=tftpboot $(scratch) $(bootfile)\0" \
ab68f921 DH	73	"bootargs=console=ttyS0,38400" \
	74	""
	75	#define CONFIG_NETMASK 255.255.255.0
	76	#define CONFIG_GATEWAYIP 192.168.0.1
	77	#define CONFIG_SERVERIP 192.168.0.81
	78	#define CONFIG_IPADDR 192.168.0.80
8b3637c6	79	#define CONFIG_ROOTPATH "/export/rootfs"
ab68f921	80	#define CONFIG_HOSTNAME grxc3s1500
b3f44c21	81	#define CONFIG_BOOTFILE "/uImage"
ab68f921 DH	82
	83	#define CONFIG_BOOTCOMMAND "run flash_self"
	84
	85	/* Memory MAP
	86	*
	87	* Flash:
	88	* \|--------------------------------\|
	89	* \| 0x00000000 Text & Data & BSS \| *
	90	* \| for Monitor \| *
	91	* \| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\| *
	92	* \| UNUSED / Growth \| * 256kb
	93	* \|--------------------------------\|
	94	* \| 0x00050000 Base custom area \| *
	95	* \| kernel / FS \| *
	96	* \| \| * Rest of Flash
	97	* \|~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\|
	98	* \| END-0x00008000 Environment \| * 32kb
	99	* \|--------------------------------\|
	100	*
	101	*
	102	*
	103	* Main Memory:
	104	* \|--------------------------------\|
	105	* \| UNUSED / scratch area \|
	106	* \| \|
	107	* \| \|
	108	* \| \|
	109	* \| \|
	110	* \|--------------------------------\|
	111	* \| Monitor .Text / .DATA / .BSS \| * 256kb
	112	* \| Relocated! \| *
	113	* \|--------------------------------\|
	114	* \| Monitor Malloc \| * 128kb (contains relocated environment)
	115	* \|--------------------------------\|
	116	* \| Monitor/kernel STACK \| * 64kb
	117	* \|--------------------------------\|
	118	* \| Page Table for MMU systems \| * 2k
	119	* \|--------------------------------\|
	120	* \| PROM Code accessed from Linux \| * 6kb-128b
	121	* \|--------------------------------\|
	122	* \| Global data (avail from kernel)\| * 128b
	123	* \|--------------------------------\|
	124	*
	125	*/
	126
	127	/*
	128	* Flash configuration (8,16 or 32 MB)
	129	* TEXT base always at 0xFFF00000
	130	* ENV_ADDR always at 0xFFF40000
	131	* FLASH_BASE at 0xFC000000 for 64 MB
	132	* 0xFE000000 for 32 MB
	133	* 0xFF000000 for 16 MB
	134	* 0xFF800000 for 8 MB
	135	*/
6d0f6bcf JCPV	136	#define CONFIG_SYS_FLASH_BASE 0x00000000
6d0f6bcf JCPV	137	#define CONFIG_SYS_FLASH_SIZE 0x00800000
0e8d1586	138	#define CONFIG_ENV_SIZE 0x8000
ab68f921	139
6d0f6bcf	140	#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE+CONFIG_SYS_FLASH_SIZE-CONFIG_ENV_SIZE)
ab68f921 DH	141
ab68f921 DH	142	#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors */
6d0f6bcf JCPV	143	#define CONFIG_SYS_MAX_FLASH_SECT 64 /* max num of sects on one chip */
6d0f6bcf JCPV	144	#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
ab68f921	145
6d0f6bcf JCPV	146	#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
	147	#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
	148	#define CONFIG_SYS_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */
	149	#define CONFIG_SYS_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */
ab68f921 DH	150
	151	#ifdef ENABLE_FLASH_SUPPORT
	152	/* For use with grsim FLASH emulation extension */
6d0f6bcf	153	#define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
ab68f921 DH	154
	155	#undef CONFIG_FLASH_8BIT /* Flash is 32-bit */
	156
	157	/* CFI CONFIG */
6d0f6bcf	158	#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
00b1883a	159	#define CONFIG_FLASH_CFI_DRIVER
6d0f6bcf	160	#define CONFIG_SYS_FLASH_CFI
ab68f921 DH	161	#endif
	162
	163	/*
	164	* Environment settings
	165	*/
93f6d725	166	#define CONFIG_ENV_IS_NOWHERE 1
5a1aceb0	167	/#define CONFIG_ENV_IS_IN_FLASH/
0e8d1586 JCPV	168	/#define CONFIG_ENV_SIZE 0x8000/
0e8d1586 JCPV	169	#define CONFIG_ENV_SECT_SIZE 0x40000
ab68f921 DH	170	#define CONFIG_ENV_OVERWRITE 1
	171
	172	/*
	173	* Memory map
	174	*/
6d0f6bcf JCPV	175	#define CONFIG_SYS_SDRAM_BASE 0x40000000
	176	#define CONFIG_SYS_SDRAM_SIZE 0x00800000
	177	#define CONFIG_SYS_SDRAM_END (CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_SDRAM_SIZE)
ab68f921 DH	178
ab68f921 DH	179	/* no SRAM available */
6d0f6bcf JCPV	180	#undef CONFIG_SYS_SRAM_BASE
6d0f6bcf JCPV	181	#undef CONFIG_SYS_SRAM_SIZE
ab68f921	182
ab68f921	183	/* Always Run U-Boot from SDRAM */
6d0f6bcf JCPV	184	#define CONFIG_SYS_RAM_BASE CONFIG_SYS_SDRAM_BASE
	185	#define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SDRAM_SIZE
	186	#define CONFIG_SYS_RAM_END CONFIG_SYS_SDRAM_END
ab68f921	187
25ddd1fb	188	#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_RAM_END - GENERATED_GBL_DATA_SIZE)
ab68f921	189
25ddd1fb	190	#define CONFIG_SYS_PROM_SIZE (8192-GENERATED_GBL_DATA_SIZE)
6d0f6bcf	191	#define CONFIG_SYS_PROM_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE)
ab68f921	192
6d0f6bcf JCPV	193	#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32)
6d0f6bcf JCPV	194	#define CONFIG_SYS_STACK_SIZE (0x10000-32)
ab68f921	195
14d0a02a	196	#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
6d0f6bcf JCPV	197	#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
6d0f6bcf JCPV	198	# define CONFIG_SYS_RAMBOOT 1
ab68f921 DH	199	#endif
ab68f921 DH	200
6d0f6bcf JCPV	201	#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
	202	#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
	203	#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
ab68f921	204
6d0f6bcf JCPV	205	#define CONFIG_SYS_MALLOC_END (CONFIG_SYS_INIT_SP_OFFSET-CONFIG_SYS_STACK_SIZE)
6d0f6bcf JCPV	206	#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MALLOC_END-CONFIG_SYS_MALLOC_LEN)
ab68f921 DH	207
ab68f921 DH	208	/* relocated monitor area */
6d0f6bcf JCPV	209	#define CONFIG_SYS_RELOC_MONITOR_MAX_END CONFIG_SYS_MALLOC_BASE
6d0f6bcf JCPV	210	#define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN)
ab68f921 DH	211
ab68f921 DH	212	/* make un relocated address from relocated address */
14d0a02a	213	#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE))
ab68f921 DH	214
	215	/*
	216	* Ethernet configuration
	217	*/
	218	/#define CONFIG_GRETH 1/
ab68f921	219
ab68f921 DH	220	/*
	221	* Define CONFIG_GRETH_10MBIT to force GRETH at 10Mb/s
	222	*/
	223	/* #define CONFIG_GRETH_10MBIT 1 */
	224	#define CONFIG_PHY_ADDR 0x00
	225
	226	/*
	227	* Miscellaneous configurable options
	228	*/
6d0f6bcf	229	#define CONFIG_SYS_LONGHELP /* undef to save memory */
ab68f921	230	#if defined(CONFIG_CMD_KGDB)
6d0f6bcf	231	#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
ab68f921	232	#else
6d0f6bcf	233	#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
ab68f921	234	#endif
6d0f6bcf JCPV	235	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
	236	#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
	237	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
ab68f921	238
6d0f6bcf JCPV	239	#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
6d0f6bcf JCPV	240	#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
ab68f921	241
6d0f6bcf	242	#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
ab68f921	243
ab68f921 DH	244	/*** Gaisler GRLIB IP-Cores Config ******/
ab68f921 DH	245
6d0f6bcf JCPV	246	#define CONFIG_SYS_GRLIB_SDRAM 0
6d0f6bcf JCPV	247	#define CONFIG_SYS_GRLIB_MEMCFG1 (0x000000ff \| (1<<11))
ab68f921	248	#if CONFIG_GRSIM
6d0f6bcf	249	#define CONFIG_SYS_GRLIB_MEMCFG2 0x82206000
ab68f921	250	#else
6d0f6bcf	251	#define CONFIG_SYS_GRLIB_MEMCFG2 0x00001820
ab68f921	252	#endif
6d0f6bcf	253	#define CONFIG_SYS_GRLIB_MEMCFG3 0x00136000
ab68f921 DH	254
ab68f921 DH	255	/* LEON2 UART 1 */
1aeed8d7	256
ab68f921 DH	257	/* UART1 Define to 1 or 0 */
	258	#define LEON2_UART1_LOOPBACK_ENABLE 0
	259	#define LEON2_UART1_FLOWCTRL_ENABLE 0
	260	#define LEON2_UART1_PARITY_ENABLE 0
	261	#define LEON2_UART1_ODDPAR_ENABLE 0
	262
	263	/* LEON2 UART 2 */
	264
ab68f921 DH	265	/* UART2 Define to 1 or 0 */
	266	#define LEON2_UART2_LOOPBACK_ENABLE 0
	267	#define LEON2_UART2_FLOWCTRL_ENABLE 0
	268	#define LEON2_UART2_PARITY_ENABLE 0
	269	#define LEON2_UART2_ODDPAR_ENABLE 0
	270
	271	#define LEON_CONSOLE_UART1 1
	272	#define LEON_CONSOLE_UART2 2
	273
	274	/* Use UART2 as console */
	275	#define LEON2_CONSOLE_SELECT LEON_CONSOLE_UART1
	276
	277	/* LEON2 I/O Port */
	278	/#define LEON2_IO_PORT_DIR 0x0000aa00/
	279
	280	/* default kernel command line */
	281	#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0"
	282
ab68f921	283	#endif /* __CONFIG_H */