[people/ms/u-boot.git] / include / configs / gw_ventana.h

/*
 * Copyright (C) 2013 Gateworks Corporation
 *
 * SPDX-License-Identifier: GPL-2.0+
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/* SPL */
/* Location in NAND to read U-Boot from */
#define CONFIG_SYS_NAND_U_BOOT_OFFS     (14 * SZ_1M)

/* Falcon Mode */
#define CONFIG_CMD_SPL
#define CONFIG_SYS_SPL_ARGS_ADDR	0x18000000
#define CONFIG_CMD_SPL_WRITE_SIZE	(128 * SZ_1K)

/* Falcon Mode - NAND support: args@17MB kernel@18MB */
#define CONFIG_CMD_SPL_NAND_OFS		(17 * SZ_1M)
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS	(18 * SZ_1M)

/* Falcon Mode - MMC support: args@1MB kernel@2MB */
#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR	0x800	/* 1MB */
#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS	(CONFIG_CMD_SPL_WRITE_SIZE / 512)
#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR	0x1000	/* 2MB */

#include "imx6_spl.h"                  /* common IMX6 SPL configuration */
#include "mx6_common.h"
#define CONFIG_DISPLAY_BOARDINFO_LATE

#define CONFIG_MACH_TYPE	4520   /* Gateworks Ventana Platform */

/* Serial ATAG */
#define CONFIG_SERIAL_TAG

/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN		(10 * SZ_1M)

/* Init Functions */
#define CONFIG_MISC_INIT_R

/* Driver Model */
#ifndef CONFIG_SPL_BUILD
#define CONFIG_DM_GPIO
#define CONFIG_DM_THERMAL
#endif

/* Thermal */
#define CONFIG_IMX_THERMAL

/* Serial */
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE	       UART2_BASE

#ifdef CONFIG_SPI_FLASH

/* SPI */
#ifdef CONFIG_CMD_SF
  #define CONFIG_MXC_SPI
  #define CONFIG_SPI_FLASH_MTD
  #define CONFIG_SPI_FLASH_BAR
  #define CONFIG_SF_DEFAULT_BUS              0
  #define CONFIG_SF_DEFAULT_CS               0
					     /* GPIO 3-19 (21248) */
  #define CONFIG_SF_DEFAULT_SPEED            30000000
  #define CONFIG_SF_DEFAULT_MODE             (SPI_MODE_0)
#endif

#elif defined(CONFIG_SPL_NAND_SUPPORT)
/* Enable NAND support */
#define CONFIG_CMD_NAND
#define CONFIG_CMD_NAND_TRIMFFS
#ifdef CONFIG_CMD_NAND
  #define CONFIG_NAND_MXS
  #define CONFIG_SYS_MAX_NAND_DEVICE	1
  #define CONFIG_SYS_NAND_BASE		0x40000000
  #define CONFIG_SYS_NAND_5_ADDR_CYCLE
  #define CONFIG_SYS_NAND_ONFI_DETECTION

  /* DMA stuff, needed for GPMI/MXS NAND support */
  #define CONFIG_APBH_DMA
  #define CONFIG_APBH_DMA_BURST
  #define CONFIG_APBH_DMA_BURST8
#endif

#endif /* CONFIG_SPI_FLASH */

/* I2C Configs */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED		100000
#define CONFIG_I2C_GSC			0
#define CONFIG_I2C_EDID

/* MMC Configs */
#define CONFIG_SYS_FSL_ESDHC_ADDR      0

/* eMMC Configs */
#define CONFIG_SUPPORT_EMMC_BOOT
#define CONFIG_SUPPORT_EMMC_RPMB

/*
 * SATA Configs
 */
#ifdef CONFIG_CMD_SATA
  #define CONFIG_DWC_AHSATA
  #define CONFIG_SYS_SATA_MAX_DEVICE	1
  #define CONFIG_DWC_AHSATA_PORT_ID	0
  #define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_ARB_BASE_ADDR
  #define CONFIG_LBA48
  #define CONFIG_LIBATA
#endif

/*
 * PCI express
 */
#define CONFIG_CMD_PCI
#ifdef CONFIG_CMD_PCI
#define CONFIG_PCI_SCAN_SHOW
#define CONFIG_PCI_FIXUP_DEV
#define CONFIG_PCIE_IMX
#endif

/*
 * PMIC
 */
#define CONFIG_POWER
#define CONFIG_POWER_I2C
#define CONFIG_POWER_PFUZE100
#define CONFIG_POWER_PFUZE100_I2C_ADDR	0x08
#define CONFIG_POWER_LTC3676
#define CONFIG_POWER_LTC3676_I2C_ADDR  0x3c

/* Various command support */
#define CONFIG_CMD_UNZIP         /* gzwrite */

/* Ethernet support */
#define CONFIG_FEC_MXC
#define CONFIG_MII
#define IMX_FEC_BASE             ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE      RGMII
#define CONFIG_FEC_MXC_PHYADDR   0
#define CONFIG_ARP_TIMEOUT       200UL

/* USB Configs */
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_ASIX
#define CONFIG_USB_ETHER_SMSC95XX
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET  /* For OTG port */
#define CONFIG_MXC_USB_PORTSC     (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CONFIG_MXC_USB_FLAGS      0
#define CONFIG_USBD_HS
#define CONFIG_USB_ETHER
#define CONFIG_USB_ETH_CDC
#define CONFIG_NETCONSOLE
#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP

/* USB Mass Storage Gadget */
#define CONFIG_USB_FUNCTION_MASS_STORAGE

/* Framebuffer and LCD */
#define CONFIG_VIDEO_IPUV3
#define CONFIG_VIDEO_LOGO
#define CONFIG_IPUV3_CLK          260000000
#define CONFIG_IMX_HDMI
#define CONFIG_IMX_VIDEO_SKIP
#define CONFIG_VIDEO_BMP_LOGO
#define CONFIG_SPLASH_SCREEN_ALIGN
#define CONFIG_HIDE_LOGO_VERSION  /* Custom config to hide U-boot version */

/* Miscellaneous configurable options */
#define CONFIG_HWCONFIG
#define CONFIG_PREBOOT

/* Print Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)

/* Memory configuration */
#define CONFIG_SYS_MEMTEST_START       0x10000000
#define CONFIG_SYS_MEMTEST_END	       0x10010000
#define CONFIG_SYS_MEMTEST_SCRATCH     0x10800000

/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS           1
#define PHYS_SDRAM                     MMDC0_ARB_BASE_ADDR
#define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM
#define CONFIG_SYS_INIT_RAM_ADDR       IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE

#define CONFIG_SYS_INIT_SP_OFFSET \
	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)

/*
 * MTD Command for mtdparts
 */
#define CONFIG_MTD_DEVICE
#define CONFIG_MTD_PARTITIONS
#ifdef CONFIG_SPI_FLASH
#define MTDIDS_DEFAULT    "nor0=nor"
#define MTDPARTS_DEFAULT  \
	"mtdparts=nor:512k(uboot),64k(env),2m(kernel),-(rootfs)"
#else
#define MTDIDS_DEFAULT    "nand0=nand"
#define MTDPARTS_DEFAULT  "mtdparts=nand:16m(uboot),1m(env),-(rootfs)"
#endif

/* Persistent Environment Config */
#ifdef CONFIG_SPI_FLASH
  #define CONFIG_ENV_IS_IN_SPI_FLASH
#elif defined(CONFIG_SPL_NAND_SUPPORT)
  #define CONFIG_ENV_IS_IN_NAND
#else
  #define CONFIG_ENV_IS_IN_MMC
#endif
#if defined(CONFIG_ENV_IS_IN_MMC)
  #define CONFIG_SYS_MMC_ENV_DEV         0
  #define CONFIG_SYS_MMC_ENV_PART        1
  #define CONFIG_ENV_OFFSET              (709 * SZ_1K)
  #define CONFIG_ENV_SIZE                (128 * SZ_1K)
  #define CONFIG_ENV_OFFSET_REDUND       (CONFIG_ENV_OFFSET + (128 * SZ_1K))
#elif defined(CONFIG_ENV_IS_IN_NAND)
  #define CONFIG_ENV_OFFSET              (16 * SZ_1M)
  #define CONFIG_ENV_SECT_SIZE           (128 * SZ_1K)
  #define CONFIG_ENV_SIZE                CONFIG_ENV_SECT_SIZE
  #define CONFIG_ENV_OFFSET_REDUND       (CONFIG_ENV_OFFSET + (512 * SZ_1K))
  #define CONFIG_ENV_SIZE_REDUND         CONFIG_ENV_SIZE
#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
  #define CONFIG_ENV_OFFSET		(512 * SZ_1K)
  #define CONFIG_ENV_SECT_SIZE		(64 * SZ_1K)
  #define CONFIG_ENV_SIZE		(8 * SZ_1K)
  #define CONFIG_ENV_SPI_BUS             CONFIG_SF_DEFAULT_BUS
  #define CONFIG_ENV_SPI_CS              CONFIG_SF_DEFAULT_CS
  #define CONFIG_ENV_SPI_MODE            CONFIG_SF_DEFAULT_MODE
  #define CONFIG_ENV_SPI_MAX_HZ          CONFIG_SF_DEFAULT_SPEED
#endif

/* Environment */
#define CONFIG_IPADDR             192.168.1.1
#define CONFIG_SERVERIP           192.168.1.146

#define CONFIG_EXTRA_ENV_SETTINGS_COMMON \
	"pcidisable=1\0" \
	"splashpos=m,m\0" \
	"usb_pgood_delay=2000\0" \
	"console=ttymxc1\0" \
	"bootdevs=usb mmc sata flash\0" \
	"hwconfig=_UNKNOWN_\0" \
	"video=\0" \
	\
	"mtdparts=" MTDPARTS_DEFAULT "\0" \
	"mtdids=" MTDIDS_DEFAULT "\0" \
	"disk=0\0" \
	"part=1\0" \
	\
	"fdt_high=0xffffffff\0" \
	"fdt_addr=0x18000000\0" \
	"initrd_high=0xffffffff\0" \
	"fixfdt=" \
		"fdt addr ${fdt_addr}\0" \
	"bootdir=boot\0" \
	"loadfdt=" \
		"if ${fsload} ${fdt_addr} ${bootdir}/${fdt_file}; then " \
			"echo Loaded DTB from ${bootdir}/${fdt_file}; " \
			"run fixfdt; " \
		"elif ${fsload} ${fdt_addr} ${bootdir}/${fdt_file1}; then " \
			"echo Loaded DTB from ${bootdir}/${fdt_file1}; " \
			"run fixfdt; " \
		"elif ${fsload} ${fdt_addr} ${bootdir}/${fdt_file2}; then " \
			"echo Loaded DTB from ${bootdir}/${fdt_file2}; " \
			"run fixfdt; " \
		"fi\0" \
	\
	"fs=ext4\0" \
	"script=6x_bootscript-ventana\0" \
	"loadscript=" \
		"if ${fsload} ${loadaddr} ${bootdir}/${script}; then " \
			"source ${loadaddr}; " \
		"fi\0" \
	\
	"uimage=uImage\0" \
	"mmc_root=mmcblk0p1\0" \
	"mmc_boot=" \
		"setenv fsload \"${fs}load mmc ${disk}:${part}\"; " \
		"mmc dev ${disk} && mmc rescan && " \
		"setenv dtype mmc; run loadscript; " \
		"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
			"setenv bootargs console=${console},${baudrate} " \
				"root=/dev/${mmc_root} rootfstype=${fs} " \
				"rootwait rw ${video} ${extra}; " \
			"if run loadfdt; then " \
				"bootm ${loadaddr} - ${fdt_addr}; " \
			"else " \
				"bootm; " \
			"fi; " \
		"fi\0" \
	\
	"sata_boot=" \
		"setenv fsload \"${fs}load sata ${disk}:${part}\"; " \
		"sata init && " \
		"setenv dtype sata; run loadscript; " \
		"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
			"setenv bootargs console=${console},${baudrate} " \
				"root=/dev/sda1 rootfstype=${fs} " \
				"rootwait rw ${video} ${extra}; " \
			"if run loadfdt; then " \
				"bootm ${loadaddr} - ${fdt_addr}; " \
			"else " \
				"bootm; " \
			"fi; " \
		"fi\0" \
	"usb_boot=" \
		"setenv fsload \"${fs}load usb ${disk}:${part}\"; " \
		"usb start && usb dev ${disk} && " \
		"setenv dtype usb; run loadscript; " \
		"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
			"setenv bootargs console=${console},${baudrate} " \
				"root=/dev/sda1 rootfstype=${fs} " \
				"rootwait rw ${video} ${extra}; " \
			"if run loadfdt; then " \
				"bootm ${loadaddr} - ${fdt_addr}; " \
			"else " \
				"bootm; " \
			"fi; " \
		"fi\0"

#ifdef CONFIG_SPI_FLASH
	#define CONFIG_EXTRA_ENV_SETTINGS \
	CONFIG_EXTRA_ENV_SETTINGS_COMMON \
	"image_os=ventana/openwrt-imx6-imx6q-gw5400-a-squashfs.bin\0" \
	"image_uboot=ventana/u-boot_spi.imx\0" \
	\
	"spi_koffset=0x90000\0" \
	"spi_klen=0x200000\0" \
	\
	"spi_updateuboot=echo Updating uboot from " \
		"${serverip}:${image_uboot}...; " \
		"tftpboot ${loadaddr} ${image_uboot} && " \
		"sf probe && sf erase 0 80000 && " \
			"sf write ${loadaddr} 400 ${filesize}\0" \
	"spi_update=echo Updating OS from ${serverip}:${image_os} " \
		"to ${spi_koffset} ...; " \
		"tftp ${loadaddr} ${image_os} && " \
		"sf probe && " \
		"sf update ${loadaddr} ${spi_koffset} ${filesize}\0" \
	\
	"flash_boot=" \
		"if sf probe && " \
		"sf read ${loadaddr} ${spi_koffset} ${spi_klen}; then " \
			"setenv bootargs console=${console},${baudrate} " \
				"root=/dev/mtdblock3 " \
				"rootfstype=squashfs,jffs2 " \
				"${video} ${extra}; " \
			"bootm; " \
		"fi\0"
#else
	#define CONFIG_EXTRA_ENV_SETTINGS \
	CONFIG_EXTRA_ENV_SETTINGS_COMMON \
	\
	"image_rootfs=openwrt-imx6-ventana-rootfs.ubi\0" \
	"nand_update=echo Updating NAND from ${serverip}:${image_rootfs}...; " \
		"tftp ${loadaddr} ${image_rootfs} && " \
		"nand erase.part rootfs && " \
		"nand write ${loadaddr} rootfs ${filesize}\0" \
	\
	"flash_boot=" \
		"setenv fsload 'ubifsload'; " \
		"ubi part rootfs; " \
		"if ubi check boot; then " \
			"ubifsmount ubi0:boot; " \
			"setenv root ubi0:rootfs ubi.mtd=2 " \
				"rootfstype=squashfs,ubifs; " \
			"setenv bootdir; " \
		"elif ubi check rootfs; then " \
			"ubifsmount ubi0:rootfs; " \
			"setenv root ubi0:rootfs ubi.mtd=2 " \
				"rootfstype=ubifs; " \
		"fi; " \
		"setenv dtype nand; run loadscript; " \
		"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
			"setenv bootargs console=${console},${baudrate} " \
				"root=${root} ${video} ${extra}; " \
			"if run loadfdt; then " \
				"ubifsumount; " \
				"bootm ${loadaddr} - ${fdt_addr}; " \
			"else " \
				"ubifsumount; bootm; " \
			"fi; " \
		"fi\0"
#endif

#define CONFIG_BOOTCOMMAND \
	"for btype in ${bootdevs}; do " \
		"echo; echo Attempting ${btype} boot...; " \
		"if run ${btype}_boot; then; fi; " \
	"done"

#endif			       /* __CONFIG_H */
Commit	Line	Data
59189a8b TH	1	/*
	2	* Copyright (C) 2013 Gateworks Corporation
	3	*
	4	* SPDX-License-Identifier: GPL-2.0+
	5	*/
	6
	7	#ifndef __CONFIG_H
	8	#define __CONFIG_H
	9
0cc11dea	10	/* SPL */
0cc11dea	11	/* Location in NAND to read U-Boot from */
55ff55e9	12	#define CONFIG_SYS_NAND_U_BOOT_OFFS (14 * SZ_1M)
0cc11dea	13
53940a50 TH	14	/* Falcon Mode */
53940a50 TH	15	#define CONFIG_CMD_SPL
53940a50 TH	16	#define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000
	17	#define CONFIG_CMD_SPL_WRITE_SIZE (128 * SZ_1K)
	18
	19	/* Falcon Mode - NAND support: args@17MB kernel@18MB */
	20	#define CONFIG_CMD_SPL_NAND_OFS (17 * SZ_1M)
	21	#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS (18 * SZ_1M)
	22
	23	/* Falcon Mode - MMC support: args@1MB kernel@2MB */
	24	#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */
	25	#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512)
	26	#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x1000 /* 2MB */
	27
0cc11dea	28	#include "imx6_spl.h" /* common IMX6 SPL configuration */
59189a8b	29	#include "mx6_common.h"
6eab98a0	30	#define CONFIG_DISPLAY_BOARDINFO_LATE
59189a8b TH	31
	32	#define CONFIG_MACH_TYPE 4520 /* Gateworks Ventana Platform */
	33
ea690917	34	/* Serial ATAG */
59189a8b	35	#define CONFIG_SERIAL_TAG
59189a8b TH	36
59189a8b TH	37	/* Size of malloc() pool */
55ff55e9	38	#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
59189a8b TH	39
59189a8b TH	40	/* Init Functions */
59189a8b TH	41	#define CONFIG_MISC_INIT_R
59189a8b TH	42
e1b4770c TH	43	/* Driver Model */
e1b4770c TH	44	#ifndef CONFIG_SPL_BUILD
e1b4770c	45	#define CONFIG_DM_GPIO
50de5088	46	#define CONFIG_DM_THERMAL
e1b4770c TH	47	#endif
e1b4770c TH	48
50de5088	49	/* Thermal */
1368f993	50	#define CONFIG_IMX_THERMAL
50de5088	51
59189a8b TH	52	/* Serial */
	53	#define CONFIG_MXC_UART
	54	#define CONFIG_MXC_UART_BASE UART2_BASE
	55
	56	#ifdef CONFIG_SPI_FLASH
	57
	58	/* SPI */
59189a8b TH	59	#ifdef CONFIG_CMD_SF
	60	#define CONFIG_MXC_SPI
	61	#define CONFIG_SPI_FLASH_MTD
	62	#define CONFIG_SPI_FLASH_BAR
59189a8b	63	#define CONFIG_SF_DEFAULT_BUS 0
155fa9af	64	#define CONFIG_SF_DEFAULT_CS 0
59189a8b TH	65	/* GPIO 3-19 (21248) */
	66	#define CONFIG_SF_DEFAULT_SPEED 30000000
	67	#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
	68	#endif
	69
d883fcc6	70	#elif defined(CONFIG_SPL_NAND_SUPPORT)
59189a8b	71	/* Enable NAND support */
59189a8b TH	72	#define CONFIG_CMD_NAND
	73	#define CONFIG_CMD_NAND_TRIMFFS
	74	#ifdef CONFIG_CMD_NAND
	75	#define CONFIG_NAND_MXS
	76	#define CONFIG_SYS_MAX_NAND_DEVICE 1
	77	#define CONFIG_SYS_NAND_BASE 0x40000000
	78	#define CONFIG_SYS_NAND_5_ADDR_CYCLE
	79	#define CONFIG_SYS_NAND_ONFI_DETECTION
	80
	81	/* DMA stuff, needed for GPMI/MXS NAND support */
	82	#define CONFIG_APBH_DMA
	83	#define CONFIG_APBH_DMA_BURST
	84	#define CONFIG_APBH_DMA_BURST8
	85	#endif
	86
	87	#endif /* CONFIG_SPI_FLASH */
	88
59189a8b	89	/* I2C Configs */
59189a8b TH	90	#define CONFIG_SYS_I2C
59189a8b TH	91	#define CONFIG_SYS_I2C_MXC
03544c66 AA	92	#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
03544c66 AA	93	#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
f8cb101e	94	#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
9c0fe83e TH	95	#define CONFIG_SYS_I2C_SPEED 100000
9c0fe83e TH	96	#define CONFIG_I2C_GSC 0
f6747cda	97	#define CONFIG_I2C_EDID
59189a8b TH	98
59189a8b TH	99	/* MMC Configs */
59189a8b	100	#define CONFIG_SYS_FSL_ESDHC_ADDR 0
59189a8b	101
1faca6ad TH	102	/* eMMC Configs */
	103	#define CONFIG_SUPPORT_EMMC_BOOT
	104	#define CONFIG_SUPPORT_EMMC_RPMB
	105
59189a8b TH	106	/*
	107	* SATA Configs
	108	*/
59189a8b TH	109	#ifdef CONFIG_CMD_SATA
	110	#define CONFIG_DWC_AHSATA
	111	#define CONFIG_SYS_SATA_MAX_DEVICE 1
	112	#define CONFIG_DWC_AHSATA_PORT_ID 0
	113	#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
	114	#define CONFIG_LBA48
	115	#define CONFIG_LIBATA
	116	#endif
	117
	118	/*
	119	* PCI express
	120	*/
	121	#define CONFIG_CMD_PCI
	122	#ifdef CONFIG_CMD_PCI
59189a8b	123	#define CONFIG_PCI_SCAN_SHOW
dad08286	124	#define CONFIG_PCI_FIXUP_DEV
59189a8b TH	125	#define CONFIG_PCIE_IMX
	126	#endif
	127
	128	/*
	129	* PMIC
	130	*/
	131	#define CONFIG_POWER
	132	#define CONFIG_POWER_I2C
	133	#define CONFIG_POWER_PFUZE100
	134	#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
234d89da TH	135	#define CONFIG_POWER_LTC3676
234d89da TH	136	#define CONFIG_POWER_LTC3676_I2C_ADDR 0x3c
59189a8b TH	137
59189a8b TH	138	/* Various command support */
f7d9fcd1	139	#define CONFIG_CMD_UNZIP /* gzwrite */
59189a8b TH	140
	141	/* Ethernet support */
	142	#define CONFIG_FEC_MXC
	143	#define CONFIG_MII
	144	#define IMX_FEC_BASE ENET_BASE_ADDR
	145	#define CONFIG_FEC_XCV_TYPE RGMII
59189a8b	146	#define CONFIG_FEC_MXC_PHYADDR 0
59189a8b TH	147	#define CONFIG_ARP_TIMEOUT 200UL
	148
	149	/* USB Configs */
59189a8b TH	150	#define CONFIG_USB_HOST_ETHER
	151	#define CONFIG_USB_ETHER_ASIX
	152	#define CONFIG_USB_ETHER_SMSC95XX
	153	#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
	154	#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
	155	#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI \| PORT_PTS_PTW)
	156	#define CONFIG_MXC_USB_FLAGS 0
59189a8b	157	#define CONFIG_USBD_HS
59189a8b TH	158	#define CONFIG_USB_ETHER
	159	#define CONFIG_USB_ETH_CDC
	160	#define CONFIG_NETCONSOLE
	161	#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
59189a8b	162
9543e954	163	/* USB Mass Storage Gadget */
01acd6ab	164	#define CONFIG_USB_FUNCTION_MASS_STORAGE
9543e954	165
7a278f9f	166	/* Framebuffer and LCD */
7a278f9f	167	#define CONFIG_VIDEO_IPUV3
7a278f9f TH	168	#define CONFIG_VIDEO_LOGO
7a278f9f TH	169	#define CONFIG_IPUV3_CLK 260000000
7a278f9f TH	170	#define CONFIG_IMX_HDMI
7a278f9f TH	171	#define CONFIG_IMX_VIDEO_SKIP
0a22c7f0 TH	172	#define CONFIG_VIDEO_BMP_LOGO
	173	#define CONFIG_SPLASH_SCREEN_ALIGN
	174	#define CONFIG_HIDE_LOGO_VERSION /* Custom config to hide U-boot version */
7a278f9f	175
59189a8b	176	/* Miscellaneous configurable options */
59189a8b	177	#define CONFIG_HWCONFIG
899f589b	178	#define CONFIG_PREBOOT
59189a8b TH	179
	180	/* Print Buffer Size */
	181	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
59189a8b TH	182
	183	/* Memory configuration */
	184	#define CONFIG_SYS_MEMTEST_START 0x10000000
	185	#define CONFIG_SYS_MEMTEST_END 0x10010000
	186	#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
59189a8b TH	187
	188	/* Physical Memory Map */
	189	#define CONFIG_NR_DRAM_BANKS 1
	190	#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
	191	#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
	192	#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
	193	#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
	194
	195	#define CONFIG_SYS_INIT_SP_OFFSET \
	196	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
	197	#define CONFIG_SYS_INIT_SP_ADDR \
	198	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
	199
59189a8b TH	200	/*
	201	* MTD Command for mtdparts
	202	*/
59189a8b TH	203	#define CONFIG_MTD_DEVICE
	204	#define CONFIG_MTD_PARTITIONS
	205	#ifdef CONFIG_SPI_FLASH
	206	#define MTDIDS_DEFAULT "nor0=nor"
	207	#define MTDPARTS_DEFAULT \
	208	"mtdparts=nor:512k(uboot),64k(env),2m(kernel),-(rootfs)"
	209	#else
	210	#define MTDIDS_DEFAULT "nand0=nand"
	211	#define MTDPARTS_DEFAULT "mtdparts=nand:16m(uboot),1m(env),-(rootfs)"
	212	#endif
	213
	214	/* Persistent Environment Config */
59189a8b	215	#ifdef CONFIG_SPI_FLASH
d883fcc6 TH	216	#define CONFIG_ENV_IS_IN_SPI_FLASH
	217	#elif defined(CONFIG_SPL_NAND_SUPPORT)
	218	#define CONFIG_ENV_IS_IN_NAND
59189a8b	219	#else
d883fcc6	220	#define CONFIG_ENV_IS_IN_MMC
59189a8b TH	221	#endif
59189a8b TH	222	#if defined(CONFIG_ENV_IS_IN_MMC)
59189a8b	223	#define CONFIG_SYS_MMC_ENV_DEV 0
b69999ef	224	#define CONFIG_SYS_MMC_ENV_PART 1
0a9c2150 TH	225	#define CONFIG_ENV_OFFSET (709 * SZ_1K)
	226	#define CONFIG_ENV_SIZE (128 * SZ_1K)
	227	#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + (128 * SZ_1K))
59189a8b	228	#elif defined(CONFIG_ENV_IS_IN_NAND)
55ff55e9 TH	229	#define CONFIG_ENV_OFFSET (16 * SZ_1M)
55ff55e9 TH	230	#define CONFIG_ENV_SECT_SIZE (128 * SZ_1K)
59189a8b	231	#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
55ff55e9	232	#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + (512 * SZ_1K))
59189a8b TH	233	#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
59189a8b TH	234	#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
55ff55e9 TH	235	#define CONFIG_ENV_OFFSET (512 * SZ_1K)
	236	#define CONFIG_ENV_SECT_SIZE (64 * SZ_1K)
	237	#define CONFIG_ENV_SIZE (8 * SZ_1K)
59189a8b TH	238	#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
	239	#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
	240	#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
	241	#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
	242	#endif
	243
	244	/* Environment */
59189a8b TH	245	#define CONFIG_IPADDR 192.168.1.1
59189a8b TH	246	#define CONFIG_SERVERIP 192.168.1.146
59189a8b TH	247
59189a8b TH	248	#define CONFIG_EXTRA_ENV_SETTINGS_COMMON \
f4416579	249	"pcidisable=1\0" \
0a22c7f0	250	"splashpos=m,m\0" \
04171690	251	"usb_pgood_delay=2000\0" \
59189a8b TH	252	"console=ttymxc1\0" \
59189a8b TH	253	"bootdevs=usb mmc sata flash\0" \
5911c092	254	"hwconfig=_UNKNOWN_\0" \
59189a8b TH	255	"video=\0" \
	256	\
	257	"mtdparts=" MTDPARTS_DEFAULT "\0" \
	258	"mtdids=" MTDIDS_DEFAULT "\0" \
7698cdfd TH	259	"disk=0\0" \
7698cdfd TH	260	"part=1\0" \
59189a8b TH	261	\
	262	"fdt_high=0xffffffff\0" \
	263	"fdt_addr=0x18000000\0" \
8cc25eb8	264	"initrd_high=0xffffffff\0" \
4df0bff3 TH	265	"fixfdt=" \
4df0bff3 TH	266	"fdt addr ${fdt_addr}\0" \
e2801a96	267	"bootdir=boot\0" \
59189a8b	268	"loadfdt=" \
1b740001 TH	269	"if ${fsload} ${fdt_addr} ${bootdir}/${fdt_file}; then " \
1b740001 TH	270	"echo Loaded DTB from ${bootdir}/${fdt_file}; " \
4df0bff3	271	"run fixfdt; " \
1b740001 TH	272	"elif ${fsload} ${fdt_addr} ${bootdir}/${fdt_file1}; then " \
1b740001 TH	273	"echo Loaded DTB from ${bootdir}/${fdt_file1}; " \
4df0bff3	274	"run fixfdt; " \
1b740001 TH	275	"elif ${fsload} ${fdt_addr} ${bootdir}/${fdt_file2}; then " \
1b740001 TH	276	"echo Loaded DTB from ${bootdir}/${fdt_file2}; " \
4df0bff3	277	"run fixfdt; " \
59189a8b TH	278	"fi\0" \
59189a8b TH	279	\
543a4aba	280	"fs=ext4\0" \
e2801a96	281	"script=6x_bootscript-ventana\0" \
59189a8b	282	"loadscript=" \
e2801a96	283	"if ${fsload} ${loadaddr} ${bootdir}/${script}; then " \
50987095	284	"source ${loadaddr}; " \
59189a8b TH	285	"fi\0" \
59189a8b TH	286	\
e2801a96	287	"uimage=uImage\0" \
79942c4f	288	"mmc_root=mmcblk0p1\0" \
59189a8b	289	"mmc_boot=" \
543a4aba	290	"setenv fsload \"${fs}load mmc ${disk}:${part}\"; " \
7698cdfd	291	"mmc dev ${disk} && mmc rescan && " \
560e8b3f	292	"setenv dtype mmc; run loadscript; " \
e2801a96	293	"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
59189a8b	294	"setenv bootargs console=${console},${baudrate} " \
79942c4f	295	"root=/dev/${mmc_root} rootfstype=${fs} " \
59189a8b	296	"rootwait rw ${video} ${extra}; " \
4df0bff3	297	"if run loadfdt; then " \
59189a8b TH	298	"bootm ${loadaddr} - ${fdt_addr}; " \
	299	"else " \
	300	"bootm; " \
	301	"fi; " \
	302	"fi\0" \
	303	\
	304	"sata_boot=" \
543a4aba	305	"setenv fsload \"${fs}load sata ${disk}:${part}\"; " \
7698cdfd	306	"sata init && " \
560e8b3f	307	"setenv dtype sata; run loadscript; " \
e2801a96	308	"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
59189a8b	309	"setenv bootargs console=${console},${baudrate} " \
543a4aba	310	"root=/dev/sda1 rootfstype=${fs} " \
59189a8b	311	"rootwait rw ${video} ${extra}; " \
4df0bff3	312	"if run loadfdt; then " \
59189a8b TH	313	"bootm ${loadaddr} - ${fdt_addr}; " \
	314	"else " \
	315	"bootm; " \
	316	"fi; " \
	317	"fi\0" \
	318	"usb_boot=" \
543a4aba	319	"setenv fsload \"${fs}load usb ${disk}:${part}\"; " \
7698cdfd	320	"usb start && usb dev ${disk} && " \
560e8b3f	321	"setenv dtype usb; run loadscript; " \
e2801a96	322	"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
59189a8b	323	"setenv bootargs console=${console},${baudrate} " \
543a4aba	324	"root=/dev/sda1 rootfstype=${fs} " \
59189a8b	325	"rootwait rw ${video} ${extra}; " \
4df0bff3	326	"if run loadfdt; then " \
59189a8b TH	327	"bootm ${loadaddr} - ${fdt_addr}; " \
	328	"else " \
	329	"bootm; " \
	330	"fi; " \
	331	"fi\0"
	332
	333	#ifdef CONFIG_SPI_FLASH
	334	#define CONFIG_EXTRA_ENV_SETTINGS \
	335	CONFIG_EXTRA_ENV_SETTINGS_COMMON \
	336	"image_os=ventana/openwrt-imx6-imx6q-gw5400-a-squashfs.bin\0" \
	337	"image_uboot=ventana/u-boot_spi.imx\0" \
	338	\
	339	"spi_koffset=0x90000\0" \
	340	"spi_klen=0x200000\0" \
	341	\
	342	"spi_updateuboot=echo Updating uboot from " \
	343	"${serverip}:${image_uboot}...; " \
	344	"tftpboot ${loadaddr} ${image_uboot} && " \
	345	"sf probe && sf erase 0 80000 && " \
	346	"sf write ${loadaddr} 400 ${filesize}\0" \
	347	"spi_update=echo Updating OS from ${serverip}:${image_os} " \
	348	"to ${spi_koffset} ...; " \
	349	"tftp ${loadaddr} ${image_os} && " \
	350	"sf probe && " \
	351	"sf update ${loadaddr} ${spi_koffset} ${filesize}\0" \
	352	\
	353	"flash_boot=" \
	354	"if sf probe && " \
	355	"sf read ${loadaddr} ${spi_koffset} ${spi_klen}; then " \
	356	"setenv bootargs console=${console},${baudrate} " \
	357	"root=/dev/mtdblock3 " \
	358	"rootfstype=squashfs,jffs2 " \
	359	"${video} ${extra}; " \
	360	"bootm; " \
	361	"fi\0"
	362	#else
	363	#define CONFIG_EXTRA_ENV_SETTINGS \
	364	CONFIG_EXTRA_ENV_SETTINGS_COMMON \
59189a8b	365	\
e2801a96	366	"image_rootfs=openwrt-imx6-ventana-rootfs.ubi\0" \
59189a8b TH	367	"nand_update=echo Updating NAND from ${serverip}:${image_rootfs}...; " \
	368	"tftp ${loadaddr} ${image_rootfs} && " \
	369	"nand erase.part rootfs && " \
	370	"nand write ${loadaddr} rootfs ${filesize}\0" \
	371	\
	372	"flash_boot=" \
	373	"setenv fsload 'ubifsload'; " \
e2801a96 TH	374	"ubi part rootfs; " \
	375	"if ubi check boot; then " \
	376	"ubifsmount ubi0:boot; " \
	377	"setenv root ubi0:rootfs ubi.mtd=2 " \
	378	"rootfstype=squashfs,ubifs; " \
	379	"setenv bootdir; " \
	380	"elif ubi check rootfs; then " \
	381	"ubifsmount ubi0:rootfs; " \
	382	"setenv root ubi0:rootfs ubi.mtd=2 " \
	383	"rootfstype=ubifs; " \
	384	"fi; " \
560e8b3f	385	"setenv dtype nand; run loadscript; " \
e2801a96	386	"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
59189a8b	387	"setenv bootargs console=${console},${baudrate} " \
e2801a96	388	"root=${root} ${video} ${extra}; " \
4df0bff3	389	"if run loadfdt; then " \
59189a8b TH	390	"ubifsumount; " \
	391	"bootm ${loadaddr} - ${fdt_addr}; " \
	392	"else " \
	393	"ubifsumount; bootm; " \
	394	"fi; " \
	395	"fi\0"
	396	#endif
	397
	398	#define CONFIG_BOOTCOMMAND \
	399	"for btype in ${bootdevs}; do " \
	400	"echo; echo Attempting ${btype} boot...; " \
	401	"if run ${btype}_boot; then; fi; " \
	402	"done"
	403
59189a8b	404	#endif /* __CONFIG_H */