[people/ms/u-boot.git] / include / configs / h2200.h

/*
 * iPAQ h2200 board configuration
 *
 * Copyright (C) 2012 Lukasz Dalek <luk0104@gmail.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 */

#ifndef __CONFIG_H
#define __CONFIG_H

#define MACH_TYPE_H2200			341
#define CONFIG_MACH_TYPE		MACH_TYPE_H2200

#define CONFIG_CPU_PXA25X		1
#define CONFIG_BOARD_H2200

#define CONFIG_SYS_NO_FLASH

#define CONFIG_SYS_HZ			1000

#define CONFIG_NR_DRAM_BANKS		1
#define PHYS_SDRAM_1			0xa0000000 /* SDRAM Bank #1 */
#define PHYS_SDRAM_1_SIZE		0x04000000 /* 64 MB */

#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
#define CONFIG_SYS_SDRAM_SIZE		PHYS_SDRAM_1_SIZE

#define CONFIG_SYS_INIT_SP_ADDR		0xfffff800

#define CONFIG_ENV_SIZE			0x00040000
#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 128*1024)

#define CONFIG_ENV_IS_NOWHERE
#define CONFIG_SYS_MAXARGS		16
#define CONFIG_SYS_LOAD_ADDR		0xa3000000 /* default load address */

/*
 * iPAQ 1st stage bootloader loads 2nd stage bootloader
 * at address 0xa0040000 but bootloader requires header
 * which is 0x1000 long.
 *
 * --- Header begin ---
 *	.word 0xea0003fe ; b 0x1000
 *
 *	.org 0x40
 *	.ascii "ECEC"
 *
 *	.org 0x1000
 * --- Header end ---
 */

#define CONFIG_SYS_TEXT_BASE		0xa0041000

/*
 * Static chips
 */

#define CONFIG_SYS_MSC0_VAL		0x246c7ffc
#define CONFIG_SYS_MSC1_VAL		0x7ff07ff0
#define CONFIG_SYS_MSC2_VAL		0x7ff07ff0

/*
 * PCMCIA and CF Interfaces
 */

#define CONFIG_SYS_MECR_VAL		0x00000000
#define CONFIG_SYS_MCMEM0_VAL		0x00000000
#define CONFIG_SYS_MCMEM1_VAL		0x00000000
#define CONFIG_SYS_MCATT0_VAL		0x00000000
#define CONFIG_SYS_MCATT1_VAL		0x00000000
#define CONFIG_SYS_MCIO0_VAL		0x00000000
#define CONFIG_SYS_MCIO1_VAL		0x00000000

#define CONFIG_SYS_FLYCNFG_VAL		0x00000000
#define CONFIG_SYS_SXCNFG_VAL		0x00040004

#define CONFIG_SYS_MDREFR_VAL		0x0099E018
#define CONFIG_SYS_MDCNFG_VAL		0x01C801CB
#define CONFIG_SYS_MDMRS_VAL		0x00220022

#define CONFIG_SYS_PSSR_VAL		0x00000000
#define CONFIG_SYS_CKEN			0x00004840
#define CONFIG_SYS_CCCR			0x00000161

/*
 * GPIOs
 */

#define CONFIG_SYS_GPSR0_VAL		0x01000000
#define CONFIG_SYS_GPSR1_VAL		0x00000000
#define CONFIG_SYS_GPSR2_VAL		0x00010000

#define CONFIG_SYS_GPCR0_VAL		0x00000000
#define CONFIG_SYS_GPCR1_VAL		0x00000000
#define CONFIG_SYS_GPCR2_VAL		0x00000000

#define CONFIG_SYS_GPDR0_VAL		0xF7E38C00
#define CONFIG_SYS_GPDR1_VAL		0xBCFFBF83
#define CONFIG_SYS_GPDR2_VAL		0x000157FF

#define CONFIG_SYS_GAFR0_L_VAL		0x80401000
#define CONFIG_SYS_GAFR0_U_VAL		0x00000112
#define CONFIG_SYS_GAFR1_L_VAL		0x600A9550
#define CONFIG_SYS_GAFR1_U_VAL		0x0005AAAA
#define CONFIG_SYS_GAFR2_L_VAL		0x20000000
#define CONFIG_SYS_GAFR2_U_VAL		0x00000000

/*
 * Serial port
 */

#define CONFIG_PXA_SERIAL
#define CONFIG_FFUART
#define CONFIG_CONS_INDEX		3

#define CONFIG_BAUDRATE			115200
#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 38400, 115200 }

#define CONFIG_CMD_IMPORTENV		1
#define CONFIG_CMD_LOADB
#define CONFIG_CMD_SOURCE
#define CONFIG_CMD_RUN
#define CONFIG_CMD_IMI

#define CONFIG_FIT
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_CMDLINE_TAG
#define CONFIG_INITRD_TAG

/* Monitor Command Prompt */
#define CONFIG_SYS_PROMPT		"> "
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_PROMPT_HUSH_PS2	"$ "

/* Console I/O Buffer Size */
#define CONFIG_SYS_CBSIZE		256

/* Print Buffer Size */
#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
					sizeof(CONFIG_SYS_PROMPT) + 16)

#define CONFIG_BOOTARGS "root=/dev/ram0 ro console=ttyS0,115200n8"

#define CONFIG_SYS_CONSOLE_IS_IN_ENV
#define CONFIG_USB_DEV_PULLUP_GPIO	33
/* USB VBUS GPIO 3 */

#define CONFIG_CMD_NET
#define CONFIG_CMD_PING

#define CONFIG_BOOTDELAY		2
#define CONFIG_BOOTCOMMAND		\
	"setenv downloaded 0 ; while test $downloaded -eq 0 ; do " \
	"if bootp ; then setenv downloaded 1 ; fi ; done ; " \
	"source :script ; " \
	"bootm ; "

#define CONFIG_USB_GADGET_PXA2XX
#define CONFIG_USB_ETHER
#define CONFIG_USB_ETH_SUBSET

#define CONFIG_USBNET_DEV_ADDR		"de:ad:be:ef:00:01"
#define CONFIG_USBNET_HOST_ADDR	"de:ad:be:ef:00:02"
#define CONFIG_EXTRA_ENV_SETTINGS \
	"stdin=serial\0" \
	"stdout=serial\0" \
	"stderr=serial\0"

#endif /* __CONFIG_H */
Commit	Line	Data
34cda7a0 ŁD	1	/*
	2	* iPAQ h2200 board configuration
	3	*
	4	* Copyright (C) 2012 Lukasz Dalek <luk0104@gmail.com>
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU General Public License
	17	* along with this program; if not, write to the Free Software
	18	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	19	*/
	20
	21	#ifndef __CONFIG_H
	22	#define __CONFIG_H
	23
	24	#define MACH_TYPE_H2200 341
	25	#define CONFIG_MACH_TYPE MACH_TYPE_H2200
	26
	27	#define CONFIG_CPU_PXA25X 1
	28	#define CONFIG_BOARD_H2200
	29
	30	#define CONFIG_SYS_NO_FLASH
	31
	32	#define CONFIG_SYS_HZ 1000
	33
	34	#define CONFIG_NR_DRAM_BANKS 1
	35	#define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */
	36	#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
	37
	38	#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
	39	#define CONFIG_SYS_SDRAM_SIZE PHYS_SDRAM_1_SIZE
	40
	41	#define CONFIG_SYS_INIT_SP_ADDR 0xfffff800
	42
	43	#define CONFIG_ENV_SIZE 0x00040000
	44	#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
	45
	46	#define CONFIG_ENV_IS_NOWHERE
	47	#define CONFIG_SYS_MAXARGS 16
	48	#define CONFIG_SYS_LOAD_ADDR 0xa3000000 /* default load address */
	49
	50	/*
	51	* iPAQ 1st stage bootloader loads 2nd stage bootloader
	52	* at address 0xa0040000 but bootloader requires header
	53	* which is 0x1000 long.
	54	*
	55	* --- Header begin ---
	56	* .word 0xea0003fe ; b 0x1000
	57	*
	58	* .org 0x40
	59	* .ascii "ECEC"
	60	*
	61	* .org 0x1000
	62	* --- Header end ---
	63	*/
	64
65	#define CONFIG_SYS_TEXT_BASE 0xa0041000
66
67	/*
68	* Static chips
69	*/
70
71	#define CONFIG_SYS_MSC0_VAL 0x246c7ffc
72	#define CONFIG_SYS_MSC1_VAL 0x7ff07ff0
73	#define CONFIG_SYS_MSC2_VAL 0x7ff07ff0
74
75	/*
76	* PCMCIA and CF Interfaces
77	*/
78
79	#define CONFIG_SYS_MECR_VAL 0x00000000
80	#define CONFIG_SYS_MCMEM0_VAL 0x00000000
81	#define CONFIG_SYS_MCMEM1_VAL 0x00000000
82	#define CONFIG_SYS_MCATT0_VAL 0x00000000
83	#define CONFIG_SYS_MCATT1_VAL 0x00000000
84	#define CONFIG_SYS_MCIO0_VAL 0x00000000
85	#define CONFIG_SYS_MCIO1_VAL 0x00000000
86
87	#define CONFIG_SYS_FLYCNFG_VAL 0x00000000
88	#define CONFIG_SYS_SXCNFG_VAL 0x00040004
89
90	#define CONFIG_SYS_MDREFR_VAL 0x0099E018
91	#define CONFIG_SYS_MDCNFG_VAL 0x01C801CB
92	#define CONFIG_SYS_MDMRS_VAL 0x00220022
93
94	#define CONFIG_SYS_PSSR_VAL 0x00000000
95	#define CONFIG_SYS_CKEN 0x00004840
96	#define CONFIG_SYS_CCCR 0x00000161
97
98	/*
99	* GPIOs
100	*/
101
102	#define CONFIG_SYS_GPSR0_VAL 0x01000000
103	#define CONFIG_SYS_GPSR1_VAL 0x00000000
104	#define CONFIG_SYS_GPSR2_VAL 0x00010000
105
106	#define CONFIG_SYS_GPCR0_VAL 0x00000000
107	#define CONFIG_SYS_GPCR1_VAL 0x00000000
108	#define CONFIG_SYS_GPCR2_VAL 0x00000000
109
110	#define CONFIG_SYS_GPDR0_VAL 0xF7E38C00
111	#define CONFIG_SYS_GPDR1_VAL 0xBCFFBF83
112	#define CONFIG_SYS_GPDR2_VAL 0x000157FF
113
114	#define CONFIG_SYS_GAFR0_L_VAL 0x80401000
115	#define CONFIG_SYS_GAFR0_U_VAL 0x00000112
116	#define CONFIG_SYS_GAFR1_L_VAL 0x600A9550
117	#define CONFIG_SYS_GAFR1_U_VAL 0x0005AAAA
118	#define CONFIG_SYS_GAFR2_L_VAL 0x20000000
119	#define CONFIG_SYS_GAFR2_U_VAL 0x00000000
120
121	/*
122	* Serial port
123	*/
124
125	#define CONFIG_PXA_SERIAL
126	#define CONFIG_FFUART
127	#define CONFIG_CONS_INDEX 3
128
129	#define CONFIG_BAUDRATE 115200
130	#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 38400, 115200 }
131
132	#define CONFIG_CMD_IMPORTENV 1
133	#define CONFIG_CMD_LOADB
134	#define CONFIG_CMD_SOURCE
135	#define CONFIG_CMD_RUN
136	#define CONFIG_CMD_IMI
137
138	#define CONFIG_FIT
139	#define CONFIG_SETUP_MEMORY_TAGS
140	#define CONFIG_CMDLINE_TAG
141	#define CONFIG_INITRD_TAG
142
143	/* Monitor Command Prompt */
144	#define CONFIG_SYS_PROMPT "> "
145	#define CONFIG_SYS_HUSH_PARSER
146	#define CONFIG_SYS_PROMPT_HUSH_PS2 "$ "
147
148	/* Console I/O Buffer Size */
149	#define CONFIG_SYS_CBSIZE 256
150
151	/* Print Buffer Size */
152	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
153	sizeof(CONFIG_SYS_PROMPT) + 16)
154
155	#define CONFIG_BOOTARGS "root=/dev/ram0 ro console=ttyS0,115200n8"
156
a33fada1 LD	157	#define CONFIG_SYS_CONSOLE_IS_IN_ENV
	158	#define CONFIG_USB_DEV_PULLUP_GPIO 33
	159	/* USB VBUS GPIO 3 */
	160
	161	#define CONFIG_CMD_NET
	162	#define CONFIG_CMD_PING
	163
	164	#define CONFIG_BOOTDELAY 2
	165	#define CONFIG_BOOTCOMMAND \
	166	"setenv downloaded 0 ; while test $downloaded -eq 0 ; do " \
	167	"if bootp ; then setenv downloaded 1 ; fi ; done ; " \
	168	"source :script ; " \
	169	"bootm ; "
	170
	171	#define CONFIG_USB_GADGET_PXA2XX
	172	#define CONFIG_USB_ETHER
	173	#define CONFIG_USB_ETH_SUBSET
	174
	175	#define CONFIG_USBNET_DEV_ADDR "de:ad:be:ef:00:01"
	176	#define CONFIG_USBNET_HOST_ADDR "de:ad:be:ef:00:02"
	177	#define CONFIG_EXTRA_ENV_SETTINGS \
	178	"stdin=serial\0" \
	179	"stdout=serial\0" \
	180	"stderr=serial\0"
	181
34cda7a0	182	#endif /* __CONFIG_H */